Prof. Paolo Colantonio a.a

Transcription

1 Pro. Paolo Colantonio a.a. 03 4

2 Operational ampliiers (op amps) are among the most widely used building blocks in electronics they are integrated circuits (ICs) oten DIL (or DIP) or SMT (or SMD) DIL (or DIP) Dual in line package SMT Surace mount technology SMD Surace mount deice Pro. Paolo Colantonio 4

3 single package will oten contain seeral op amps Pro. Paolo Colantonio 3 4

4 n ideal op amp would be an ideal oltage ampliier and would hae: =, i = and o = 0 Equialent circuit o an ideal op amp It is typically realized by DC coupled ampliier with a ery high open loop gain. It can be biased in a symmetric way (i.e. V CC and V CC ) or with a single positie bias alue (V CC ) depending i the output signal should be aried around zero or not. Pro. Paolo Colantonio 4 4

5 V Ideal characteristics a) Voltage Gain ininite = o cm b) Input impedance ininite in = cm 0 c) Output impedance null o =0 d) Common Mode ejection atio (CM) ininite CM e) Bandwidth ininite V cm In an ideal op amp it ollows that the input current is null I the output oltage is inite then the input oltage (V V ) is null (irtual earth) The ampliier perormance are not depending on the loading conditions The bias oltages represent the minimum and maximum output oltage alues Being =, the output oltage o an op. amp. in an open loop coniguration can assume only one o the two saturating alues (V CC or V CC ) The use o ideal components makes the analysis o these circuits ery straightorward Pro. Paolo Colantonio 5 4

6 Since the gain is assumed ininite, i V is inite the input oltage V i must be zero. Hence V V i 0 V I V I Since the input resistance o the op amp is, its input current must be zero, and hence V I I i V a) i i 0 I I thus I V V V V V V I V V Pro. Paolo Colantonio 6 4

7 Consider the circuit with more inputs Since the input resistance o the op amp is, its input current must be zero, and hence i i 0 I I I3 I4 V 3 V 3 I 3 V I I 4 I 4 V 4 Since the input oltage is null (earth ground circuit) b) V V i 0 I V I V I V I4 3 4 V thus V V V V The output signal is a weighted sum o the input signals (considering i as resistances). Pro. Paolo Colantonio 7 4

8 3 Summing ampliiers make conenient leel shiters. ssuming that an input signal V has to be shited around a ixed leel V L V V I I I 3 V 3 V V V b) By assuming 3 3 V V V 3 3 L The input signal is transerred to the output with gain, but shited o a ixed alue V L. V V V 3 L I a trimmer is used or, the oset leel V L can be ine controlled. Pro. Paolo Colantonio 8 4

9 Mantaining the assumption o a null input current: i i i i V I I i i i i i i i i V eplacing into the ormer equation: The inite gain implies a dierence with respect to the theoretical gain ( / ) which is larger as lower is. Pro. Paolo Colantonio 9 4

10 ssuming a null input oltage and current V thus V I I V We can obsere that assuming =0 or = the ampliier gain becomes unitary. Thus we can realize an ideal buer stage ideale ( in =, o =0, =) by using one o the two ollowing conigurations: i V i =0 V V = V V Pro. Paolo Colantonio 0 4

11 V o I I I i V o I i Pro. Paolo Colantonio 4

12 By using both the input ports o the opamp and by using the superposition principle: ssuming the earth ground principle (V =V ): V V 3 4 I NI V 3 Making a mathematical rearrangement ssuming, thus ( )/ 3 4 I CM Pro. Paolo Colantonio 4 cm cm

13 In an inerting ampliier we saw that: i C i V V V C V a) integrator For the scheme a) jc dt j jc For the scheme b) b) dierentiator jc d dt j jc The ormer transer unctions hae a ery high sensitiity to low requencies (integrator) or high requencies (dierentiator) In both cases low alues o input signal could results in ery high output leels, resulting in a circuit ailure Pro. Paolo Colantonio 3 4

14 In order to sole the requency issues the preious circuits are modiied as in the ollowing C C V V V V b) dierentiator a) integrator j C j H L jc j The insertion o a resistor modiies the requency behaiour aoiding the answer to increase indeinitely towards ininity Practically the bandwidth has been modiied in the upper (case a) or in the lower (case b) requency range Pro. Paolo Colantonio 4 4

15 V 45 C a) integrator s s 3dB V log() log() db 0log j H arctg 0log H Pro. Paolo Colantonio 5 4 H where H C Comparing the result with the response o a Low Pass C ilter V C V H H H j db 0log j H C H H arctg The real integrator behaes like a Low Pass C ilter The group C limits the opamp bandwidht, which output is proportional to the input up to H, while or > H it integrates the input signal. H

16 V C b) dierentiator V L j 0log db arctg 0log L j L L L where L L C 45 3dB C i log() V 70 s 80 log() Comparing the result with the response o a High Pass C ilter Pro. Paolo Colantonio 6 4 V db 0log L j C L L arctg The real dierentiator behaes like a High Pass C ilter The group C limits the opamp bandwidht, which output is the dierentiation o the input up to L, while or > L it is simply proportional to the input signal. L

17 The preious schemes can be combined to limit the opamp bandwidth as reported in the ollowing scheme C V C G V V V 0log 0log 0log L H arctg arctg L H L C H C 0 db dec 0 db dec ( H L ) is the bandwidth o the resulting ampliier L Bandwidth H log() Pro. Paolo Colantonio 7 4

18 So ar we hae assumed the use o ideal op amps these hae =, i = and o =0 eal components do not hae these ideal characteristics (though in many cases they approximate to them) In this section we will look at the characteristics o typical deices perhaps the most widely used general purpose op amp is the 74 Pro. Paolo Colantonio 8 4

19 Voltage gain typical gain o an operational ampliier might be db (oltage gain o ) 74 has a typical gain o 0 6 db ( 0 5 ) high gain deices might hae a gain o 60 db (0 8 ) while not ininite, the gain o most op amps is high enough howeer, gain aries between deices and with temperature Input resistance typical input resistance o a 74 is M ery ariable, or a 74 it can be as low as 300 k the aboe alue is typical or deices based on bipolar transistors op amps based on ield eect transistors generally hae a much higher input resistance perhaps 0 we will discuss bipolar and ield eect transistors later Output resistance typical output resistance o a 74 is 75 again ery ariable oten o more importance, is the maximum output current the 74 will supply 0 m high power deices may supply an amp or more Pro. Paolo Colantonio 9 4

20 Supply oltage range a typical arrangement would use supply oltages o 5V and 5V, but a wide range o supply oltages is usually possible the 74 can use oltages in the range 5 to 8V some deices allow oltages up to 30V or more others, designed or low oltages, may use.5v many op amps permit single oltage supply operation, typically in the range 4 to 30V Common mode rejection ratio an ideal op amp would not respond to common mode signals real ampliiers do respond to some extent the common mode rejection ratio (CM) is the ratio o the response produced by a dierential mode signal to that produced by a common mode signal typical alues or CM might be in the range 80 to 0 db 74 has a CM o about 90 db Pro. Paolo Colantonio 0 4

21 Frequency response typical 74 requency response is shown here upper cut o requency is a ew hertz requency range generally described by the unity gain bandwidth high speed deices may operate up to seeral gigahertz Pro. Paolo Colantonio 4

22 Our analysis assumed the use o an ideal op amp When using real components we need to ensure that our assumptions are alid In general this will be true i we: limit the gain o our circuit to much less than the open loop gain o our opamp choose external resistors that are small compared with the input resistance o the op amp choose external resistors that are large compared with the output resistance o the op amp Generally we use resistors in the range to 00 k Pro. Paolo Colantonio 4

23 Eects o eedback on the gain negatie eedback reduces gain rom to /( B) in return or this loss o gain we get consistency, proided that the open loop gain is much greater than the closed loop gain (that is, >> /B) using negatie eedback, standard cookbook circuits can be used greatly simpliying the design these can be analysed without a detailed knowledge o the op amp itsel Eects o eedback on requency response as the gain is reduced the bandwidth is increased gain bandwidth constant since gain is reduced by ( B) bandwidth is increased by ( B) or a 74, gain bandwidth 06 i gain = 000 BW 000 Hz i gain = 00 BW 0,000 Hz Pro. Paolo Colantonio 3 4

24 Eects o eedback on input and output resistance input/output resistance can be increased or decreased depending on how eedback is used in each case the resistance is changed by a actor o ( B) Example: i an op amp with a gain o x0 5 is used to produce an ampliier with a gain o 00 then: = x 0 5 B = /G = 0.0 ( B) = ( 000) 000 Pro. Paolo Colantonio 4 4