CMOS Switched-Capacitor Circuits: Recent Advances in Bio-Medical and RF Applications

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1 CMOS Switched-Capacitor Circuits: Recent Advances in Bio-Medical and RF Applications David J. Allstot Univ. of Washington Dept. of Electrical Engineering Seattle, WA

2 PA Motivation 2010: 4.6 B subscribers 2012: 1 B WiFi US mobile phones: Use yearly energy of 638,000 US Homes Emit 6K tons CO 2 Demand increases with newer data phones PA is dominant energy hog Metropolitan Seattle Area 2

3 CMOS PA Trends: P out J.S. Walling, S.S. Taylor and D.J. Allstot, A class-g supply modulator and class-e PA in 130 nm CMOS, IEEE JSSC, pp , Sept S.-M. Yoo, J.S. Walling, E.C. Woo and D.J. Allstot, A switched-capacitor power amplifier for EER/Polar transmitters, IEEE ISSCC Dig. Tech. Papers, pp ,

4 CMOS PA Trends: PAE 4

5 Outline Challenges in CMOS RF PA Design Switched-Capacitor PA Solution Analog-domain Compressed Sensing for Bio-signal Acquisition 5

6 V DD Scaling Challenge: Max Power Out P out = V DD V 2R L SAT 2 V DD Impedance Transformation 45 nm CMOS 1W, V DD = 1.0 V Linear PAs V SAT = 0.2 V R opt 0.3 Parasitic R Limit) R opt = R L /n 2 1 : n V out R L = 50 6

7 Challenge: Efficiency Linear Power Amplifiers AM Signals (i.e., non- Constant Envelope) = P P L DC Class-A: Vout =0.5 V DD 2 Class-B: V out = 4 Class-AB VDD Class-C: Peak = P out = 0 (Attractive for Body Area Networks) 2 7

8 Switching Power Amplifiers PM and FM Signals (i.e., Constant Envelope) Class D, E, F, etc. Zero-V Switching Rise in v D delayed until switch OFF v D = switch ON dv D /dt = switch OFF Ideal = 100% Challenge: Efficiency Impedance Transformer & Wave-Shaping Network P Class-E PA DC = v i =0 ON D D OFF 8

9 100 Spectral vs. Energy Efficiency FM QAM 64-QAM Ocurrences (%) Ocurrences (%) Ocurrences (%) Normalized Envelope (V) Normalized Envelope (V) Normalized Envelope (V) 9

10 Feedforward Feedback Linearization Techniques LINC Linear Amp with Nonlinear Components EER Envelope Elimination and Restoration Can use highly-efficient switching PA; e.g., Class-E P out V DD for Switching PA Split signal into envelope (A) & phase () paths Improved overall efficiency Distortion from delay mismatches in A & paths 10

11 Kahn EER Technique (1952) A Original Kahn Modern Kahn Polar conversion in DSP using CORDIC Algorithm DAC and supply modulator needed 11

12 LDO Modulator & Efficiency LDO Characteristics V out ENV in Pout voutiout PDC vddiout P / P v / V out DC out DD Overall efficiency is product of supply modulator and PA efficiencies i out LDO = Low-dropout Reg. LDO Increased over Linear PA 12

13 Class-G: Spectral vs. Energy Efficiency Small envelope: Use Vdd/x Large envelope: Use Vdd Dual-Supply Modulator Extend to more than two power supplies? Class-H? 13

14 Class-G: Spectral vs. Energy Efficiency Overall efficiency is product of class-g modulator and class-e PA efficiencies Ideally 5X higher average than linear PA for this probability density function Drain Efficiency (%) Class-G Avg. Class-B Avg. Class-G Class-E OFDM PDF Class-B V (V) out Probability (%) 14

15 Class-E PA and Driver Interstage tuning inductors reduce driver power Driver taper of 2 custom stages 15

16 130nm Class-G PA 16

17 Class-G Static Measurements Output Power (mw) PAE (%) Efficiency (%) Class G PAE 64QAM OFDM PDF Theory Avg PAE Meas. Avg PAE Probability (%) Input Envelope 2 (V 2 ) Normalized Envelope (V) Freq = 2 GHz 64 QAM OFDM Symbol Period = 4 s Theoretical avg. PAE = 24% Measured avg. PAE = 22% 17

18 Class-G Dynamic Measurement 0 Norm. Output Power (db) Frequency Offset (MHz) rms EVM = 2.5% Freq = 2 GHz 18

19 Digitally-Modulated PA PA based on digital modulation Unit current cells [Kavousian, et al., ISSCC 2007 ] [Presti, et al., JSSC 2009] DAC, supply modulator functions combined No supply modulator: Higher efficiency and smaller area Multiple unit current-cell-based PAs as DAC 19

20 Current-Cell-Based PA Nonlinear V OUT V OUT Saturated Linear Accuracy / Efficiency Tradeoff Input Code Accurate current cell requires high r out Cascode more headroom: Lower efficiency Extra resolution required for predistortion Efficiency: Ideal P P OUT DC P V OUT OUT P OUT 20

21 Switched-Capacitor Basics (a) Precharge and Reset (b) Charge Redistribution w/o precharge Energy is lost w/ precharge and reset No energy lost in charge redistribution w/o precharge 21

22 SCPA in Polar Transmitter 22

23 Basic SCPA Concept SC technique can be used for voltage generation Easy to split into capacitor bank (small area & loss) Resonant frequency maintained (Constant C) Constant envelope Good efficiency 23

24 Switched-Capacitor PA Constant Capacitance Capacitor can be arrayed Single capacitor can be split into many Each capacitor is switched to VDD or GND Constant resonant frequency RF Switched-Capacitor DAC 24

25 Thevenin Equivalent Circuit Constant Capacitance = C C U =C 1 =C 2 =C n =C N = N C Digitally-controlled output voltage Constant top-plate capacitance vs. the number of switched capacitors 25

26 Output Power P out delivered to R OUT V OUT n/n P OUT (n/n) 2 4/ for 1 st harmonic component V OUT = n N V DD P OUT = 2 2 n N 2 2 V R DD 26

27 Charging & discharging with switch CV 2 f dynamic power Assume fast t r,t f with constant current through L Effective switched capacitance varies with envelope code Power Dissipated in SC 27

28 Higher efficiency with Ideal Efficiency higher Q Loaded Higher Q Loaded : - Smaller Capacitance - Less CV 2 f dynamic power - Efficiency tradeoff due to L & switch P POUT P OUT SC 4 n 2 4 n n( 2 N Q Loaded n ) Q Loaded 2fL R 1 2 fcr 28

29 Practical Efficiency Ideal P SC P SC P P OUT OUT P OUT POUT P P SWC DR P CLOCK Practical implementation: Lossy inductor: SW parasitic R: SW parasitic C: Switch driver: Clock distribution: P P P SWC DR CLOCK ( n / ( n / Ideal (%) C N N ) C ) C CLOCK SW DR V Ideal vs. Practical Normalized P OUT (dbm) V V 2 DD 2 DD 2 DD f f f Benefit from scaling Practical (%) 29

30 CMOS Switch as Voltage Source CB AM-PM AM-AM VDD n/n Voltage (CB) 0 0 time Faster switch improves both AM-AM and AM-PM distortion performance (e.g., better with CMOS scaling) 1/fs 30

31 6-bit Switched-Capacitor Array Split into 4-bit unary and 2-bit binary arrays Additional bits possible More unary/binary bits or C-2C ladder Unit-cell switch and switch-driver 31

32 Switch Implementation Cascode More output power with same R out Total supply voltage of 2VDD All thin-gate devices Separate driver voltage ranges for NMOS & PMOS 32

33 Switched-Capacitor PA Schematic Bandpass Matching Network C= 8.2pF 33

34 Chip Microphotograph 90 nm RF LP CMOS process (MIM cap and UTM) 1430 m 730 m Switch, Drivers, Logic & Bypass Capacitor Capacitor Array Output Matching Network 34

35 PA Measurement: P out & PAE 6-bit implementation Fewer P driver at backoff Peak = 45% 35

36 AM-AM & AM-PM / P out vs. Freq. Different impedance seen from source depending on input code Scaling friendly Peak P out 24dBm Peak 45% 36

37 Constellation / Spectral Mask 64 QAM/OFDM EVM = 2.9% P out = 17.7 dbm 37

38 Performance Comparison Reference Degani, et. al. ISSCC 2008 Presti, et. al. JSSC 2009 Xu, et. al. ESSCIRC 2010 Walling, et. al. JSSC 2009 This work Architecture Class-AB DPA Current Cell Outphasing Class-G Switched- Capacitor Process 90nm 0.13um 32nm 0.13um 90nm Power Supply 3.3V 1.2V/2.1V 2V 3.3V 1.5V/3V Peak Power 25 dbm 25 dbm 25.1 dbm 29.3 dbm 25 dbm Peak Efficiency Avg. Power (OFDM) Avg. Efficiency (OFDM) Output Matching NW 50% 47% 40.6% 69% 45% 15.5 dbm 15.3 dbm 18.6 dbm 19.6 dbm 17.7 dbm 19% 22% 18.1% 22.6% 27% N/A Ext. Matching On-Chip Balun On-Chip Matching What s next? Class-G SCPA in package high PAE. On-Chip Matching 38

39 Outline Motivation for Compressed Sampling (CS) Compressed Sampling and three key ideas CS reconstruction Experimental Procedures and Results Conclusions 39

40 Motivation for Compressed Sampling Body Area Network Many wireless sensors linked to personal Smartphone, etc. Personal mobile units linked to Dr. via internet/cellular network Dr. feedback for real-time control of detail vs. energy efficiency Reduce data rates to increase sensor lifetime and energy efficiency 40

41 Compressed Sampling Sensor System Electrode Sensor Compressed Sampling Bio-Signal Acquisition System LNA x(t) CS AFE [Y] ADC Power Amplifier Antenna Feedback Compressed Data Rate Ultra-low power CS analog front-end (AFE) RF power amplifier is energy hog; ADC is energy piglet CS reduces data rates with commensurate energy savings for PA, ADC, etc; i.e., only [Y] is digitized and transmitted 41

42 Intuition for CS Conventional 42

43 Intuition for CS Group Sampling R. Dorfman, The detection of defective members of large populations, The Annals of Mathematical Statistics, vol. 14, no. 4, pp , Dec M. Sobel and P.A. Groll, Group testing to eliminate efficiently all defectives in a binomial sample, Bell System Technical Journal, vol. 38, no. 5, pp , Sept

44 Intuition II: Sub-Nyquist Sampling W Intuitive explanation of three key ideas Nyquist sample a sinusoid; i.e., 2 samples/period Only 2 amplitude values (i.e., looks like sawtooth waveform) How to get enough amplitude values to infer sinusoid? 44

45 Intuition II: Sub-Nyquist Sampling W r 1 r 2 Key Idea #1: Randomize Sampling Multiply original analog samples by random weights to obtain many more analog amplitudes 45

46 Intuition II: Sub-Nyquist Sampling r 3 r 4 W r 6 r 5 r 1 r 2 r 7 r 8 Key Idea #2: Reconstruction (e.g., 8! possible solutions) Key Idea #3: Optimization assuming known class of signal; e.g., sinusoid). 8! Solutions CS finds best with high probability. What about compression? 46

47 Formal Compressed Sampling [] MXN [Y] MX1 [Y] = [Φ][X] [X] NX1 [X]: Analog input sample vector (e.g., N = 16) []: Measurement matrix of (e.g., 6-bit Gaussian or Uniform) random coefficients (M rows and N columns) [Y]: Compressed analog output vector (e.g., M = 8) Compression Factor C = N/M (e.g., C = 2) 47

48 Y N 1 1i i1 Compressed Sampling - I [] MXN = [ 11,, N ] [ ] X [ ] i [ M1,, N ] [Y] = [Φ][X] [Y] MX1 = [Y 1,, Y M ] [X] NX1 = [X 1,, X N ] [X] 16X1 ; [] 8X16 ; [Y] 8X1 ; C = 2 [] 8X16 is Measurement Matrix; e.g., Gaussian or Uniform random coefficients each quantized to n = 6 bits Multiply and sum for each Y i is a Random Linear Projection [Y] is a compressed analog signal with global information Typically K < M < N (i.e., signal is sparse such as ECG) K = 3 48

49 Compressed Sampling - II [X] [Y] [X] 1024X1 : Analog samples from ECG signal [Y] 256X1 : Compressed analog output signal [] 256X1024 : Measurement Matrix C = 4X in this example; (C = 2X 16X possible for ECG) 49

50 Antenna y(t) CS Reconstruction Compressed Sensing Bio- Signal Reconstruction System LNA Baseband DSP CS Optimization/ Reconstruction DAC Original Nyquist Data Rate Reconstruction/optimization of compressed signal (e.g., Smartphone) [Φ] is non-square and non-invertible; under-determined system with many solutions Optimize exploiting knowledge of signal; e.g., ECG bio-signals are time-domain sparse 50

51 Accuracy Requirments for ECG AAMI American Institute for Advancement of Medical Instrumentation (Standards Vary) Ambulatory Quality ECG 8-10 bits (48-60 db) Diagnostic Quality ECG bits (60-72 db) 51

52 CS Reconstruction - II [X] [Y] Accuracy depends on: Compression Factor, C = N/M PDF of random coefficients and # bits Algorithm Convex Optimization with L 1 Norm 52

53 Sparsity vs. Compressibility 22 Compression Factor, C = N/M Sparsity (%) Theoretical Limit: M > K log(n/k) with K nonzero input samples (Heuristic: M > 2K) 53

54 Quantization of Random Coefficients - I Gaussian []: Choose n = 6 bits for C = 2X 16X 54

55 Switched-Capacitor CS CODER Electrode Sensor Compressed Sensing Bio- Signal Acquisition System LNA Ultra-low Power Analog Circuits CS AFE ADC [Y] = [Φ][X] Power Amplifier Antenna SC Multiplying Digital-Analog Converter For ECG signal: BW = 2 KHz f S = 4 KHz C = 100 ff P DYN 0.4 nw C-2C in MDAC/ADC 55

56 CS-ADC Chip-photo IBM8RF 0.13 µm CMOS 3 mm x 3 mm M = 64 N=128 to 1024 Testing Underway: Expect ~ 1 uw total power with C = 16

57 Thank you very much! 57

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