A Low Power Integrated UWB Transceiver with Solar Energy Harvesting for Wireless Image Sensor Networks
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1 A Low Power Integrated UWB Transceiver with Solar Energy Harvesting for Wireless Image Sensor Networks Minjoo Yoo / Jaehyuk Choi / Ming hao Wang April. 13 th. 2009
2 Contents Introduction Circuit Description UWB transceiver architecture Low Drop-Out voltage regulator Pulse generator LNA Conclusion Summary of specification Layout view Q & A 1
3 Introduction CMOS imager Sensor node 100 Mbps VGA, 30 fps, 10-b) Power consumption: < 100 mw Need low-power integrated transceiver low-power, short-range transceiver UWB Environment monitoring Traffic management Military surveillance 2
4 Block Diagram Circuit Description Proposed UWB transceiver architecture Image Sensor Solar Cell + Battery 4/14/2009 3
5 LDO Voltage Regulator Circuit Description Features To regulate voltage from solar cell and provide stable 1.2V supply voltage Low Drop-Out Design by using PMOS in output stage Unity gain feedback Amplifier in small signal aspect Vin Vref Iref Diff. Pair Power PMOS M6 M7 M8 M4 M5 Vout M1 M2 M3 4
6 LDO Voltage Regulator Simulation Results Key performance V in = 2 ~ 3V ; V out = 1.2V I load = 0 ~ 30mA Load regulation = 2.5V nominal supply voltage Line regulation = 11mA nominal load current 5
7 LDO Voltage Regulator Simulation Results Frequency response Open loop gain= db Phase margin= 76 o Open Loop Gain / Phase plot 6
8 UWB Pulse Generator Circuit Description UWB pulse-based transmitter system UWB spectral mask (defined by FCC) 3 rd order Gaussian pulse shaping v T ( s) = i = s 3 ( L L 1 o o ( s) ( s) 2 C) = ( R sl ) L sl sc 1 4/14/2009 Jaehyuk Choi 7
9 UWB Pulse Generator Circuit Description Delayed waveform generation Phase detection Pulse shaping 4/14/2009 Jaehyuk Choi 8
10 UWB Pulse Generator Simulation Results Key performance Pulse output (transient) V p-p = 206 mv Power spectral density Bandwidth (10dB) = 3.37~ 5.9 GHz V p-p = 206 mv 500ps 10
11 Wideband LNA Circuit Description Proposed LNA architecture Input Matching Network Bandwidth Enhancement 11
12 Wideband LNA Circuit Description Input matching 3 rd order Chebyshev filter for broadband matching For ground output Z IN = 2 2 ( s LC + 1) ( s LC + 1) sc C 3 ( s LC + 1) + s LC 2 2 C1 + C + s LC C2 C
13 Wideband LNA Circuit Description Gain Tradeoff - Large C 1 +C 3 : More matching bandwidth - Small C 3 : Less gain high frequency Chebyshev filter Bandwidth enhancement - L m cancels inter-cascode node capacitance - Buffer reduces C out of gain stage Proposed LNA 13
14 Wideband LNA Simulation Results Key performance S 21 > 3.5GHz ~ 9.7GHz S 11 < 3.4GHz ~ 10.3GHz 3dB 3.2GHz ~ 10.6GHz 14
15 Summary of Specification Conclusion LDO Voltage Regulator Pulse Generator LNA Parameter Line Regulation Load Regulation RESULTS 0.517mV/V 0.304mV/mA Output voltage 300mV-1.2V Maximum Load current 30mA Power Consumption 1.22mW ( No Load ) 76.2mW (Full load) Pulse amplitude Pulse duration Bandwidth (10 db) Power Consumption S 11 S 21 3dB bandwidth NF Power Consumption 208 mv 500 ps 3.37 / 5.9 GHz μw -10 db ( GHz) 9.8 db ( GHz) GHz < 6 db ( GHz) 8.4 mw 15
16 Layout View Conclusion 620 μm 720 μm 16
17 Q & A THANK YOU! 17
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