High Average-Efficiency Power Amplifier Techniques Jason Stauth, U.C. Berkeley Power Electronics Group

Transcription

1 High Average-Efficiency Power Amplifier Techniques Jason Stauth, U.C. Berkeley Power Electronics Group 2 2 I Q

2 Overview Application Space: Efficient RF Power Amplifiers PA Fundamentals, Polar/ET Architectures Challenges with Polar/ET Research Directions Direct Digital Modulation Pulse-Density Modulation

3 Power Amplifier Fundamentals Q I Edge Constellation: 3pi/8, rotated 8-PSK VDD Vs Source Rs Bias Input Network Output Network Vout RL

4 Linear Power Amplifier (PA) Active transconductance device Input matched to previous stage Output (antenna) impedance transformed to increase power gain Small-signal model close to common source amplifier

5 Nonlinear PA Active device operates as a switch Approx LTV System Voltage waveform constrained (also consider current waveform) Drain Voltage constrained unconstrained constrained Gate Voltage Class-F Frequency Domain Impedance Design -Class E/F ZVS Amplifiers, Kee et al., MTT 3 Class-E Time domain Impulse Response design

6 The Point Nonlinear PAs can t do amplitude modulation 5% Linear PAs can do amplitude modulation, but are inefficient 1% 4% 8% Probability 3% 2% 6% 4% Efficiency 1% 2% % db(pmax) - db(pout) % PDF Class A Class B Nonlinear* A 1 2 V V 2 a 2 dd B V 4 V a dd S V V a dd

7 Average Efficiency Probability 5% 4% 3% 2% 1% % db(pmax) - db(pout) 1% 8% 6% 4% 2% % PDF Class A Class B Nonlinear* Efficiency avg E E load supply g( P ) P dp L L g( P ) P g( P ) PdP L L supply PL g( PL ) dpl ( P ) L L L L L ( P ) dp L PA Class: Class A Class B Nonlinear PA *constant bias current Average Efficiency:.78%* / 9.2%** 14.46% 18.21% **variable bias current

8 Polar and Envelope Tracking Transmitters Supply regulation synchronous with RF Envelope Voltage Regulator Probability 4% 9%.9 Ideal Class-B 8%.8 3%.7 PA Efficiency 7% Realistic Dynamic Supply Ideal Dynamic 6%.6 PA Efficiency.5 Supply PA 5% 2% 4%.4 1% 3%.3 2%.2 1%.1 % % db(pmax) - db(pout) Efficiency -Raab et al. High efficiency L-band Kahntechnique transmitter," MTT-S, Hanington, et al. "High-Efficiency Power Amplifier Using Dynamic Power-Supply Voltage for CDMA Applications," MTT, Aug avg 62.5%

9 Polar Architecture Q I Amplitude Signal time Env. Det. A(t) Regulator I V V F(, ) e j( wt ) Polar Modulator Q RFLO F( I, Q) I cos( wt) Q sin( wt) Limiter Phase Signal Φ(t) Many (most?) implementations don t use an efficient supply modulator efficiency gains from using nonlinear PA time PA

10 Envelope Tracking Linear (class-ab) PA Efficient supply modulator (linear reg doesn t make sense) Envelope Feedback Envelope Mapping Operate at max PAE point Baseband Generation V(t) RF LO RF Linear PA

11 Challenges Bandwidth Peak-average power ratio Time alignment Distortion (AM-AM, AM-PM) PSRR dbm(fs(wlana[1],-2m,2m,,,"kais dbm(fs(cdma2k[1],-2m,2m,,,"kaiser")) freq, MHz freq, MHz mag(wlana[1]) mag(cdma2k[1]) System Bandwidth (MHz) Peak-Average Power Ratio (db) Power Control Range (db) GSM.2 3 EDGE WCDMA cdma a/g time, usec time, usec histogram(mag(wlana[1]),25,,.8 histogram(mag(cdma2k[1]),25,,.5) indep(histogram(mag(wlana[1]),25,,.8)) indep(histogram(mag(cdma2k[1]),25,,.5))

12 Project Directions Wideband Switching Regulators Hybrid Linear- Switching Regulators Envelope Feedback Feedback Envelope Mapping Baseband Generation V(t) IF RF LO RF Linear PA - + Vref Linear Regulator I Lr I Sr I Load Load C L VDD Control/ PWM Switching Regulator - + RF Pulse Train Pulse-density modulation process Mixer PA Filter Direct Nonlinear Modulation Transmitters

13 Wideband Switching Regulators Envelope Tracking Architecture Wideband: 2MHz Envelope bandwidth High switching frequency High PSRR PA Probability 4% 3% 2% 1% Probability density function with dynamic supply PA Efficiency w/o dynamic supply 6% 5% 4% 3% 2% 1% Efficiency AND/ OR Baseband- Envelope Map Envelope Reference Control & PWM Filter Switching Regulator upconversion Vdd Envelope Detect % % db(pmax) - db(pout) Baseband IF LO RF PA RF-Out.

14 Challenge: Power Supply Rejection Supply noise can mix into the RF spectrum, degrading SNR, violating spectral masks (ACPR) New Concept: design for high PSRR P(dB) P(dB) P(dB) -Stauth, Sanders, "Power supply rejection for RF amplifiers," (RFIC) Symposium, June 26

15 Results: MTT Oct 7 A Supply-Signal mixing term: 1 11 ( jw a, jw b ) y S gmo 11 K 1 2y 2 K 2 2gm K 2 K 3 2gmb 2 K 4 2A1 ( jw ) PSRR db A11( jw, jw S ) PSRR db gmo 11 K 1 gm1 2y K 2gm K 2gmb K PSRR=sideband in dbc for 1V (dbv) supply noise tone gmo11 gmo11+go2 gmo11+go2+c2 gmo11* PSRR (dbv) go2* C2* 1 Total PSRR value 1.E+6 4.E+6 1.E+7 5.E+7 2.E+8 7.E+8 3.E+9 1.E+1 Frequency (Hz)

16 Hybrid Linear-Switching Regulators

17 Hybrid Regulator Paradigm Series Hybrid Parallel (shunt) Hybrid VDD Vref + - C L Control/ PWM Ref Linear Regulator Load Switching Regulator Decouple bandwidth-efficiency (audio, AVS digital, PA supply) Fast linear block: (supply dynamic output voltage, attenuate switching regulator harmonics) Slow switching block: (efficient, low cost) Series hybrid drawbacks: low Vdd efficiency, headroom issues

18 Parallel Hybrid Operation Linear Stage: Voltage Follower (Class AB LDO) Switching Stage: Current source Traditional: isr i LOAD Previous work: Optimize in the frequency domain Switching Reg. BW Switching Frequency Linear Reg. BW Dynamic Supply BW -Yousefzadeh, et al. ISCAS 5, PESC 6. -F. Wang et al, MTT-S, June 24. -P. Midya et al. PESC,.

19 This Work: Optimize in the Time Domain Fundamental: many signals may share same power spectrum Phase of signals not represented can be critical for max efficiency in the time domain Consider strong nonlinearities in conversion from Cartesian to polar representation Signal A (V) Signal B (V) PAPR=1.1 db PAPR=5.2 db time (s) Power Spectrum (db/hz) frequency (Hz)

20 Interesting Conclusions Sin-AM, 2-Tone: IS-95 CDMA: Efficiency Sin-AM isr=isr* Sin-AM isr=idc 2-tone isr=isr* 2-tone isr=idc Modulation Amplitude, Normalized (V) Efficiency isr = idc isr = isr* Average Output Power (dbm) Traditional method with isr i LOAD is suboptimal Optimum isr is a function of Vdd, and dynamics of the modulation signal Power savings potentially very large for high PAPR signals, high Vdd

21 Future Work Adaptive optimization Performance tuning

22 Digital Pulse-Density Modulation

23 This work: 1-Bit Linear Transmitter RF Pulse Train Mixer PA Filter Pulse-density modulation process PA at max power or off Inherent linearity Improved efficiency in power backoff

24 Pulse Density Modulation Process AM process Extra harmonics Tradeoff between oversampling ratio & Q Out of band spectrum Efficiency Noise shaping: digital Conclusions No major efficiency advantage with Q<~5-1 Linearity may be the compelling factor (almost) pure digital implementation! Need to run PDM process *as fast as possible* Power spectrum Filter profile Carrier with DSB harmonics

25 PDM Process Sigma-delta Error feedback Spectrum: bandpass in nature Amplitude modulation Noise Shaping

26 PDM Process 1 Time-Domain Waveforms 15 Power Spectral Density Power/frequency (db/hz) Frequency (Hz) Modulate at fraction of carrier frequency out of band harmonics

27 PDM Process 1 Time-Domain Waveforms 15 Power Spectral Density Power/frequency (db/hz) Frequency (Hz) Modulate at fraction of carrier frequency out of band harmonics

28 PDM Process 1 Time-Domain Waveforms 15 Power Spectral Density Power/frequency (db/hz) Frequency (Hz) Modulate at fraction of carrier frequency out of band harmonics

29 Class-D PA 8 Impedance vs Frequency mag(impedance) (ohms) (db) Conventional timing, control Series-Resonant Filter block out of band harmonics High impedance out of band reduce power drawn from supply for wasted energy

30 Architecture This work Upconversion Pulse- Density modulator PA Baseband I Q RFclk o RFclk 9 o 5Ω Pulse- Density modulator PA Q Cartesian Representation Upconversion Noise-Shaped PDM amplitude modulation Independent I-Q processing/upconversion Class-D PA Series resonant bandpass filter/transformer I

31 Behavioral Verification timing, drivers Ideal Components, PDM process Passive network Q~3 Vdd=1.V (assume 9nm CMOS)

32 Ideal no losses in switches, passives

33 Carrier Fundamental Linearity Simulation, expt show good linearity vs pulse density IM3 comparable to good linear PA (range of -2dBc to - 4dBc) Predistortion likely to improve linearity further Output Voltage Amplitude vs Code 3. y = 7.27E-4x E-2x E-1x

34 ClassD PA, 9nm CMOS, Spectre Sim, Q~15 in passives

35 2-tone test

36 Conclusions Efficiency stays high in power backoff Future analysis: comparison of series resonant to parallel resonant output filters for class-d PAs High linearity, compelling argument for this architecture

37 Implementation wo chips: odulator lass D PA timing, drivers 9nm CMOS, voltage (1.V), bond chip-ond

38 Architecture Register Register Multiple stages: RF PDM and Baseband sigmadelta Tradeoff oversampling for power consumption Still have 1-1x oversampling for most standards (edge, Bluetooth, WCDMA, 82.11x)

39 PDM Process 1 Pole-Zero Map.5 Imaginary Axis -.5 ( z) 1 2.5z 1 2.5z 2 z Real Axis -2 POWER (dbm) FREQUENCY (MHz) FREQUENCY (GHz)

40 PA Blocks Level Shift Deadtime Control VHV=2. V PA Drivers Output Stage Delay, 6ps f Vhalf=1. V Vhalf Delay, 6ps Use 2.V to drive for higher output power Maximum Voxide=1.V No resonant switching: need accurate control of gate voltage Recycle current used by high-side switches (excess goes to digital processing block)

41 Results Program I/Q waveforms into FPGA Downconvert/process signals with NI PXI box running labview AM Demodulated Signal m 5.m 25.m. -25.m Plot Results show linear downconverted I/Q waveforms -5.m -75.m u 5.u 75.u 1.u 125.u 15.u 175.u 2.u 225.u Time (sec) 25.u

42 Two-tone spectrum mv tones with 2MHz acing at 1.95GHz rrier MHz of noise aping is functional, oise peaks 5MHz om carrier at fs/2 O leakage tuned with gnal offset Power (dbm) Frequency (GHz)

43 2.11a, 64QAM OFDM Waveform mv tones with 2MHz acing at 1.95GHz rrier MHz of noise aping is functional, oise peaks 5MHz om carrier at fs/2 O leakage tuned with gnal offset Power (dbm) WCDMA Spectrum Frequency (GHz)

44 References [1] A. Jerng and C. G. Sodini, "A Wideband Delta-Sigma Digital-RF Modulator for High Data Rate Transmitters," IEEE Journal of Solid State Circuits, vol. 42, pp , Aug. 27. [2] A. Kavousian, D. K. Su, and B. A. Wooley, "A Digitally Modulated Polar CMOS PA with 2MHz Signal BW," IEEE International Solid State Circuits Conference (ISSCC) Dig. Tech. Papers, pp , 27. [3] S. M. Taleie, T. Copani, B. Bakkaloglu, and S. Kiaei, "A bandpass Delta-Sigma RF-DAC with embedded FIR reconstruction filter," IEEE International Solid State Circuits Conference (ISSCC) Dig. Tech. Papers, pp , 26. [4] R. B. Staszewski, J. Wallberg, S. Rezeq, C.-M. Hung, O. Eliezer, S. Vemulapalli, C. Fernando, K. Maggio, R. Staszewski, N. Barton, M.-C. Lee, P. Cruise, M. Entezari, K. Muhammad, and D. Leipold, "All-digital PLL and GSM/EDGE transmitter in 9nm CMOS," IEEE International Solid State Circuits Conference, vol. 1, pp , Feb. 25. [5] J. Lindeberg, J. Vanakka, J. Sommarek, and K. Halonen, "A 1.5-V direct digital synthesizer with tunable delta-sigma modulator in.12um CMOS," IEEE Journal of Solid State Circuits, vol. 4, pp , Sept. 25. [6] F. Wang, D. Kimball, D. Y. Lie, P. Asbeck, and L. E. Larson, "A Monolithic High-Efficiency 2.4GHz 2dBm SiGe BiCMOS Envelope- Tracking OFDM Power Amplifier," IEEE Journal of Solid State Circuits, vol. 42, pp , June 27.