LITHIUM-ION battery has the advantages of low selfdischarge

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1 871 IEEE TRANSACTIONS ON VEICUAR TECNOOGY, VO. 66, NO. 1, OCTOBER 217 A odularizatio ethod for Battery Equalizers Usig ultiwidig Trasformers Yulog Shag, Studet ember, IEEE, Big Xia, Studet ember, IEEE, Cheghui Zhag, ember, IEEE, Nai Cui, ember, IEEE, Jufeg Yag, Studet ember, IEEE, ad Chris i, Fellow, IEEE Abstract This paper proposes a modularized global architecture usig multi-widig trasformers for battery cell balacig. The global balacig for a series-coected battery strig is achieved based o forward coversio i each battery module ad based o flyback coversio amog modules. The demagetizatio of the multiwidig trasformers is also simultaeously achieved by the flyback coversio amog modules without the eed of additioal demagetizig circuits. oreover, all OSFET switches are drive by two complemetary pulse wih modulatio sigals without the requiremet of cell voltage sesors, ad eergy ca be automatically ad simultaeously delivered from ay high voltage cells to ay low voltage cells. Compared with eistig equalizers requirig additioal balacig circuits for battery modules, the proposed modularized equalizer shares oe circuit for the balacig amog cells ad modules. The balacig performace of the proposed equalizer is perfectly verified through eperimetal results, ad the maimum balacig efficiecy is up to 91.3%. I summary, the proposed modularized equalizer has the advatages of easier modularizatio, simpler cotrol, higher efficiecy, smaller size, ad lower cost, esurig the battery system higher reliability ad easier implemetatio. Ide Terms Electric vehicles (EVs), forward coversio, flyback coversio, lithium-io batteries, multi-widig trasformers, modularized equalizers. auscript received October 1, 216; revised arch 12, 217; accepted April 23, 217. Date of publicatio ay 9, 217; date of curret versio October 13, 217. This work was supported i part by the ajor Scietific Istrumet Developmet Program of the Natioal Natural Sciece Foudatio of Chia uder Grat , i part by the Key Project of Natioal Natural Sciece Foudatio of Chia uder Grat , i part by the Key Research ad Developmet Program of Shadog Provice uder Grat 216ZDJS3A2, i part by the Najig Golde Drago Bus Co., td., i part by the US Departmet of Eergy uder the Graduate Automotive Techology Educatio Ceter program, ad i part by the Chia Scholarship Coucil. The review of this paper was coordiated by A. Chatterjee. (Correspodig author: Chutig Chris i.) Y. Shag is with the School of Cotrol Sciece ad Egieerig, Shadog Uiversity, Jia 2561, Chia, ad also with the Departmet of Electrical ad Computer Egieerig, Sa Diego State Uiversity, Sa Diego, CA USA ( shagyulog@mail.sdu.edu.c). B. Xia is with the Departmet of Electrical ad Computer Egieerig, Sa Diego State Uiversity, Sa Diego, CA USA, ad also with the Departmet of Electrical ad Computer Egieerig, Uiversity of Califoria Sa Diego, CA 9293 USA ( biia@eg.ucsd.edu). C. Zhag ad N. Cui are with the School of Cotrol Sciece ad Egieerig, Shadog Uiversity, Jia 2561, Chia ( zchui@sdu.edu.c; cui@sdu.edu.c). J. Yag is with the Departmet of Electrical Egieerig, Najig Uiversity of Aeroautics ad Astroautics, Najig 21116, Chia, ad also with the Departmet of Electrical ad Computer Egieerig, Sa Diego State Uiversity, Sa Diego, CA USA ( uaayjf@163.com). C. i is with the Departmet of Electrical ad Computer Egieerig, Sa Diego State Uiversity, Sa Diego, CA USA ( mi@ieee.org). Color versios of oe or more of the figures i this paper are available olie at Digital Object Idetifier 1.119/TVT Fig. 1. The battery balacig circuit usig a sigle multi-widig trasformer based o forward coversio [28]. I. INTRODUCTION ITIU-ION battery has the advatages of low selfdischarge rate, high eergy desity, log lifetime, high cell voltage, ad o memory effect, ad is curretly deemed to be oe of the most widespread rechargeable batteries [1] [2]. It has bee widely used i may fields, such as electric vehicles (EVs) [3] [4]. owever, the icosistecy caused by maufacturig ad eviromet leads to the ufavorable toleraces of the capacities ad iteral resistaces of battery cells [5] [6]. Geerally, hudreds or eve thousads of battery cells are coected i series ad parallel to costruct a battery pack i order to meet the voltage ad capacity requiremets of loads. owever, the icosistecy of battery cells will cause the cell voltage imbalace as the repetitive chargig ad dischargig for the battery pack. I fact, chargig or dischargig the cells outside of their allowable voltage rage would result i battery failure, eve eplosio or fire, while boudig chargig ad dischargig whe ay cell i the battery pack reaches its maimum or miimum voltage caot make full use of the eergy of the battery strig [6]. Therefore, battery equalizers are required i order to compesate these imbalaces ad fully use the eergy of the battery strig. There have bee umerous developmets i battery equalizers durig the last few years, such as shut resistor [7], switched capacitors [8] [13], zero-curret switchig (ZCS) switched capacitors [14] [18], buck-boost coverters [19] [21], flyback coverters [22] [25], forward coverters [26] [28], ad forward-flyback coverters [29] [31]. Amog these topologies, trasformer-based solutios [22] [31] have the advatages of high efficiecy, simple cotrol, ad easy isolatio. For eample, i et al. [28] proposes a battery equalizer usig multi-widig trasformers based o forward coversio. As show i Fig. 1, IEEE. Persoal use is permitted, but republicatio/redistributio requires IEEE permissio. See stadards/publicatios/rights/ide.html for more iformatio.

2 SANG et al.: ODUARIZATION ETOD FOR BATTERY EQUAIZERS USING UTIWINDING TRANSFORERS 8711 oe OSFET switch, oe widig of a multi-widig trasformer, ad oe capacitor are eeded for each cell. The biggest advatage of this topology is that eergy ca be directly trasferred from ay higher-voltage cells to ay lower-voltage cells by drivig the OSFETs usig oe PW sigal. owever, the multi-widig trasformer has the problems of mismatchig, bulk size, ad high compleity implemetatio, which is difficult to be applied to a log battery strig with hudreds of cells coected i series. oreover, the mismatched multi widigs will lead to a atural imbalace amog cell voltages. Fortuately, these problems ca be overcome by the modularizatio [32] [33], for which a log battery strig is divided ito modules with y cells i each module. Fig. 2(a) shows the module-based architecture for battery equalizers, where a itra-module ad iter-module equalizers are employed to achieve the global equalizatio. owever, this solutio eeds additioal stage circuits to balace amog modules, resultig i bulky size, high cost, eergy loss, ad high voltage stress o OSFETs. I order to remove the iter-module circuits, a parallel architecture is proposed, as show i Fig. 2(b), which utilizes the magetizig eergy of the trasformers to trasfer eergy amog modules. owever, a dedicated demagetizig circuit (icludig a widig ad a diode, as show by the gree lies) is still madatory for each module, resultig i the low efficiecy, bulk size, mismatchig, comple desig, ad difficult implemetatio. To solve these problems, a modularized automatic equalizer (AE) usig multi-widig trasformers is proposed i this paper. The battery strig is divided ito battery modules with y cells i each module. Oe symmetrical multi-widig trasformer is set for each battery module, ad all the secodary widigs of the trasformers are coected i parallel. Nevertheless, the secodary widigs of the odd modules have the opposite polarities compared with those of the eve modules. Because of these cofiguratios, the global equalizatio is achieved based o forward coversio i each battery module ad flyback coversio amog the modules. oreover, the demagetizatio for the trasformers is also achieved by the flyback coversio amog the modules without the eed of additioal demagetizig circuits. By cotrollig the OSFETs usig two complemetary PW sigals, the proposed AE ca trasfer automatically ad simultaeously eergy from ay higher voltage cells to ay lower voltage cells without the eed of cell voltage sesors. This system has the advatages of smaller size, lower cost, lower voltage stress, ad easier modularizatio compared with eistig methods, which makes the proposed AE be a feasible solutio for EVs. II. TE PROPOSED ODUARIZED EQUAIZER I this paper, a modularized global architecture for battery equalizatio is preseted, which is a modularizatio method of the work i [28]. The global equalizatio is achieved based o forward ad flyback coversio without the eeds of iter-module equalizers, demagetizig circuits, ad cell voltage detectors. A. Cofiguratio of the Proposed AE Fig. 3 shows the schematic diagram of the proposed AE applied to a log battery strig, which is divided ito modules with y cells i each module. The proposed AE cosists of two parts: the primary sides ad the secodary sides. Each primary widig of a multi-widig trasformer coects a OSFET ad a battery cell. The primary widigs of each multi-widig trasformer have the same polarities, which are implemeted by the covetioal forward coverters. The mai fuctio of this stage is to balace the cell voltages i each battery module based o forward coversio. The secodary sides of all the trasformers are coected i parallel, ad they have the same polarities for the odd/eve trasformers, which are also implemeted by the covetioal forward coverters. Nevertheless, the secodary sides of the odd trasformers have the opposite polarities compared with the eve oes, which are implemeted by the covetioal flyback coverters. This complemetary cofiguratio achieves the global equalizatio for the battery strig, ad obtais the demagetizatio for all the trasformers based o flyback coversio. The uique characteristics of the proposed AE are as follows: 1) Oly oe OSFET switch ad oe primary widig are eeded for each cell, thereby leadig to smaller size ad lower cost compared with eistig equalizers. 2) Demagetizig circuits are ot ecessary because the magetizig eergy ca be automatically reset through the complemetary structures of the secodary sides of the trasformers. 3) By cotrollig the OSFET switches usig two PW sigals with complemetary states, automatic ay-cellsto-ay-cells balacig is achieved without the requiremet of cell voltage sesors. 4) The balacig operatio i each module is based o forward coversio, while the balacig operatio amog the modules is based o flyback coversio, by which the global equalizatio for the battery strig is achieved without the eed of iter-module equalizers. 5) Due to the effective demagetizatio for the trasformers, a low voltage stress o the power devices are achieved, thereby esurig a high reliability of the equalizatio circuit. B. Operatio Priciples By drivig the OSFETs usig two complemetary PW sigals for the odd ad eve modules, the proposed equalizer ca achieve the global automatic balacig amog cells without the requiremet of cell moitorig circuits. The proposed equalizer works o the forward ad flyback operatios. The forward operatio is employed to achieve the voltage equalizatio i each battery module. The flyback operatio is employed to achieve the voltage equalizatio amog the modules, ad reset the magetic eergy stored i the trasformers. I order to simplify the aalysis for the operatio modes, the followig assumptios are made:

3 8712 IEEE TRANSACTIONS ON VEICUAR TECNOOGY, VO. 66, NO. 1, OCTOBER 217 Fig. 2. Architectures of the modularized equalizers for a log battery strig [32]. (a) The module-based architecture. (b) The parallel architecture. Fig. 3. The proposed architecture for a log battery strig. Fig. 4. The equivalet circuit of the proposed two-module equalizer. 1) The modularizatio cocept is applied to a battery strig of eight cells, which is modularized ito two separate modules, 1 ad 2, icludig four cells i each module.fig. 4 shows the equivalet circuit of the proposed two-module equalizer. 2) The trasformers have the same parameters, e.g., the same tur umber, magetizig iductace, leakage iductace, ad equivalet resistace of each widig. 3) A PW sigal PW+ is applied to all switches i odule I, ad the complemetary PW sigal PWis applied to all switches i odule II. 4) The iitial cell voltages meet V B 24 >V B 23 >V B 22 > V B 21 >V B 14 >V B 13 >V B 12 >V B 11. Therefore, the voltage of odule II (V 2 = V B 24 + V B 23 + V B 22 + V B 21 ) is higher tha the voltage of odule I (V 1 = V B 14 + V B 13 + V B 12 + V B 11 ).

4 SANG et al.: ODUARIZATION ETOD FOR BATTERY EQUAIZERS USING UTIWINDING TRANSFORERS 8713 Fig. 5. Operatig modes of the proposed equalizer. (a) ode I. (b) ode II. (c) ode III. (d) ode IV. 5) It is specified that the curret flowig ito a battery cell is positive, otherwise is egative. The secodary balacig curret flowig ito the dotted termial of Trasformer I is positive, otherwise is egative. I the steady state, there are four operatig modes durig oe switchig period. Figs. 5 ad 6 preset the operatig modes ad the theoretical waveforms, respectively. ode I ( t t 1 ): At t, all switches Q 21 Q 24 i odule II are tured off, ad all switches Q 11 Q 14 i odule I are tured o. The balacig currets i the primary sides of odule II drop istataeously to zero at t, ad the reset curret is built up i the secodary sides of the trasformers. The balacig currets amog cells i the primary sides of odule I flow automatically through switches Q 11 Q 14 based o forward coversio, as show i Fig. 5(a). Due to V B 14 >V B 13 >V B 12 >V B 11,itca be reasoably assumed that i B 14 flows from the cells to the trasformer, ad i B 11, i B 12, i B 13 flow from the trasformer to the cells. A larger curret flows ito the lower voltage cells, ad a smaller curret flows ito the higher voltage cells, by which the ay-cells-to-ay-cells equalizatio for odule I is automatically achieved based o forward coversio. Durig this mode, the primary voltages of Trasformer I V TP1j ca be epressed as V TP1j = V B 1j + eqp 1j di B 1j + R eqp 1j i B 1j, (1) where j = 1, 2,...,4. V B 1j is the cell voltage of B 1j i odule I. i B 1j is the balacig curret of B 1j. eqp 1j represets the leakage iductace o a primary widig of Trasformer I.

5 8714 IEEE TRANSACTIONS ON VEICUAR TECNOOGY, VO. 66, NO. 1, OCTOBER 217 The loop equatio i the secodary sides of the trasformers ca be represeted by V TS1 + V TS2 +( eqs1 + eqs2 ) di TS1 +(R eqs1 + R eqs2 ) i TS1 =, (4) where i TS1 is the secodary balacig curret. eqs1 ad eqs2 represet the leakage iductaces o the secodary widigs of Trasformer I ad Trasformer II, respectively. R eqs1 ad R eqs2 represet the equivalet resistaces o the secodary widigs of Trasformer I ad Trasformer II, respectively. V TS1 ad V TS2 represet the secodary voltages of Trasformer I ad Trasformer II, respectively, which are determied by V TS1 = N P V TP1 = 4 V 1, (5) V TS2 = N P V TP2 = 4 V 2, (6) where N P is the tur umber of the primary widigs of the trasformers. is the tur umber of the secodary widigs of the trasformers. V TP2 represets the uiform primary voltage of Trasformer II. is the turs ratio of the trasformers, which ca be epressed as = N P. (7) From (4), (5), ad (6), the primary voltages of Trasformer II ca be calculated as Fig. 6. Key waveforms of the proposed modularized equalizer. V TP2j = V TP2 = V TP1 N P ( eqs1 + eqs2 ) di TS1 R eqp 1j represets the equivalet resistace o a primary widig of Trasformer I. Accordig to Faraday s law, the primary widigs of the trasformers should have the same tur umber to achieve the equalizatio amog cells i a battery module. Thus, the primary voltages of Trasformer I satisfy V TP1 = V TP11 = V TP12 = V TP13 = V TP14 = V 1 4, (2) where V TP1 represets the uiform primary voltage of Trasformer I. By solvig (1), the primary balacig curret i B 1j (t) is derived as i B 1j (t) V 1 4V B 1j 4 eqp 1j (t t ). (3) Sice the voltage differece betwee V TP1j ad V B 1j is applied to leakage iductace eqp 1j, balacig curret i B 1j rises liearly from zero, as show i Fig. 6. N P (R eqs1 + R eqs1 ) i TS1, (8) where j = 1, 2,...,4. Whe the secodary balacig curret i TS1 drops to zero, (8) ca be simplified as V TP2 = V TP1. (9) This equatio shows the equalizatio betwee modules ca be achieved i theory. As show i Fig. 5(a), the secodary balacig curret i TS1 chages istataeously its directio at t, which demagetizes the secod trasformer whe Q 21 Q 24 are tured off. The eergy stored i the magetizig iductaces of m 1 ad m 2 durig the last mode is trasferred to the cells i odule I based o flyback coversio, which achieves the equalizatio betwee the two modules. By solvig (4), the secodary balacig curret i TS1 (t) ca be approimatively derived as i TS1 (t) i TS1 (t ) 4 V 2 V 1 eqs1 + eqs2 (t t ). (1) Sice V 2 V 1 >, i TS1 (t) will decrease liearly with a costat slope, as show i Fig. 6.

6 SANG et al.: ODUARIZATION ETOD FOR BATTERY EQUAIZERS USING UTIWINDING TRANSFORERS 8715 Durig this mode, the magetizig currets i m1 (t) ad i m2 (t) i Trasformer I ad Trasformer II ca be determied by i m1 (t) =i m1 (t ) 4 V 1 m 1 (t t ), (11) i m2 (t) =i m2 (t ) 4 V 2 (t t ), (12) m 2 Sice the secodary voltages are reversely applied to the magetizig iductaces m 1 ad m 2, magetizatio currets i m1 (t) ad i m2 (t) will decrease liearly with a costat slope, as show i Fig. 6. As show i Fig. 5(a), the secodary balacig curret i TS1 comes completely from the magetizig curret i m2 of Trasformer II, so we have i TS1 = i m2. (13) The relatioship amog the magetizig currets ad the balacig currets i odule I ca be epressed as N P (i m1 + i m2 )= 4 i B 1j. (14) j=1 The mai fuctio of this mode is to balace the cell voltages of odule I, deliver the eergy stored i magetizig iductaces m 1 ad m 2 to odule I, ad achieve the demagetizatio of the secod trasformer whe switches Q 21 Q 24 are tured off. ode II ( t 1 t 2 ): At t 1, magetizatio curret i m1 drops to zero, ad the icreases i reverse directio, which ca be epressed as i m1 (t) 4 V 1 (t t 1 ). (15) m 1 This shows that the eergy of odule I is stored i magetizig iductace m 1, as show i Fig. 5(b). Durig this mode, the magetizatio curret i m2 i odule II cotiues to decrease liearly, ad will drop to zero at t 2. The cell equalizatio i the primary sides of odule I still goes o. This mode is a trasitio stage that provides pre-coditios for the demagetizatio of the first trasformer whe Q 11 Q 14 are tured off. ode III ( t 2 t 3 ): At t 2, all switches Q 11 Q 14 i odule I are tured off, ad all switches Q 21 Q 24 i odule II are tured o. The balacig currets i the primary sides of odule I drop istataeously to zero at t 2, ad the reset curret is built up i the secodary sides of the trasformers. The balacig currets i the primary sides of odule II flows automatically through Q 21 Q 24 based o forward coversio, as show i Fig. 5(c). Due to V B 24 >V B 23 >V B 22 >V B 21, it is reasoably assumed that i B 21 flows from the secod trasformer to the cell B 21, while i B 22, i B 23, ad i B 24 flow from the cells to the trasformer. This meas that eergy i B 22, B 23, ad B 24 is simultaeously trasferred to B 21. A larger curret flows out of the higher voltage cells, ad a smaller curret flows out of the lower voltage cells, by which the ay-cells-to-ay-cells equalizatio for odule II is automatically achieved based o forward coversio. The primary voltage of Trasformer II V TP2j ca be give as V TP2j = V B 2j + eqp 2j di B 2j + R eqp 2j i B 2j, (16) where j = 1, 2,...,4. V B 2j is the cell voltage of B 2j i odule II. i B 2j is the balacig curret of B 2j. eqp 2j represets the leakage iductace o a primary widig of Trasformer II. R eqp 2j represets the equivalet resistace o a primary widig of Trasformer II. From (16), the primary balacig curret i B 2j (t) ca be derived as i B 2j (t) V 2 4V B 2j 4 eqp 2j (t t 2 ). (17) Based o (17), Fig. 6 shows the primary balacig curret i B 24, which declies liearly from zero. Durig this mode, the loop equatio i the secodary sides of the trasformers ca be represeted by V TS1 + V TS2 +( eqs1 + eqs2 ) di TS1 +(R eqs1 + R eqs2 ) i TS1 =. (18) From (5), (6), ad (18), the primary voltage of Trasformer I ca be obtaied by V TP1 = V TP2 N P ( eqs1 + eqs2 ) di TS1 N P (R eqs1 + R eqs2 ) i TS1. (19) I the secodary sides, whe Q 11 Q 14 are tured off, i m1 flow cotiuously, which forces the secodary curret i TS1 rises istataeously, as show i Fig. 6. This resets Trasformer I without usig ay additioal demagetizig circuits. By (18), the secodary balacig curret i TS1 (t) ca be approimatively calculated as i TS1 (t) i TS1 (t 2 ) 4 V 2 V 1 eqs1 + eqs2 (t t 2 ). (2) Sice V 2 V 1 >, i TS1 (t) will decrease liearly with a costat slope. The magetizig currets i m1 (t) ad i m2 (t) i Trasformer I ad Trasformer II ca be give by i m1 (t) i m1 (t 2 )+ 4 V 1 m 1 (t t 2 ), (21) i m2 (t) 4 V 2 m 2 (t t 2 ). (22) As show i Fig. 5(c), the secodary balacig curret i TS1 comes completely from the magetizig curret i m1 i Trasformer I, havig i TS1 = i m1. (23)

7 8716 IEEE TRANSACTIONS ON VEICUAR TECNOOGY, VO. 66, NO. 1, OCTOBER 217 The relatioship amog the magetizig currets ad the balacig currets i odule II ca be epressed as follows 4 (i m1 + i m2 )= i B 2j. (24) N P j=1 The duratio of this mode is very short, ad the mai fuctio of this mode is to achieve the demagetizatio of Trasformer I whe switches Q 11 Q 14 are tured off. ode IV (t 3 t 4 ): This mode does ot start util the secodary curret i TS1 chages its directio at t 3,asshowi Fig. 5(d). Durig this mode, the cell equalizatio i the primary sides of odule II still goes o. I the secodary sides, the magetizig currets i m1 ad i m2 are built up, by which the eergy of odule II is stored ito the magetizig iductaces m 1 ad m 2. This provides the pre-coditios for the equalizatio betwee the two modules without the eed of additioal balacig circuits. I the secodary sides of the trasformers, a loop equatio ca be achieved by V TS1 + V TS2 +( eqs1 + eqs2 ) di TS1 (R eqs1 + R eqs2 ) i TS1 =. (25) From (5), (6), ad (25), the primary voltage of Trasformer I ca be calculated as V TP1 = V TP2 N P ( eqs1 + eqs2 ) di TS1 + N P (R eqs1 + R eqs1 ) i TS1. (26) By solvig (25), we ca get the secodary balacig curret i TS1 (t) i TS1 (t) 4 V 2 V 1 (t t 3 ). (27) eqs1 + eqs2 The magetizig currets i m1 ad i m2 ca be epressed as i m1 (t) 4 V 1 m 1 (t t 3 ), (28) i m2 (t) i m2 (t 3 )+ 4 V 2 (t t 3 ). (29) m 2 The secodary balacig curret is give by i TS1 = i m1. (3) The mai fuctio of this mode is to achieve the equalizatio amog the cells i odule II ad the eergy storage from odule II ito magetizig iductaces m 1 ad m 2. Accordig to the above operatig modes, magetizig currets i m1 ad i m2 ca flow aturally betwee the two multiwidig trasformers, which cofirms the advatages of the proposed AE without the eed of additioal demagetizig circuits for the trasformers. C. Cosideratio for Trasformers The switch frequecy f, duty cycle D, turs ratio, ad magetizig iductace m are the key desig parameters of the multi-widig trasformers. It is assumed that the maimum cell voltage V ma is 4.2 V, the miimum cell voltage V mi is 3 V, the peak equalizig curret i peak 1 A, ad the switchig frequecy is set as 25 kz. 1) Duty Cycle D: The balacig betwee the two modules is based o flyback coversio. The relatioship betwee the secodary voltages of the two trasformers is determied by V TS1 (I, II) V TS2 (III, IV) = 1 NP 2 1 D N P 1 2 D, (31) where V T S 1 (I,II) represets the secodary voltage of Trasformer I durig odes I ad II. V TS2 (III, IV) represets the secodary voltage of Trasformer II durig odes III ad IV. 1 is the tur umber of the secodary widig of Trasformer I. N P 1 is the tur umber of the primary widigs of Trasformer I. 2 is the tur umber of the secodary widig of Trasformer II. N P 2 is the tur umber of the primary widigs of Trasformer II. Eqquatio (31) ca be deduced as 1 V TS2 (III, IV) D = 2 V TS1 (I, II) + 1 V TS2 (III, IV), (32) where 1 ad 2 are the turs ratios of Trasformers I ad II, respectively, ad ca be epressed as 1 = 1 N P 1, (33) 2 = 2. (34) N P 2 I order to achieve the voltage equalizatio betwee modules, the secodary voltages of Trasformers I ad II should satisfy V TS1 (I, II) = V TS2 (III, IV). (35) By (32) ad (35), the duty cycle D ca be obtaied as D = 1. (36) Equatio (36) shows the duty cycle oly depeds o the turs ratios of the trasformers to achieve the balacig betwee modules. Whe the trasformers have the same parameters, i.e., = 1 = 2, D is calculated as 5%. I additio, to prevet a reverse curret flowig from the low voltage module to the high voltage oe, the flyback coverters should be operated i cotiuous curret mode [24]. Thus, the duty cycle D should also satisfy V DT ma V m 1 + eqs1 (1 D)T mi m 2 + eqs2 V (1 D)T ma V m 2 + eqs2 DT mi m 1 + eqs1, (37) where T is the switchig period. is the turs ratio of the trasformers. By solvig (37), D ca be derived as 41.7% D 58.3%. (38) Therefore, the duty cycle D should be set as 5% to simultaeously achieve the balacig betwee modules ad the cotiuous curret mode of the flyback coverters.

8 SANG et al.: ODUARIZATION ETOD FOR BATTERY EQUAIZERS USING UTIWINDING TRANSFORERS 8717 TABE I PARAETERS OF TE UTI-WINDING TRANSFORERS Trasformer I Trasformer II TP 11 TP 12 TP 13 TP 14 TS 1 TP 21 TP 22 TP 23 TP 24 TS 2 m (μ) eq (μ) R eq (Ω) N P ) Turs Ratio : Accordig to Faraday s law, the primary widigs of a trasformer should have the same tur umber to achieve the equalizatio amog cells i a module. oreover, accordig to (36), the trasformers should also have the same turs ratio ad duty cycle D to achieve the equalizatio betwee modules. I fact, a large turs ratio will result i a high secodary voltage ad a small secodary curret, leadig to a low loss of the secodary widig but a bulk size ad high cost. O the cotrary, a small turs ratio will result i a low secodary voltage ad a large secodary curret, leadig to a high loss of the secodary widig but a small size ad low cost. I geeral, the turs ratio betwee 2 6 is a trade off amog the circuit size, cost, ad balacig efficiecy for the proposed equalizer. 3) agetizig Iductace m : To make full use of the trasformers ad prevet the core saturatio, the peak chargig/dischargig curret durig ay mode is limited to 1 A. The magetizig iductace of the primary widigs of the trasformers ca be obtaied as follows [27] m V ma DT = 84 μ. (39) i peak Actually, a large magetizig iductace will weake the effect of the flyback coversio ad ehace the effect of the forward coversio. Coversely, a small magetizig iductace will ehace the effect of the flyback coversio ad weake the effect of the forward coversio. Therefore, too large or too small magetizig iductace will result i a reductio i the balacig performace. Thus, the magetizig iductace of the primary widigs is optimal to be betwee 1 2 μ, ad the magetizig iductace of the secodary widigs is preferred to be betwee u. From the above aalyses, it ca be cocluded that as log as the multi-widig trasformers have the same turs ratio ad the same duty cycle, i.e., D = 5%, the proposed equalizer ca achieve a ideal balacig effect for a battery strig. Accordig to (1) ad (16), the battery iteral resistace, OSFET oresistace, parasitic capacitace, ad leakage iductace oly affect the balacig curret, ot the fial balaced voltage of the battery strig. III. EXPERIENTA RESUTS To certify the feasibility of the proposed AE, a prototype for eight lithium-io cells, which are divided ito two modules, was implemeted. Fig. 7 shows a picture of the eperimetal Fig. 7. Photograph of the implemeted prototype ad associated istrumets. prototype ad the associated istrumets. STP22N6F7 OSFETs with 2.4-mΩ o-resistace were used for the switches Q 11 Q 14 ad Q 21 Q 24. dspace was used for the digital cotroller. Eight 11-mAh ifepo 4 batteries ad eight 26 mah inicoo 2 batteries were used durig eperimets. The parameters of the multi-widig trasformers are summarized i Table I. Fig. 8 shows the eperimetal waveforms for odule I ad odule II at the frequecy of f = 25 kz. All of the switches i odule I are drive by PW+, ad all of the switches i odule II are drive by the complemetary sigal PW-. The battery cell voltages meet V B 24 >V B 23 >V B 22 >V B 21 > V B 14 >V B 13 >V B 12 >V B 11. Fig. 8(a) shows the primary voltage, curret, ad voltage stress o OSFET switch Q 11. Whe Q 11 are tured o, balacig curret i B 11 flows from the multi-widig trasformer to the battery cell B 11. Due to the voltage differece betwee the primary voltage ad the cell voltage applied to the leakage iductace eq11, i B 11 icreases liearly from to 7 ma. Whe Q 11 is tured off, the maimum voltage stress o Q 11 does ot eceed 2 V eve i the voltage spikes, reducig dv/ of the OSFETs regardless of the cell umber. Fig. 8(b) shows the primary voltages ad currets of odule I ad II. It ca be observed that the equalizatio i odule I ad odule II is eecuted i differet half periods. Battery cell B 11 is charged durig a half period with the peak curret of about 8 ma, ad battery cell B 24 is discharged durig the other half period with the peak curret of about 6 ma. Accordig to (3)

9 8718 IEEE TRANSACTIONS ON VEICUAR TECNOOGY, VO. 66, NO. 1, OCTOBER 217 Fig. 9. easured balacig efficiecy η e. (a) easured efficiecy η e as a fuctio of frequecy. (b) easured efficiecy η e as a fuctio of power at the frequecy of f = 25 kz. Fig. 1. Eperimetal results for eight inicoo 2 cells at f = 25 kz, which are divided ito two four-cell modules. (a) The cell voltage trajectories. (b) The module voltage trajectories. Fig. 8. Eperimetal waveforms for odule I ad odule II. (a) The primary voltage ad curret i odule I. (b) The primary voltages ad currets i odule I ad odule II. (c) The four primary voltages i odule I. (d) The secodary voltages ad secodary curret. ad (17), the calculated peak currets are about 89 ad 67 ma, respectively, which verifies the theoretical aalyses. Fig. 8(c) presets the four primary voltages i odule I. It ca be observed that the four primary voltages are completely equal, i.e., about 3.2V, which proves the correctess of (2). Fig. 8(d) shows the secodary voltages ad curret. Durig Q 11 Q 14 tured-o period, the secodary voltage of the first

10 SANG et al.: ODUARIZATION ETOD FOR BATTERY EQUAIZERS USING UTIWINDING TRANSFORERS 8719 Fig. 11. Eperimetal results with uequal cell umbers i differet modules at f = 25 kz. (a) 4 cells i odule I ad 3 cells i odule II. (b) 4 cells i odule I ad 2 cells i odule II. (c) 3 cells i odule I ad 3 cells i odule II. (d) 3 cells i odule I ad 2 cells i odule II. (e) 2 cells i odule I ad 3 cells i odule II. (f) 2 cells i odule I ad 4 cells i odule II. TABE II BAANCING RESUTS WIT UNEQUA CE NUBERS IN TE TWO ODUES Fig. 11 Balacig time (s) Balaced voltage (V) Voltage gap after balacig (mv) (a) (b) (c) (d) (e) (f) trasformer is built up ad the secodary curret flows from the secod trasformer to the positive polarity of the first trasformer. This meas that the eergy stored i the secod trasformer is trasferred to odule I, which achieves the voltage equalizatio betwee modules. Durig Q21 Q24 tured-o period, the secodary voltage of the secodary trasformer is built up ad the secodary balacig curret flows from the secod trasformer to the egative polarity of the first trasformer. This meas that the eergy of odule II is delivered ad stored ito the magetizig iductace of the first trasformer. The measured peak-to-peak value of the secodary curret is about 164 ma compared with the calculated value, i.e., 183 ma based o (1) ad (27). This result agrees well with the theoretical waveforms of the secodary voltages ad curret, which also proves that the demagetizatio for the trasformers ca be automatically achieved without additioal demagetizig circuits. Fig. 9(a) shows thebalacig efficiecy ηe as a fuctio of frequecy. Balacig efficiecy ηe reaches the maimum value of 91% at the frequecy of f = 25 kz, ad the decreases as the frequecy icreases from 25 to 1 kz. Fig. 9(b) shows the balacig efficiecy ηe as a fuctio of power at the frequecy of f = 25 kz. It ca be see that efficiecy ηe icreases from 8.7% to 91.3% as the icrease of the output power from.176 to.812 W. owever, ηe decreases from 91.3% to 84.5% whe the output power cotiues to icrease to W. Therefore, the proposed AE achieves a high balacig efficiecy over a wide rage of frequecies ad loadig coditios. Fig. 1 shows the eperimetal results for eight inicoo2 cells at f = 25 kz. As show i Fig. 1(a), the iitial cell voltages are 3.528, 3.524, 3.429, 3.165, 3.652, 3.616, 3.621, ad V, respectively, ad the maimum voltage gap is.487 V. It ca be observed that all cell voltages coverge simultaeously toward the average value, showig the ay-cells-to-ay-cells

11 872 IEEE TRANSACTIONS ON VEICUAR TECNOOGY, VO. 66, NO. 1, OCTOBER 217 TABE III COPARISON OF SEVERA BATTERY EQUAIZERS Battery equalizers Dissipative equalizer [7] Classical SC [8] Double-tiered SC [9] Switched-couplig-capacitor [13] Adjacet cell-to-cell resoat SC [14] Direct cell-to-cell resoat SC [17] ultiphase iterleaved equalizer [19] Optimized et-to-et balacig [2] Flyback coverter [22] Forward coverter [28] Forward or flyback coverter [3] Forward-flyback coverter [31] Proposed modularized equalizer Compoets SW R C D T ( + 5) 2( 1) 4( 1) 2( ) ( 1) 1 1 2( ) Speed Efficiecy Cotrol simplicity odularizatio simplicity is the umber of cells i the battery strig. is the umber of battery modules i the battery strig. SC: Switched capacitor. SW: Switches. R: Resistors. : Iductors. C: Capacitors. D: Diodes. T: Trasformers. Fig. 12. Eperimetal result for eight ifepo4 cells at f = 25 kz. balacig performace. After about 58 s, a balaced voltage of V is achieved with the voltage gap of 3 mv amog cells. Fig. 1(b) shows the module voltage trajectories, which are equal at the ed of the balacig. Fig. 11 shows the eperimetal results with uequal cell umbers i differet modules at f = 25 kz. We ca observe that the voltage equalizatio for the cells ad modules is effectively eecuted by the proposed AE eve though there are uequal umbers of cells i the two modules. Table II summarizes the balacig results. These results cofirm that the good performace of the proposed AE is ot affected by the umber of cells i modules ad the combiig forms of the forward ad flyback coversios, demostratig the simple modularizatio of the proposed equalizer. I order to further verify the robustess of the proposed AE, Fig. 12 shows the balacig result for eight ifepo4 cells at f = 25 kz. The iitial cell voltages are set as 3.188, 3.156, 3.99, 2.782, 3.221, 3.21, 3.199, ad V, respectively. The iitial maimum voltage gap amog cells is about.439 V. After about 8898 s, a balaced voltage of V is achieved with the voltage gap of 4 mv amog cells. This result is cosistet with that show i Fig. 1, which proves the proposed AE ca also be applied to other rechargeable batteries without sigificat chage or recalibratio. Fig. 13. Dyamic balacig results for eight ifepo4 cells. (a) Battery charge. (b) Battery discharge. I order to prove the validity of the dyamic equalizatio of the proposed scheme, Fig. 13 shows the balacig results for a eight-ifepo4 -cell battery strig durig the costat-curret chargig ad dischargig. As show i Fig. 13(a), the proposed equalizer coverges the cell voltages together to esure all cells idetically charged. The maimum voltage gap amog cells is reduced greatly from 315 to 7 mv. As show i Fig. 13(b), due to the proposed scheme, all cells are simultaeously discharged to the cut-off voltage with the voltage gap reduced from 196 to 5 mv. It ca be cocluded that the proposed equalizer improves greatly the cosistecy ad the available capacity of the battery

12 SANG et al.: ODUARIZATION ETOD FOR BATTERY EQUAIZERS USING UTIWINDING TRANSFORERS 8721 strig durig the chargig ad dischargig, idicatig a good dyamic balacig performace. IV. COPARISON WIT EXISTING EQUAIZERS Table III illustrates a systematic compariso with eistig battery equalizers i terms of the compoets, balacig speed, efficiecy, cotrol simplicity, ad modularizatio simplicity. The evaluatio criterios for the balacig speed ad efficiecy are preseted i [31]. Besides, cotrol simplicity is evaluated accordig to the cotrol sigal umber, the compleity of geeratig the cotrol sigals, ad the ecessity of cell moitorig. odularizatio simplicity is evaluated accordig to the umber of elemets for the balacig amog modules ad the epadability. The balacig performace parameters are divided ito three scales, of which,, ad represets the high, medium, ad low scales, respectively. From Table III, it ca be observed that the proposed equalizer has the obvious advatages of small size, low cost, high efficiecy, fast balacig speed, ad easy modularizatio because it shares oe circuit for the balacig amog cells ad modules. I coclusio, the proposed topology ca meet the most demads of a log series-coected battery strig to be used i EVs. V. CONCUSION The purpose of this paper is to itroduce a modularizatio method for battery equalizers usig multi-widig trasformers. The cofiguratio of the proposed modularized equalizer, the operatio priciples, the cell balacig performace, ad the compariso with eistig equalizers are preseted. The proposed method does ot eed additioal compoets for the equalizatio amog modules ad the demagetizatio of the multi-widig trasformers, resultig i a small size ad low cost. oreover, by drivig all OSFETs usig two complemetary PW sigals, the proposed equalizer ca automatically ad simultaeously deliver eergy from ay high voltage cells to ay low voltage cells without the eed of cell voltage sesors. I additio, a low voltage stress o all power devices is obtaied, thereby esurig the high reliability of the proposed balacig circuit. The practical implemetatio preseted i this paper has show the good balacig performaces of the proposed equalizer with a simple cotrol ad a high balacig efficiecy of 91.3%. Particularly, the modularizatio of the proposed equalizer is very simple ad is ot restricted by the umber of cells i each module. Therefore, the proposed method is a good cadidate for lithium-io battery strigs with hudreds of cells coected i series to be used i EVs. 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13 8722 IEEE TRANSACTIONS ON VEICUAR TECNOOGY, VO. 66, NO. 1, OCTOBER 217 [25] C.-. Kim,.-Y. Kim, ad G.-W. oo, A modularized charge equalizer usig a battery moitorig IC for series-coected i-io battery strigs i electric vehicles, IEEE Tras. Power Electro., vol. 28, o. 8, pp , Aug [26]. Uo ad A. Kukita, Double-switch equalizer usig parallel-or seriesparallel-resoat iverter ad voltage multiplier for series-coected supercapacitors, IEEE Tras. Power Electro., vol. 29, o. 2, pp , Feb [27]. Arias, J. Sebastiá,. erado, U. Viscarret, ad I. Gil, Practical applicatio of the wave-trap cocept i battery-cell equalizers, IEEE Tras. Power Electro., vol. 3, o. 1, pp , Oct [28] S. i, C. i, ad. Zhag, A high-efficiecy active battery-balacig circuit usig multiwidig trasformer, IEEE Tras. Id. Appl., vol. 49, o. 1, pp , Ja [29]. Uo ad K. Akio, Sigle-switch sigle-trasformer cell voltage equalizer based o forward-flyback resoat iverter ad voltage multiplier for series-coected eergy storage cells, IEEE Tras. Veh. Techol.,vol.63, o. 9, pp , Nov [3] Y. Che, X. iu, Y. Cui, J. Zou, ad S. Yag, A multi-widig trasformer cell-to-cell active equalizatio method for lithium-io batteries with reduced umber of drivig circuits, IEEE Tras. Power Electro., vol. 31, o. 7, pp , Jul [31] Y. Shag et al., A automatic equalizer based o forward-flyback coverter for series-coected battery strigs, IEEE Tras. Id. Electro.,to be published, DOI 1.119/TIE , 217. [32].-S. Park, C.-. Kim, K.-B Park, G.-W. oo, ad J.-. ee, Desig of a charge equalizer based o battery modularizatio, IEEE Tras. Veh. Techol., vol. 58, o. 7, pp , Sep. 29. [33] B. Dog, Y. i, ad Y. a, Parallel architecture for battery charge equalizatio, IEEE Tras. Power Electro., vol. 3, o. 9, pp , Sep Cheghui Zhag ( 14) received the Bachelor s ad aster s degrees i automatio egieerig ad the Ph.D. degree i cotrol theory ad operatioal research from Shadog Uiversity of Techology, Jia, Chia, i 1985, 1988, ad 21, respectively. I 1988, he joied Shadog Uiversity, where he is curretly a Professor of School of Cotrol Sciece ad Egieerig at Shadog Uiversity, the Chief aager of Power Electroic Eergy-savig Techology & Equipmet Research Ceter of Educatio iistry, a Specially Ivited Cheug Kog Scholars Professor by Chia iistry of Educatio, ad a Taisha Scholar Special Adjuct Professor. e is also oe of state-level cadidates of the New Cetury Natioal udred, Thousad ad Te Thousad Talet Project, the Academic eader of Iovatio Team of iistry of Educatio, ad the Chief Epert of the Natioal 863 high techological plaig. is research iterests iclude optimal cotrol of egieerig, power electroics ad motor drives, eergysavig techiques, ad time-delay systems. Nai Cui ( 14) received the B.S. degree i automatio from Tiaji Uiversity, Tiaji, Chia, i 1989, ad the.s. ad Ph.D. degrees i cotrol theory ad applicatios from Shadog Uiversity, Jia, Chia, i 1994 ad 25, respectively. I 1994, she joied Shadog Uiversity, where she is curretly a Full Professor i the School of Cotrol Sciece ad Egieerig. er curret research iterests iclude power electroics, motor drives, automatic cotrol theory ad applicatio, ad battery eergy maagemet system of electric vehicles. Yulog Shag (S 14) received the B.S. degree i automatio from efei Uiversity of Techology, efei, Chia, i 28. Sice 21, he has bee workig toward the Ph.D. degree i the School of Cotrol Sciece ad Egieerig, Shadog Uiversity, Shadog, Chia. I 215, he received the fudig from Chia Scholarship Coucil, ad became a joit Ph.D. i the Departmet of Electrical ad Computer Egieerig, Sa Diego State Uiversity, Califoria, USA. is curret research iterests iclude the desig ad cotrol of battery maagemet systems ad battery equalizers, battery modelig, ad battery state estimatio. Jufeg Yag (S 15) received the B.S. degree i electrical egieerig i 212 from Najig Uiversity of Aeroautics ad Astroautics, Najig, Chia, where he is curretly workig toward the Ph.D. degree (master-doctorate program) i electrical egieerig. I 215, he received the fudig from Chia Scholarship Coucil, ad became a joit Ph.D. i the Departmet of Electrical ad Computer Egieerig, Sa Diego State Uiversity, Sa Diego, CA, USA. is research iterests focus o battery maagemet systems, icludig battery modelig, battery model parameter idetificatio, ad battery state estimatio. Big Xia (S 13) received the B.S. degree i mechaical egieerig from the Uiversity of ichiga, A Arbor, I, USA, ad the B.S. degree i electrical egieerig from Shaghai Jiaotog Uiversity, Shaghai, Chia, i 212. e was a Ph.D. studet i Automotive System Egieerig at Uiversity of ichiga Dearbor betwee witer 213 ad summer 215. Startig from Fall 215, he is a Ph.D. cadidate i the joit Ph.D. program with Sa Diego State Uiversity ad Uiversity of Califoria, Sa Diego, CA, USA. is research iterests focus o batteries, icludig chargig optimizatio, battery safety, ad battery maagemet. Chutig Chris i (S A 1 1 S 3 F 12) received the B.S.E.E. ad.s.e.e. degrees i electrical egieerig from Northwester Polytechical Uiversity, Xi a, Chia, i 1985 ad 1988, respectively. e received the Ph.D. degree i electrical egieerig from the Uiversity of Toroto, Toroto, ON, Caada i 21. e is curretly a Professor ad the Chair of Electrical ad Computer Egieerig ad the Director of the Departmet of Eergy-fuded Graduate Automotive Techology Educatio (GATE) Ceter for Electric Drive Trasportatio, Sa Diego State Uiversity, Sa Diego, CA, USA. Prior to joiig SDSU, he was with i the Uiversity of ichiga, Dearbor, I, USA, from 21 to 215. is research iterests iclude electric drives, power electroics, electric machies, reewable-eergy systems, ad electrical ad hybrid vehicles. e has coducted etesive research ad has published more tha 1 joural papers.