Digital Fundamentals. Logic gates

Transcription

1 Digital Fundamentals Logic gates

2 Objectives Describe the operation of the inverter, the AND gate, and the OR gate Describe the operation of the NAND gate and the NOR gate Express the operation of the NOT, AND, OR, NAND, and NOR gates with Boolean algebra Describe the operation of the exclusive-or and exclusive-nor gates Recognize and use both the distinctive shape logic gate symbols and the rectangular outline logic gate symbols of ANSI/IEEE Standard Construct timing diagrams showing the proper time relationships of inputs and outputs for the various logic gates Make basic comparisons between the major IC technologies - CMOS and TTL Explain how the different series within the CMOS and TTL families differ from each other Define propagation, delay time, power dissipation, speed-power product, and fan-out in relation to logic gates List specific fixed-function integrated circuit devices that contain the various logic gates Use each logic gate in simple applications Troubleshoot logic gates for opens and shorts by using the logic pulser and probe or the oscilloscope Describe the basic concepts of programmable logic Logic gates 2

3 Inverter Check out the file F03-02! Thruth table Logic gates 3

4 AND Gate Logic gates 4

5 Pulsed operation Logic gates 5

6 Logic expressions for an AND gate Logic gates 6

7 Enable/inhibit function with an AND gate AND works as a gate for the clock signal Logic gates 7

8 Seat belt alarm system Logic gates 8

9 OR Gate Logic gates 9

10 Logic gates 10

11 Logic expressions for an OR gate = = = = 1 Logic gates 11

12 Simplified intrusion detection Logic gates 12

13 NAND Gate Logic gates 13

14 Equivalent operations! Logic gates 14

15 Example Logic gates 15

16 Example Logic gates 16

17 Logic gates 17

18 NOR Gate Logic gates 18

19 Equivalent operations! Logic gates 19

20 Example Logic gates 20

21 Logic gates 21

22 Exclusive-OR Gate Logic gates 22

23 Exclusive-NOR Gate Logic gates 23

24 Pulsed operation Logic gates 24

25 Example Logic gates 25

26 Fixed-function logic: IC gates 5V 3V3 Logic gates 26

27 Logic gates 27

28 Fixed-function logic gates - Examples Logic gates 28

29 IC packages Logic gates 29

30 Pin configuration diagrams for some common fixed-function ICs Logic gates 30

31 Logic symbols for hex inverter Logic gates 31

32 Performance characteristics and parameters propagation delay time tphl and t PLH Logic gates 32

33 DC Supply voltage (marked V CC ) With CMOS gates you can use wider supply voltage range: 5V CMOS tolerates supply variations from 2V to 6V, 3V3 CMOS tolerates supply variations from 2V to 3.6V TTL requires stable supply voltage: maximum variation is +/- 10% (i.e. 4.5V to 5.5V) supply current with HIGH ouput Power dissipation (marked P D ) P D = V CC ICCH + 2 I CCL supply current with LOW ouput CMOS power dissipation is usually smaller compared to TTL, but the dissipation depends on frequency (power dissipation for TTL has no frequency dependence). Logic gates 33

34 Input and output logic levels 5V CMOS 5V CMOS TTL TTL 3.5V 4.4V 2V 2.4V 1.5V 0.33V 0.8V 0.4V Speed-power product (SPP) SPP = t P P D can be used to compared devices when considering both the speed and the dissipation power Logic gates 34

35 Fan-out and loading Fan-out is the number of inputs (of the same IC family) that can be connected to its output and still mantain the output voltage levels within specified limits. In CMOS circuits the fan-out is high but depends on frequency thru capacitive effects Logic gates 35

36 Comparison of propagation delay time and power in CMOS and TTL Logic gates 36

37 Logic gates 37

38 Logic gates 38

39 How to read datasheets and find the information you need Logic gates 39

40 Troubleshooting Internal failures An open TTL input acts as a HIGH level Logic gates 40

41 Troubleshooting a NAND gate for an open input Logic gates 41

42 Troubleshooting a NOR gate for an open input Logic gates 42

43 Example Logic gates 43

44 Example Logic gates 44

45 Example Logic gates 45

46 Logic gates 46

47 Programmable arrays OR array Logic gates 47

48 Programmable arrays AND array Logic gates 48

49 Classification of SPLDs PROM Logic gates 49

50 Classification of SPLDs PLA (programmable logic array) Logic gates 50

51 Classification of SPLDs PAL (programmable array logic) Logic gates 51

52 Classification of SPLDs GAL Logic gates 52

53 Summary Logic gates 53

54 Summary Logic gates 54