Reset V. Sense. Output. (S o ) V

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1 ma,. V, Low Dropout Voltage Regulator with and Sense The L4949 is a monolithic integrated. V voltage regulator with a very low dropout and additional functions such as reset and an uncommitted voltage sense comparator. It is designed for supplying microcontroller/microprocessor controlled systems particularly in automotive applications. Features Operating D Supply Voltage Range. V to 2 V Transient Supply Voltage Up to 4 V Extremely Low Quiescent urrent in Standby Mode High Precision Output Voltage. V ±% Output urrent apability Up to ma Very Low Dropout Voltage Less Than.4 V ircuit Sensing The Output Voltage Programmable Pulse Delay Voltage Sense omparator Thermal Shutdown and Short ircuit Protections NV Prefix for Automotive and Other Applications Requiring Site and hange ontrol These are Pb Free Devices PDIP N SUFFIX ASE 626 SOI D SUFFIX ASE 7 MARKING DIAGRAMS SOI EP PD SUFFIX ASE 7A 2 L4949N AWL YYWWG L4949 ALYWD V4949 ALYW Supply Voltage (V ) Preregulator 6. V V Z Output Voltage (V out ) 3 T 4 2. A 6 2 SOI 2W DW SUFFIX ASE 7D L4949DW AWLYYWWG A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or = Pb Free Device Sense Input (S i ) 2 V s Regulator.23 V ref Sense V.23 V Sense Output (S o ) 7 V S i V Z T PIN ONNETIONS V out S o GND GND (Top View) Figure. Representative Block Diagram ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. Semiconductor omponents Industries, LL, 2 November, 2 Rev. 2 Publication Order Number: L4949/D

2 ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit D Operating Supply Voltage V 2 V Transient Supply Voltage (t <. s) V TR 4 V Output urrent I out Internally Limited Output Voltage V out 2 V Sense Input urrent I SI ±. ma Sense Input Voltage V SI V Output Voltages Output V 2 Sense Output V SO 2 Output urrents Output I. Sense Output I SO. Preregulator Output Voltage V Z 7. V Preregulator Output urrent I Z. ma ESD Protection at any pin Human Body Model 2 Machine Model 4 Thermal Resistance, Junction to Air R JA /W P Suffix, DIP Plastic Package, ase 626 D Suffix, SOI Plastic Package, ase 7 2 PD Suffix, SOI EP Plastic Package, ase 7A (Note ) D Suffix, SOI 2 Plastic Package, ase 7D Operating Junction Temperature Range T J 4 to + Storage Temperature Range T stg 6 to + Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability.. Soldered to a 2 mm 2 oz. copper clad FR 4 board. V ma V ELETRIAL HARATERISTIS (V = 4 V, 4 < T A < 2, unless otherwise specified.) haracteristic Symbol Min Typ Max Unit Output Voltage (T A = 2, I out =. ma) V out V Output Voltage (6. V < V < 2 V,. ma < I out < ma) V out V Output Voltage (V = 3 V, t <. s,. ma < I out < ma) V out V Dropout Voltage V drop V I out = ma..2 I out = ma.2.4 I out = ma.3. Input to Output Voltage Difference in Undervoltage ondition V IO.2.4 V (V = 4. V, I out = 3 ma) Line Regulation (6. V < V < 2 V, I out =. ma) Reg line. 2 mv Load Regulation (. ma < I out < ma) Reg load. 3 mv urrent Limit I Lim ma V out = 4. V 2 4 V out = V Quiescent urrent (I out =.3 ma, T A < ) I QSE 26 A Quiescent urrent (I out = ma) I Q. ma 2

3 ELETRIAL HARATERISTIS (continued) (V = 4 V, 4 < T A < 2, unless otherwise specified.) haracteristic Symbol Min Typ Max Unit RESET Threshold Voltage V Resth V out. V Threshold Hysteresis V Resth,hys T A = 2 T A = 4 to +2 3 Pulse Delay ( T = nf, t R s) t ResD ms Reaction Time ( T = nf) t ResR. 3 s Output Low Voltage (R = k to V out, V 3. V) V ResL.4 V Output High Leakage urrent (V =. V) I ResH. A Delay omparator Threshold V Tth 2. V Delay omparator Threshold Hysteresis V Tth, hys mv SENSE Sense Low Threshold (V SI Decreasing =. V to. V) V SOth V Sense Threshold Hysteresis V SOth,hys 2 2 mv Sense Output Low Voltage (V SI.6 V, V 3. V, R SO = k to V out ) V SOL.4 V Sense Output Leakage (V SO =. V, V SI. V) I SOH. A Sense Input urrent I SI... A PREREGULATOR Preregulator Output Voltage (I Z = A) V Z 6.3 V PIN FUNTION DESRIPTION Pin SOI, PDIP Pin SOI EP Pin SOI 2W Symbol Description 9 V Supply Voltage S i Input of Sense omparator 3 3 V Z Output of Preregulator T Delay apacitor 4 7, 4 7 GND Ground 6 6 Output of omparator 7 7 S O Output of Sense omparator 2 V out Main Regulator Output 3,, 9, 3, N No onnect EPAD EPAD onnect to Ground potential or leave unconnected 3

4 TYPIAL HARATERIZATION URVES 6.. ESR Unstable Region V in = 3. V out = F ESR Stable Region V in = 3. V out = F. Stable Region OUTPUT URRENT (ma) Figure 2. ESR Stability Border Vs. Output urrent (Full ESR Range). Unstable Region OUTPUT URRENT (ma) Figure 3. ESR Stability Border Vs. Output urrent (Very Low ESR) Vout, OUTPUT VOLTAGE (V) V = 4 V I out =. ma Vout, OUTPUT VOLTAGE (V) T J = 2 R L =. k R L = T J, JUNTION TEMPERATURE ( ) Figure 4. Output Voltage versus Junction Temperature V, SUPPLY VOLTAGE (V) Figure. Output Voltage versus Supply Voltage 2.4 Vdrop, DROPOUT VOLTAGE (mv) 2 T J = 2 Vdrop, DROPOUT VOLTAGE (mv).3.2. I out = ma I out = ma I out = ma.. I out, OUTPUT URRENT (ma) Figure 6. Dropout Voltage versus Output urrent T J, JUNTION TEMPERATURE ( ) Figure 7. Dropout Voltage versus Junction Temperature 4

5 TYPIAL HARATERIZATION URVES (continued) I Q, QUIESENT URRENT (ma) V = 4 V T J = 2 IQ, QUIESENT URRENT (ma) T J = 2 R L = R L =. k.. I out, OUTPUT URRENT (ma) Figure. Quiescent urrent versus Output urrent V, SUPPLY VOLTAGE (V) Figure 9. Quiescent urrent versus Supply Voltage V, RESET OUTPUT (V) T J = 2 Resistor k from Output to. V V out, OUTPUT VOLTAGE (V) Figure. Output versus Regulator Output Voltage V, RESET THRESHOLD VOLTAGE (V) Upper Threshold Lower Threshold T J, JUNTION TEMPERATURE ( ) Figure. Thresholds versus Junction Temperature 6..4 VSO, SENSE OUTPUT VOLTAGE (V) T J = 2 Resistor k from Sense Output to. V VSI, SENSE INPUT VOLTAGE (V) Upper Threshold Lower Threshold V SI, SENSE INPUT VOLTAGE (V) T J, JUNTION TEMPERATURE ( ) Figure 2. Sense Output versus Sense Input Voltage Figure 3. Sense Thresholds versus Junction Temperature

6 APPLIATION INFORMATION Supply Voltage Transient High supply voltage transients can cause a reset output signal perturbation. For supply voltages greater than. V the circuit shows a high immunity of the reset output against supply transients of more than V/ s. For supply voltages less than. V supply transients of more than.4 V/ s can cause a reset signal perturbation. To improve the transient behavior for supply voltages less than. V a capacitor at Pin 3 can be used. A capacitor at Pin 3 (3. F) also reduces the output noise. 3 V out O V Z (optional) 3 T 4 V bat s V Preregulator 6. V 2. A 6 V Regulator V R SO k k V out S o S i V.23 V ref Sense GND NOTE:. For stability: s. F, O 4.7 F, ESR < at khz 2. Recommended for application: s = O = F Figure 4. Application Schematic 6

7 OPERATING DESRIPTION The L4949 is a monolithic integrated low dropout voltage regulator. Several outstanding features and auxiliary functions are implemented to meet the requirements of supplying microprocessor systems in automotive applications. It is also suitable in other applications where the included functions are required. The modular approach of this device allows the use of other features and functions independently when required. V out. V V out Voltage Regulator The voltage regulator uses an isolated collector vertical PNP transistor as a regulating element. With this structure, very low dropout voltage at currents up to ma is obtained. The dropout operation of the standby regulator is maintained down to 3. V input supply voltage. The output voltage is regulated up to a transient input supply voltage of 3 V. A typical curve showing the standby output voltage as a function of the input supply voltage is shown in Figure 6. The current consumption of the device (quiescent current) is less than 2 A. To reduce the quiescent current peak in the undervoltage region and to improve the transient response in this region, the dropout voltage is controlled. The quiescent current as a function of the supply input voltage is shown in Figure 7. Short ircuit Protection: The maximum output current is internally limited. In case of short circuit, the output current is foldback current limited as described in Figure. IQ, QUIESENT URRENT (ma) V 2. V. V 3 V V Figure 6. Output Voltage versus Supply Voltage T J = R L =.. R L =. k V, SUPPLY VOLTAGE (V) Figure 7. Quiescent urrent versus Supply Voltage Vout (V). 2 2 I out (ma) Figure. Foldback haracteristic of V out Preregulator To improve transient immunity a preregulator stabilizes the internal supply voltage to 6. V. This internal voltage is present at Pin 3 (V Z ). This voltage should not be used as an output because the output capability is very small ( A). This output may be used to improve transient behavior for supply voltages less than. V. In this case a capacitor ( nf. F) must be connected between Pin 3 and GND. If this feature is not used Pin 3 must be left open. 7

8 ircuit The block circuit diagram of the reset circuit is shown in Figure. The reset circuit supervises the output voltage. The reset threshold of 4. V is defined by the internal reference voltage and standby output divider. The reset pulse delay time t RD, is defined by the charge time of an external capacitor T : t RD T x2.v 2. A The reaction time of the reset circuit originates from the discharge time limitation of the reset capacitor T and is proportional to the value of T. The reaction time of the reset circuit increases the noise immunity. Output voltage drops below the reset threshold only marginally longer than the reaction time results in a shorter reset delay time. The nominal reset delay time will be generated for output voltage drops longer than approximately s. The typical reset output waveforms are shown in Figure 9. V out. V VRT +. V UKT 3. V V in V out t R 4 V t.23 V V ref t RD t RR t RD 22 k 2. A Switch On Input Drop Dump Output Overload Switch Off Out Reg T V Figure. ircuit Figure 9. Typical Output Waveforms Sense omparator The sense comparator compares an input signal with an internal voltage reference of typical.23 V. The use of an external voltage divider makes this comparator very flexible in the application. It can be used to supervise the input voltage either before or after a protection diode and to provide additional information to the microprocessor such as low voltage warnings.

9 L4949NG L4949DG L4949DR2G NV4949DG* NV4949PDG* NV4949DR2G* NV4949PDR2G* NV4949DWR2G* ORDERING INFORMATION Device Operating Temperature Range Package Shipping T J = 4 to +2 PDIP SOI SOI SOI SOI EP SOI SOI EP SOI 2W Units / Rail 9 Units / Rail 2 Units / Tape & Reel 9 Units / Rail 9 Units / Rail 2 Units / Tape & Reel 2 Units / Tape & Reel Units / Tape & Reel For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD/D. *NV4949: T low = 4, T high = +2. Guaranteed by design. NV prefix is for automotive and other applications requiring site and change control. 9

10 PAKAGE DIMENSIONS N SUFFIX PLASTI PAKAGE ASE 626 ISSUE L B NOTES:. DIMENSION L TO ENTER OF LEAD WHEN FORMED PARALLEL. 2. PAKAGE ONTOUR OPTIONAL (ROUND OR SQUARE ORNERS). 3. DIMENSIONING AND TOLERANING PER ANSI Y4.M, 92. NOTE 2 T SEATING PLANE H 4 F A N D K G.3 (.) M T A M B M L J M MILLIMETERS INHES DIM MIN MAX MIN MAX A B D F G 2.4 BS. BS H J K L 7.62 BS.3 BS M N SOI 2 WB DW SUFFIX ASE 7D ISSUE G D A H X.2 M B M 2 E h X 4 NOTES:. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANES PER ASME Y4.M, DIMENSIONS D AND E DO NOT INLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION. PER SIDE.. DIMENSION B DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE.3 TOTAL IN EXESS OF B DIMENSION AT MAXIMUM MATERIAL ONDITION. 2X B.2 M T A S X e B B S A A T SEATING PLANE L MILLIMETERS DIM MIN MAX A A..2 B D E e.27 BS H.. h.2.7 L..9 7

11 PAKAGE DIMENSIONS SOI EP PD SUFFIX ASE 7A ISSUE B 2 X X. SEATING PLANE PIN ONE LOATION. E D. A D ÉÉÉ ÉÉÉ 4 e B TOP VIEW SIDE VIEW 2 X A2 D E. A-B EXPOSED PAD.2 2 X X b.2 A-B D A A GAUGE PLANE.2 H F 4 BOTTOM VIEW L (L) DETAIL A G DETAIL A h A A END VIEW c b ÉÉ ÇÇ ÉÉ ÇÇ (b) c SETION A A NOTES:. DIMENSIONS AND TOLERANING PER ASME Y4.M, DIMENSIONS IN MILLIMETERS (ANGLES IN DEGREES). 3. DIMENSION b DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE. MM TOTAL IN EXESS OF THE b DIMENSION AT MAXIMUM MATERIAL ONDITION. 4. DATUMS A AND B TO BE DETERMINED AT DATUM PLANE H. MILLIMETERS DIM MIN MAX A.3.7 A.. A2.3.6 b.3. b.2.4 c.7.2 c.7.23 D 4.9 BS E 6. BS E 3.9 BS e.27 BS L.4.27 L.4 REF F G. 2. h.2. SOLDERING FOOTPRINT* Exposed Pad SALE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

12 PAKAGE DIMENSIONS SOI NB ASE 7 7 ISSUE AJ X B Y A 4 S.2 (.) M Y M K NOTES:. DIMENSIONING AND TOLERANING PER ANSI Y4.M, ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION. (.6) PER SIDE.. DIMENSION D DOES NOT INLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 (.) TOTAL IN EXESS OF THE D DIMENSION AT MAXIMUM MATERIAL ONDITION THRU 7 6 ARE OBSOLETE. NEW STANDARD IS 7 7. Z H G D.2 (.) M Z Y S X S SEATING PLANE. (.4) N X 4 M J MILLIMETERS INHES DIM MIN MAX MIN MAX A B D G.27 BS. BS H J K M N S SOLDERING FOOTPRINT* SALE 6: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLIATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution enter for ON Semiconductor P.O. Box 63, Denver, olorado 27 USA Phone: or Toll Free USA/anada Fax: or Toll Free USA/anada orderlit@onsemi.com N. American Technical Support: 22 9 Toll Free USA/anada Europe, Middle East and Africa Technical Support: Phone: Japan ustomer Focus enter Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative L4949/D

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