NCP565/NCV A Low Dropout Linear Regulator

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1 1.5 A Low Dropout Linear Regulator The NP565/N565 low dropout linear regulator will provide 1.5 A at a fixed output voltage or an adjustable voltage down to.9. The fast loop response and low dropout voltage make this regulator ideal for applications where low voltage and good load transient response are important. Device protection includes current limit, short circuit protection, and thermal shutdown. Features Ultra Fast Transient Response ( 1. s) Low Ground urrent (1.5 ma at Iload = 1.5 A) Low Dropout oltage (.9 at Iload = 1.5 A) Low Noise (28 rms).9 Reference oltage Adjustable Output oltage from 7.7 down to.9 1.2, 1.5, 2.8, 3., 3.3 Fixed Output ersions. Other Fixed oltages Available on Request urrent Limit Protection (3.3 A Typ) Thermal Shutdown Protection (16 ) Pb-Free Packages are Available Typical Applications Servers ASI Power Supplies Post Regulation for Power Supplies onstant urrent Source Tab = Ground Pin 1. N.. 2. in 3. Ground 4. out 5. Adj 2 3 D 2 PAK 3 ASE 936 FIXED Tab = Ground Pin 1. in 2. Ground 3. out xx D 2 PAK 5 ASE 936A ADJUSTABLE DFN6, 3x3.3 ASE 56AX 1 = oltage Rating AJ = Adjustable 12 = = = = = 2.8 MARKING DIAGRAMS N P565D2Txx AWLYWWG N y565d2t AWLYWWG xx = 12 or 33 y = P or A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb-Free P565 MNxx AYWW SOT-223 ASE 318E 1 AYM 565yy yy = oltage Rating 12 = 1.2 A = Assembly Location Y = Year WW = Work Week M = Date ode = Pb-Free Package Tab = out Pin 1. Ground 2. out 3. in (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. Semiconductor omponents Industries, LL, 27 May, 27 - Rev Publication Order Number: NP565/D

2 in in out out in in out out in NP565 out in NP565 ADJ pf R1 out R2 Figure 1. Typical Application Schematic, Fixed Output Figure 2. Typical Application Schematic, Adjustable Output PIN DESRIPTION D 2 PAK 5 D 2 PAK 3 DFN6 SOT-223 Pin No. Adj. ersion Pin No. Fixed ersion Pin No. Adj. ersion Pin No. Fixed ersion Pin No. Fixed ersion Symbol 1-1, 2 1, 2, 5 - N.. - Description in Positive Power Supply Input oltage 3, Tab 2, Tab Ground Power Supply Ground , Tab out Regulated Output oltage Adj This pin is to be connected to the sense resistors on the output. The linear regulator will attempt to maintain.9 between this pin and ground. Refer to the Application Information section for output voltage setting. in out in out oltage Reference Block ref =.9 Output Stage urrent Limit Sense oltage Reference Block ref =.9 Output Stage urrent Limit Sense ADJ Thermal Shutdown Block Thermal Shutdown Block Figure 3. Block Diagram, Fixed Output Figure 4. Block Diagram, Adjustable Output 2

3 ABSOLUTE MAXIMUM RATINGS Rating Symbol alue Unit Input oltage (Note 1) in 18 Output Pin oltage out -.3 to in +.3 Adjust Pin oltage adj -.3 to in +.3 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability. NOTE: This device series contains ESD protection and exceeds the following tests: Human Body Model JESD 22-A114-B Machine Model JESD 22-A115-A THERMAL HARATERISTIS Rating Symbol alue Unit Thermal haracteristics SOT-223 (Notes 1, 2) Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Pin Thermal haracteristics DFN6 (Notes 1, 2) Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Pin Thermal haracteristics D 2 PAK (5ld) (Notes 1, 2) Thermal Resistance, Junction-to-ase Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Pin R JA 17 R JP 12 R JA 176 R JP 37 R J R JA R JP /W /W /W OPERATING RANGES Rating Symbol alue Unit Operating Input oltage (Note 1) in out + DO, 2.5 (Note 3) to 9 Operating Junction Temperature Range T J -4 to 15 Operating Ambient Temperature Range T A -4 to 125 Storage Temperature Range T stg -55 to Refer to Electrical haracteristics and Application Information for Safe Operating Area. 2. As measured using a copper heat spreading area of 5 mm 2, 1 oz copper thickness. 3. Minimum in = ( out + DO ) or 2.5, whichever is higher. 3

4 ELETRIAL HARATERISTIS ( in = out + 1.6, out =.9, T A = 25, in = out = 15 F, unless otherwise noted, Note 4.) haracteristic Symbol Min Typ Max Unit ADJUSTABLE OUTPUT ERSION Reference oltage (1 ma < I out < 1.5 A; out < in < 9. ; T A = -1 to 15 ) ref.882 (-2%) Reference oltage (1 ma < I out < 1.5 A; out < in < 9. ; T A = -4 to 125 ) ref.873 (-3%) (+2%) (+3%) ADJ Pin urrent (Note 5) I Adj na Line Regulation (I out = 1 ma) (Note 5) Reg line % Load Regulation (1 ma < I out < 1.5 A) (Note 5) Reg load % Dropout oltage (I out = 1.5 A, out = 2.5 ) (Note 6) do urrent Limit I lim A Ripple Rejection (12 Hz; I out = 1.5 A) (Note 5) RR db Ripple Rejection (1 khz; I out = 1.5 A) (Note 5) RR db Ground urrent (I out = 1.5 A) I ma Output Noise oltage (f = 1 Hz to 1 khz, I out = 1.5 A) (Note 5) n rms Thermal Shutdown Protection (Note 5) T SHD FIXED OUTPUT OLTAGE ( in = out + 1.6, T A = 25, in = out = 15 F, unless otherwise noted, Note 4.) Output oltage (1 ma < I out < 1.5 A; 2.8 < in < 9. ; T A = -1 to 15 ) 1.2 version Output oltage (1 ma < I out < 1.5 A; 2.8 < in < 9. ; T A = -4 to 125 ) 1.2 version Output oltage (1 ma < I out < 1.5 A; 3.1 < in < 9. ; T A = -1 to 15 ) 1.5 version Output oltage (1 ma < I out < 1.5 A; 3.1 < in < 9. ; T A = -4 to 125 ) 1.5 version Output oltage (1 ma < I out < 1.5 A; 4.4 < in < 9. ; T A = -1 to 15 ) 2.8 version Output oltage (1 ma < I out < 1.5 A; 4.4 < in < 9. ; T A = -4 to 125 ) 2.8 version Output oltage (1 ma < I out < 1.5 A; 4.6 < in < 9. ; T A = -1 to 15 ) 3. version Output oltage (1 ma < I out < 1.5 A; 4.6 < in < 9. ; T A = -4 to 125 ) 3. version Output oltage (1 ma < I out < 1.5 A; 4.9 < in < 9. ; T A = -1 to 15 ) 3.3 version Output oltage (1 ma < I out < 1.5 A; 4.9 < in < 9. ; T A = -4 to 125 ) 3.3 version out (-2%) out (-3%) out 1.47 (-2%) out (-3%) out (-2%) out (-3%) out 2.94 (-2%) out 2.91 (-3%) out (-2%) out 3.21 (-3%) (+2%) (+3%) (+2%) (+3%) (+2%) (+3%) (+2%) (+3%) (+2%) (+3%) Line Regulation (I out = 1 ma) (Note 5) Reg line % Load Regulation (1 ma < I out < 1.5 A) (Note 5) Reg load % Dropout oltage (I out = 1.5 A, out = 2.5 ) (Note 6) do urrent Limit I lim A Ripple Rejection (12 Hz; I out = 1.5 A) (Note 5) RR db Ripple Rejection (1 khz; I out = 1.5 A) (Note 5) RR db Ground urrent (I out = 1.5 A) I ma Output Noise oltage (f = 1 Hz to 1 khz, out = 1.2, I out = 1.5 A) (Note 5) n rms Thermal Shutdown Protection (Note 5) T SHD Performance guaranteed over specified operating conditions by design, guard banded test limits, and/or characterization, production tested at T J = T A = 25. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. Typical values are based on design and/or characterization. 6. Dropout voltage is a measurement of the minimum input/output differential at full load. 4

5 TYPIAL HARATERISTIS ref, REFERENE OLTAGE () in = 2.5 out(nom) =.9 ref, REFERENE OLTAGE () in = 4.9 out(nom) = T J, JUNTION TEMPERATURE ( ) Figure 5. Output oltage vs. Temperature T J, JUNTION TEMPERATURE ( ) Figure 6. Output oltage vs. Temperature I S, SHORT IRUIT URRENT LIMIT (A) in - out, DROPOUT OLTAGE () I out = 1.5 A.8.6 I out = 5 ma T J, JUNTION TEMPERATURE ( ) Figure 7. Short ircuit urrent Limit vs. Temperature T J, JUNTION TEMPERATURE ( ) Figure 8. Dropout oltage vs. Temperature I, GROUND URRENT (ma) I out = 1.5 A I, GROUND URRENT (ma) T J, JUNTION TEMPERATURE ( ) Figure 9. Ground urrent vs. Temperature I out, OUTPUT URRENT (ma) Figure 1. Ground urrent vs. Output urrent 5

6 TYPIAL HARATERISTIS RIPPLE REJETION (db) I out = 1.5 A F, FREQUENY (Hz) Figure 11. Ripple Rejection vs. Frequency ESR ( ) Unstable Stable OUTPUT URRENT (ma) out = 3.3 out = 1 F Figure 12. Output apacitor ESR Stability vs. Output urrent OUTPUT OLTAGE DEIATION (m) in = 4.59 out =.9 OUTPUT OLTAGE DEIATION (m) in = 4.59 out =.9 I out, OUTPUT URRENT (A) I out, OUTPUT URRENT (A) TIME (ns) Figure 13. Load Transient from 1 ma to 1.5 A TIME ( s) Figure 14. Load Transient from 1 ma to 1.5 A OUTPUT OLTAGE DEIATION (m) in = 4.59 out =.9 OUTPUT OLTAGE DEIATION (m) in = 4.59 out = I out, OUTPUT URRENT (A) TIME (ns) Figure 15. Load Transient from 1.5 A to 1 ma I out, OUTPUT URRENT (A) TIME ( s) Figure 16. Load Transient from 1.5 A to 1 ma 6

7 TYPIAL HARATERISTIS NOISE DENSITY (n rms / Hz ) Start 1. khz FREQUENY (khz) in = 3. out =.9 I out = 1 ma Stop 1 khz Figure 17. Noise Density vs. Frequency NOISE DENSITY (n rms / Hz ) Start 1. khz FREQUENY (khz) in = 3. out =.9 I out = 1.5 A Figure 18. Noise Density vs. Frequency Stop 1 khz NOTE: Typical characteristics were measured with the same conditions as electrical characteristics. 7

8 APPLIATION INFORMATION The NP565 low dropout linear regulator provides adjustable voltages at currents up to 1.5 A. It features ultra fast transient response and low dropout voltage. These devices contain output current limiting, short circuit protection and thermal shutdown protection. Input, Output apacitor and Stability An input bypass capacitor is recommended to improve transient response or if the regulator is located more than a few inches from the power source. This will reduce the circuit's sensitivity to the input line impedance at high frequencies and significantly enhance the output transient response. Different types and different sizes of input capacitors can be chosen dependent on the quality of power supply. A 15 F OSON 16SA15M type from Sanyo should be adequate for most applications. The bypass capacitor should be mounted with shortest possible lead or track length directly across the regulator's input terminals. The output capacitor is required for stability. The NP565 remains stable with ceramic, tantalum, and aluminumelectrolytic capacitors with a minimum value of 1. F with ESR between 5 m and 2.5. The NP565 is optimized for use with a 15 F OSON 16SA15M type in parallel with a 1 F OSON 1SL1M type from Sanyo. The 1 F capacitor is used for best A stability while 15 F capacitor is used for achieving excellent output transient response. The output capacitors should be placed as close as possible to the output pin of the device. If not, the excellent load transient response of NP565 will be degraded. GEN Adjustable Operation The typical application circuit for the adjustable output regulators is shown in Figure 2. The adjustable device develops and maintains the nominal.9 reference voltage between Adj and ground pins. A resistor divider network R1 and R2 causes a fixed current to flow to ground. This current creates a voltage across R1 that adds to the.9 across R2 and sets the overall output voltage. The output voltage is set according to the formula: out ref R1 R2 R2 IAdj R2 The adjust pin current, I Adj, is typically 3 na and normally much lower than the current flowing through R1 and R2, thus it generates a small output voltage error that can usually be ignored. Load Transient Measurement Large load current changes are always presented in microprocessor applications. Therefore good load transient performance is required for the power stage. NP565 has the feature of ultra fast transient response. Its load transient responses in Figures 13 through 16 are tested on evaluation board shown in Figure 19. On the evaluation board, it consists of NP565 regulator circuit with decoupling and filter capacitors and the pulse controlled current sink to obtain load current transitions. The load current transitions are measured by current probe. Because the signal from current probe has some time delay, it causes un-synchronization between the load current transition and output voltage response, which is shown in Figures 13 through 16. out Pulse + - in NP565 Evaluation Board RL + Scope oltage Probe Figure 19. Schematic for Transient Response Measurement 8

9 PB Layout onsiderations Good PB layout plays an important role in achieving good load transient performance. Because it is very sensitive to its PB layout, particular care has to be taken when tackling Printed ircuit Board (PB) layout. The figures below give an example of a layout where parasitic elements are minimized. For microprocessor applications it is customary to use an output capacitor network consisting of several capacitors in parallel. This reduces the overall ESR and reduces the instantaneous output voltage drop under transient load conditions. The output capacitor network should be as close as possible to the load for the best results. The schematic of NP565 typical application circuit, which this PB layout is base on, is shown in Figure 2. The output voltage is set to 3.3 for this demonstration board according to the feedback resistors in the Table 1. in 2 in out 4 out NP565 5 N Adj R k R k p Figure 2. Schematic of NP565 Typical Application ircuit Figure 21. Top Layer 9

10 Figure 22. Bottom Layer NP565 ON Semiconductor IN D1 2 R2 R16 3 OUT July, 23 Figure 23. Silkscreen Layer 1

11 Table 1. Bill of Materials for NP565 Adj Demonstration Board Item Used # omponent Designators Suppliers Part Number 1 4 Radial Lead Aluminum apacitor 15 F/16 1, 2, 3, 5 Sanyo Oscon 16SA15M 2 1 Radial Lead Aluminum apacitor 1 F/1 4 Sanyo Oscon 1SL1M 3 1 SMT hip Resistor (85) 15.8 K 1% R2 ishay RW851582F 4 1 SMT hip Resistor (85) 42.2 K 1% R1 ishay RW854222F 5 1 SMT eramic apacitor (63) 5.6 pf 1% 6 ishay J63A5R6KXAA 6 1 NP565 Low Dropout Linear Regulator U1 ON Semiconductor NP565D2TR4 11

12 Protection Diodes When large external capacitors are used with a linear regulator it is sometimes necessary to add protection diodes. If the input voltage of the regulator gets shorted, the output capacitor will discharge into the output of the regulator. The discharge current depends on the value of the capacitor, the output voltage and the rate at which in drops. In the NP565 linear regulator, the discharge path is through a large junction and protection diodes are not usually needed. If the regulator is used with large values of output capacitance and the input voltage is instantaneously shorted to ground, damage can occur. In this case, a diode connected as shown in Figure 24 is recommended. in in 1N42 (Optional) out NP565 Adj 1 Adj R 1 R 2 out 2 Figure 24. Protection Diode for Large Output apacitors Thermal onsiderations This series contains an internal thermal limiting circuit that is designed to protect the regulator in the event that the maximum junction temperature is exceeded. This feature provides protection from a catastrophic device failure due to accidental overheating. It is not intended to be used as a substitute for proper heat sinking. The maximum device power dissipation can be calculated by: JA ( /W) PD T J(max) TA R JA DFN 1 oz u DFN 2 oz u SOT oz u SOT oz u D 2 PAK 1 oz u OPPER HEAT-SPREADER AREA (mm sq) Figure 25. Thermal Resistance D 2 PAK 2 oz u 12

13 ORDERING INFORMATION NP565D2T Device Nominal Output oltage* Package Shipping D 2 PAK 5 NP565D2TG D 2 PAK 5 NP565D2TR4 Adj D 2 PAK 5 NP565D2TR4G D 2 PAK 5 NP565MNADJT2G NP565D2T12 DFN6 D 2 PAK 3 NP565D2T12G D 2 PAK 3 NP565D2T12R4 D 2 PAK 3 NP565D2T12R4G Fixed (1.2 ) D 2 PAK 3 NP565MN12T2G NP565ST12T3G NP565MN15T2G NP565MN28T2G NP565MN3T2G NP565D2T33G Fixed (1.5 ) Fixed (2.8 ) Fixed (3. ) DFN6 SOT-223 DFN6 DFN6 DFN6 NP565D2T33R4G D 2 PAK 3 Fixed (3.3 ) NP565MN33T2G N565D2TG N565D2TR4G Adj D 2 PAK 3 DFN6 D 2 PAK 5 5 Units / Tube 8 / Tape & Reel 3 / Tape & Reel 5 Units / Tube 8 / Tape & Reel 3 / Tape & Reel 4 / Tape & Reel 3 / Tape & Reel 3 / Tape & Reel 3 / Tape & Reel 5 Units / Tube 8 / Tape & Reel 3 / Tape & Reel 5 Units / Tube 8 / Tape & Reel *For other fixed output versions, please contact the factory. The max out available for SOT-223 is 1.2. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. 13

14 PAKAGE DIMENSIONS D 2 PAK 3 D2T SUFFIX ASE ISSUE B B K F J D.1 (.254) M T A G S OPTIONAL HAMFER H N R -T- E M L TERMINAL 4 U P NOTES: 1. DIMENSIONING AND TOLERANING PER ANSI Y14.5M, ONTROLLING DIMENSION: INH. 3. TAB ONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND ESTABLISH A MINIMUM MOUNTING SURFAE FOR TERMINAL DIMENSIONS A AND B DO NOT INLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXEED.25 (.635) MAXIMUM. INHES MILLIMETERS DIM MIN MAX MIN MAX A B D E F.51 REF REF G.1 BS 2.54 BS H J.125 MAX MAX K.5 REF 1.27 REF L M N P R 5 REF 5 REF S.116 REF REF U.2 MIN 5.8 MIN.25 MIN 6.35 MIN SOLDERING FOOTPRINT* SALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 14

15 PAKAGE DIMENSIONS D 2 PAK 5 ASE 936A-2 ISSUE D K B D A S H OPTIONAL HAMFER.1 (.254) M T G R -T- E M N TERMINAL 6 SOLDERING FOOTPRINT* L P U U1 1 NOTES: 1. DIMENSIONING AND TOLERANING PER ANSI Y14.5M, ONTROLLING DIMENSION: INH. 3. TAB ONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND ESTABLISH A MINIMUM MOUNTING SURFAE FOR TERMINAL DIMENSIONS A AND B DO NOT INLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXEED.25 (.635) MAXIMUM. INHES MILLIMETERS DIM MIN MAX MIN MAX A B D E G.67 BS 1.72 BS H K.5 REF 1.27 REF L M N P R 5 REF 5 REF S.116 REF REF U.2 MIN 5.8 MIN.25 MIN 6.35 MIN U SALE 3: mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 15

16 PAKAGE DIMENSIONS SOT-223 (TO-261) ASE 318E-4 ISSUE L D b1 NOTES: 6. DIMENSIONING AND TOLERANING PER ANSI Y14.5M, ONTROLLING DIMENSION: INH..8 (3) H E e1 A1 e b E A L1 MILLIMETERS INHES DIM MIN NOM MAX MIN NOM MAX A A b b c D E e e L H E SOLDERING FOOTPRINT* SALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 16

17 PAKAGE DIMENSIONS DFN6, 3x3.3,.95 PITH ASE 56AX-1 ISSUE O PIN 1 REFERENE 2X 6X.15 2X.1.8 ÇÇÇÇ ÇÇÇÇ.15 6X L D TOP IEW SIDE IEW D X e A B E (A3) A1 K A SEATING PLANE NOTES: 1. DIMENSIONS AND TOLERANING PER ASME Y14.5M, ONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN.25 AND.3 mm FROM TERMINAL. 4. OPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN NOM MAX A A A3.2 REF b D 3. BS D E 3.3 BS E e.95 BS K L L SOLDERING FOOTPRINT* X.5 6X L1 6 4 E PITH 6X b (NOTE 3) BOTTOM IEW.1.5 A B 6X.83 DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. The product described herein (NP565), may be covered by one or more of the following U.S. patents: 5,92,184; 5,834,926. There may be other patents pending. ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer's technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should Buyer purchase or use SILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLIATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution enter for ON Semiconductor P.O. Box 5163, Denver, olorado 8217 USA Phone: or Toll Free USA/anada Fax: or Toll Free USA/anada orderlit@onsemi.com N. American Technical Support: Toll Free USA/anada Europe, Middle East and Africa Technical Support: Phone: Japan ustomer Focus enter Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NP565/D

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