NCS2005. Operational Amplifier, Low Power, 8 MHz GBW, Rail-to-Rail Input-Output

Transcription

1 Operational Amplifier, Low Power, 8 MHz GBW, Rail-to-Rail Input-Output The provides high performance in a wide range of applications. The offers beyond rail to rail input range, full rail to rail output swing, large capacitive load driving ability, and low distortion. The inputs can be driven by voltages that exceed both power supply rails, thus eliminating concerns over exceeding the common mode voltage range. The rail to rail output swing capability provides the maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. Operating on supplies of. V to 3 V, the is excellent for a very wide range of applications in low power systems. With a supply current of.3 ma, the 8 MHz gain bandwidth of this device supports applications where faster speeds are required. Placing the amplifier right at the signal source reduces board size and simplifies signal routing. The is available in a space saving pin SOT 3 package. Features Wide Power Supply Range:. V to 3 V Common Mode Voltage Range Wider than Rail to Rail: V CM =. V to. V S = V Wide Gain bandwidth: 8 MHz typical Low Supply Current:.3 ma typical Stable with a nf Capacitor Load with a Phase Margin V S = V Available in a Space saving pin SOT3 Package These devices are Pb free, Halogen free/bfr Free and are RoHS Compliant Typical Applications Active Filters Voltage Referenced Buffers Sensors and Instrumentation Microphone Amplifiers ASIC Input Drivers Portable Communications PCMCIA Cards OUT V IN+ 3 SOT3 SN SUFFIX CASE 83 + ORDERING INFORMATION V+ IN Device Package Shipping SNTG MARKING DIAGRAM JFKAYW JFK = Specific Device Code A = Assembly Location Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) PIN DIAGRAM (Top View) SOT 3 (Pb Free) 3 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD/D. Semiconductor Components Industries, LLC, March, 9 Rev. Publication Order Number: /D

2 Table. PIN DESCRIPTION Pin Name Type Description OUT Output Amplifier output V Power Negative power supply 3 IN+ Input Non inverting input of amplifier IN Input Inverting input of amplifier V+ Power Positive power supply Table. ABSOLUTE MAXIMUM RATINGS (Note ) rating Symbol Value Units Supply Voltage Range (V+ V ) V S to 3 V Input Voltage Range V CM (V ).3 V to (V+) +.3 V V Differential Input Voltage Range V diff to V Input Pin Current I IN ± ma Output Pin Current (Note ) I OUT ± ma Supply Current I s ma Maximum Junction Temperature (Note 3) T J(max) + C Storage Temperature Range T stg to + C ESD Capability (Note ) Human Body Model Charged Device Model HBM CDM Moisture Sensitivity Level (Note ) MSL Level Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.. Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of C. 3. The maximum power dissipation is a function of T J(MAX), T JA, and T A. The maximum allowable dissipation at any ambient temperature is P d = (T J(max) T A )/T JA. All numbers apply for packages soldered directly to a PC board.. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per JESD A ESD Charged Device Model tested per ANSI/ESD S Moisture Sensitivity Level tested per IPC/JEDEC standard: J STD A Table 3. THERMAL CHARACTERISTICS Parameter Symbol Package Single Layer Board Multi Layer Board Units Thermal Resistance Junction to Ambient (Note ) JA SOT 3 8 (Note ) 3 (Note 7) C/W. Values based on a S standard PCB according to JEDEC 3 with. oz copper and a 3 mm copper area 7. Values based on a SP standard PCB according to JEDEC 7 with. oz copper and a mm copper area Table. OPERATING RANGES Parameter Symbol Min Max Units Power Supply Voltage V S. 3 V Common Mode Input Voltage V CM (V ). (V+) +. V Ambient Temperature T A C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. V

3 Table. ELECTRICAL CHARACTERISTICS AT V SUPPLY Unless otherwise noted, values are referenced to T A = C, V+ = V, V = V, V CM = V+/, and R L > M to V+/. Boldface limits apply from T A = C to C. (Notes 8, 9) Parameter Test Conditions Symbol Min Typ Max Units SUPPLY CHARACTERISTICS Quiescent Supply Current No load I S.3. ma.7 Power Supply Rejection Ratio V S =.7 V to 3 V PSRR 3 db 7 INPUT CHARACTERISTICS Input Offset Voltage V OS. mv Input Offset Voltage Drift V/ T V/ C Input Bias Current V CM = V I IB na V CM = V Input Offset Current V CM = V I OS 7 na V CM = V 7 Input Resistance R IN 9 M Input Capacitance C IN 3 pf Common Mode Rejection Ratio V CM = V to V+ CMRR 73 8 db OUTPUT CHARACTERISTICS High level output voltage I L = ma V OH V Low Level Output Voltage I L = ma V OL 7 3 mv Output Current Capability Sourcing current I OUT ma Sinking current DYNAMIC PERFORMANCE Open Loop Voltage Gain R L = k A VOL 83 7 db Gain Bandwidth Product R L = k GBWP 8. MHz Gain Margin R L = k A M. db Phase Margin R L = k M Slew Rate R L = k SR.8 V/ s Total Harmonic Distortion Plus Noise f IN = khz, A V =, R L = k THD+n. % NOISE PERFORMANCE Voltage Noise Density f = khz e N nv/ Hz 8. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area. 9. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T J = T A = C. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3

4 Table. ELECTRICAL CHARACTERISTICS AT V SUPPLY Unless otherwise noted, values are referenced to T A = C, V+ = V, V = V, V CM = V+/, and R L M to V+/. Boldface limits apply from T A = C to C, unless otherwise noted. (Notes, ) Parameter Test Conditions Symbol Min Typ Max Units SUPPLY CHARACTERISTICS Quiescent Supply Current No load I S. ma Power Supply Rejection Ratio V S =.7 V to 3 V PSRR 3 db 7 INPUT CHARACTERISTICS Input Offset Voltage V OS. mv Input Offset Voltage Drift V/ T V/ C Input Bias Current V CM = V I IB na V CM = V Input Offset Current V CM = V I OS na V CM = V Input Resistance R IN M Input Capacitance C IN 3 pf Common Mode Rejection Ratio V CM = V to V+ CMRR 8 9 db OUTPUT CHARACTERISTICS High level Output Voltage I L = ma V OH.7.83 V Low Level Output Voltage I L = ma V OL 3 mv Output Current Capability Sourcing current I OUT ma Sinking current DYNAMIC PERFORMANCE Open Loop Voltage Gain R L = k A VOL 83 db Gain Bandwidth Product R L = k GBWP 8. MHz Gain Margin R L = k A M. db Phase Margin R L = k M Slew Rate R L = k SR.7 V/ s Total Harmonic Distortion Plus Noise f IN = khz, A V =, R L = k THD+n. % NOISE PERFORMANCE Voltage Noise Density f = khz e N nv/ Hz. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T J = T A = C.

5 Table 7. ELECTRICAL CHARACTERISTICS AT.7 V SUPPLY Unless otherwise noted, values are referenced to T A = C, V+ =.7 V, V = V, V CM = V+/, and R L M to V+/. Boldface limits apply from T A = C to C, unless otherwise noted. (Notes, 3) Parameter Test Conditions Symbol Min Typ Max Units SUPPLY CHARACTERISTICS Quiescent Supply Current No load I S. ma Power Supply Rejection Ratio V S =.7 V to 3 V PSRR 7 3 db INPUT CHARACTERISTICS Input Offset Voltage V OS. mv Input Offset Voltage Drift V/ T V/ C Input Bias Current V CM = V I IB na V CM =.7 V Input Offset Current V CM = V I OS na V CM =.7 V Input Resistance R IN 9 M Input Capacitance C IN 3 pf Common Mode Rejection Ratio V CM = V to V+ CMRR 8 9 db OUTPUT CHARACTERISTICS High Level Output Voltage I L =.7 ma V OH.. V Low Level Output Voltage I L =.7 ma V OL 3 mv Output Current Capability Sourcing current I OUT ma Sinking current DYNAMIC PERFORMANCE Open Loop Voltage Gain R L = k A VOL 73 db Gain Bandwidth Product R L = k GBWP 8. MHz Gain Margin R L = k A M db Phase Margin R L = k M Slew Rate R L = k SR. V/ s Total Harmonic Distortion Plus Noise f IN = khz, A V =, R L = k THD+n. % NOISE PERFORMANCE Voltage Noise Density f = khz e N nv/ Hz. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area. 3.Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at T J = T A = C.

6 TYPICAL CHARACTERISTICS SUPPLY CURRENT (ma) T = C T = C T = C T = 8 C INPUT OFFSET VOLTAGE (mv) V S = ±.3 V T = 8 C T = C T = C T = C SUPPLY VOLTAGE (V) Figure. Quiescent Current Per Channel vs. Supply Voltage INPUT VOLTAGE (V) Figure. Input Offset Voltage vs. Common Mode Input Voltage INPUT OFFSET VOLTAGE (mv) V S = ±. V.. T = 8 C T = C. T = C T = C.. INPUT OFFSET VOLTAGE (mv) T = 8 C T = C T = C V S = ± V 3 T = C 3 INPUT VOLTAGE (V) Figure 3. Input Offset Voltage vs. Common Mode Input Voltage INPUT VOLTAGE (V) Figure. Input Offset Voltage vs. Common Mode Voltage MAGNITUDE (db) / PHASE (deg) GAIN C L = nf C L = pf C L = pf K PHASE K K V S = V R L = k T A = C M M M CMRR (db) V S =.7 V V S =. V V S = V K K K M T = C R L = k M M FREQUENCY (Hz) Figure. Gain and Phase vs. Frequency FREQUENCY (Hz) Figure. CMRR vs. Frequency

7 TYPICAL CHARACTERISTICS PSRR (db) K PSRR+ K PSRR K FREQUENCY (Hz) M Figure 7. PSRR vs. Frequency V S = ±. V T = C V IN = mvpp M M VOLTAGE NOISE (nv/ Hz) K FREQUENCY (Hz) K Figure 8. Input Voltage Noise vs. Frequency K THD+N (%).... V S =.7 V V S =. V V S = V K K A V = R L = k K LOW LEVEL OUTPUT VOLTAGE (V) V S =.7 V T = C T = 8 C T = C T = C 8 8 FREQUENCY (Hz) LOW LEVEL OUTPUT CURRENT (ma) Figure 9. THD+N vs. Frequency Figure. Low Level Output Voltage vs. Output Vs =.7 V HIGH LEVEL OUTPUT VOLTAGE (V) T = 8 C T = C T = C V S =.7 V T = C 8 8 LOW LEVEL OUTPUT VOLTAGE (V)..9 V S = V T = 8 C T = C T = C T = C 8 8 HIGH LEVEL OUTPUT CURRENT (ma) LOW LEVEL OUTPUT CURRENT (ma) Figure. High Level Output Voltage vs. Output Vs =.7 V Figure. Low Level Output Voltage vs. Output Vs = V 7

8 TYPICAL CHARACTERISTICS HIGH LEVEL OUTPUT VOLTAGE (V) 3 V S = V T = 8 C T = C T = C HIGH LEVEL OUTPUT CURRENT (ma) T = C Figure 3. Low Level Output Voltage vs. Output Current LOW LEVEL OUTPUT VOLTAGE (V) V S = V T = 8 C T = C T = C LOW LEVEL OUTPUT CURRENT (ma) T = C Figure. High Level Output Voltage vs. Output Current HIGH LEVEL OUTPUT VOLTAGE (V) V S = V T = C T = 8 C T = C T = C 8 8 VOLTAGE (mv) 7 7 V S = ±. V A V = + R L = k CL =.7 pf Input Output 3 HIGH LEVEL OUTPUT CURRENT (ma) TIME ( s) Figure. Low Level Output Voltage vs. Output Current Figure. Non inverting Small Signal Transient Response VOLTAGE (mv) Input Output V S = ±. V A V = R L = k CL =.7 pf 3 VOLTAGE (V) 3 V S = ±. V A V = + R L = k CL =.7 pf Input Output 3 TIME ( s) TIME ( s) Figure 7. Inverting Small Signal Transient Response Figure 8. Non Inverting Large Signal Transient Response 8

9 TYPICAL CHARACTERISTICS VOLTAGE (V) 3 V S = ±. V A V = + R L = k CL =.7 pf TIME ( s) Input Output Figure 9. Inverting Large Signal Transient Response 3 BIAS CURRENT (na) V S = ±. V 3 Bias Current + Bias Current Offset Current TEMPERATURE ( C) Figure. Input Bias and Offset Current vs. Temperature OFFSET CURRENT (na) 9

10 PACKAGE DIMENSIONS TSOP CASE 83 ISSUE M X X. NOTE T. B. A T B 3 H G A TOP VIEW SIDE VIEW C D X S. C SEATING PLANE C A B J K DETAIL Z END VIEW M DETAIL Z SOLDERING FOOTPRINT* NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y.M, 99.. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED. PER SIDE. DIMENSION A.. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN. FROM BODY. MILLIMETERS DIM MIN MAX A B C D.. G.9 BSC H.. J.. K.. M S SCALE : mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor s product/patent coverage may be accessed at /site/pdf/patent Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 9 E. 3nd Pkwy, Aurora, Colorado USA Phone: or 3 3 Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: 8 98 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative /D