NVMFD5C478NL. Power MOSFET. 40 V, 14.5 m, 29 A, Dual N Channel

Transcription

1 NVMFDC478NL Power MOSFET 4 V, 4. m, 29 A, Dual N Channel Features Small Footprint ( x 6 mm) for Compact Design Low R DS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses NVMFDC478NLWF Wettable Flanks Product AEC Q Qualified and PPAP Capable These Devices are Pb Free and are RoHS Compliant MAXIMUM RATINGS (T J = 2 C unless otherwise noted) Parameter Symbol Value Unit Drain to Source Voltage V DSS 4 V Gate to Source Voltage V GS ±2 V Continuous Drain Current R JC (Notes, 2, 3, 4) Power Dissipation R JC (Notes, 2, 3) Continuous Drain Current R JA (Notes & 3, 4) Power Dissipation R JA (Notes, 3) Steady State Steady State T C = 2 C I D 29 A T C = C 2.6 T C = 2 C P D 23 W T C = C 2 T A = 2 C I D. A T A = C 7. T A = 2 C P D 3. W T A = C. Pulsed Drain Current T A = 2 C, t p = s I DM 98 A Operating Junction and Storage Temperature T J, T stg to +7 Source Current (Body Diode) I S 9 A Single Pulse Drain to Source Avalanche Energy (I L(pk) =.4 A) Lead Temperature for Soldering Purposes (/8 from case for s) C E AS 48 mj T L 26 C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS (Note ) Parameter Symbol Value Unit Junction to Case Steady State (Note 3) R JC 6.4 C/W Junction to Ambient Steady State (Note 3) R JA The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi ( ) is used as required per JESD 2 for packages in which substantially less than % of the heat flows to single case surface. 3. Surface mounted on FR4 board using a 6 mm 2, 2 oz. Cu pad. 4. Continuous DC current rating. Maximum current for pulses as long as second is higher but is dependent on pulse duration and duty cycle. G V (BR)DSS R DS(on) MAX I D MAX 4 V D DFN8, x6 (S8FL) CASE 6BT 4. V 2 4. V Dual Channel S G2 D2 29 A XXXXXX = C478L (NVMFDC478NL) or 478LWF (NVMFDC478NLWF) A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability = Pb Free Package (Note: Microdot may be in either location) S2 MARKING AND PIN CONNECTION DIAGRAM D D S D G XXXXXX D S2 AYWZZ D2 G2 D2 D2 D2 ORDERING INFORMATION See detailed ordering, marking and shipping information on page of this data sheet. Semiconductor Components Industries, LLC, 27 June, 28 Rev. Publication Order Number: NVMFDC478NL/D

2 NVMFDC478NL ELECTRICAL CHARACTERISTICS (T J = 2 C unless otherwise noted) Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage V (BR)DSS V GS = V, I D = 2 A 4 V Zero Gate Voltage Drain Current I DSS VGS = V, T J = 2 C A V DS = 4 V T J = 2 C 2 Gate to Source Leakage Current I GSS V DS = V, V GS = 2 V na ON CHARACTERISTICS (Note ) Gate Threshold Voltage V GS(TH) V GS = V DS, I D = 2 A V Drain to Source On Resistance R DS(on) V GS = V, I D = 7. A m V GS = 4. V, I D = 7. A 2 2 Forward Transconductance g FS V DS = V, I D = A 2 S CHARGES AND CAPACITANCES Input Capacitance C iss 42 pf Output Capacitance C oss V GS = V, f =. MHz, V DS = 2 V 8 Reverse Transfer Capacitance C rss 9 Total Gate Charge Q G(TOT) 8. nc Threshold Gate Charge Q G(TH). nc Gate to Source Charge Q GS V GS = V, V DS = 32 V, I D = 7. A.7 Gate to Drain Charge Q GD.2 Total Gate Charge Q G(TOT) V GS = 4. V, V DS = 32 V, I D = 7. A 3.9 nc SWITCHING CHARACTERISTICS (Note 6) Turn On Delay Time t d(on) 6 ns Rise Time t r V GS = V, V DS = 32 V, 4 Turn Off Delay Time t d(off) I D = 7. A, R G = 8 Fall Time t f 3. DRAIN SOURCE DIODE CHARACTERISTICS Forward Diode Voltage V SD V GS = V, I S = 7. A T J = 2 C.84.2 V T J = 2 C.72 Reverse Recovery Time t RR 7 ns Charge Time t a V GS = V, dl S /dt = A/ s, 7. Discharge Time t b I S = 7. A Reverse Recovery Charge Q RR 6 nc. Pulse Test: Pulse Width 3 s, Duty Cycle 2%. 6. Switching characteristics are independent of operating junction temperatures. 2

3 NVMFDC478NL TYPICAL CHARACTERISTICS V to V 4. V 4 3 V DS = V I D, DRAIN CURRENT (A) V 3.8 V 3.6 V 3.4 V I D, DRAIN CURRENT (A) T J = 2 C T J = 2 C T J = C V DS, DRAIN TO SOURCE VOLTAGE (V) V GS, GATE TO SOURCE VOLTAGE (V) Figure. On Region Characteristics Figure 2. Transfer Characteristics R DS(on), DRAIN TO SOURCE RESISTANCE (m ) T J = 2 C I D = A Figure 3. On Resistance vs. Gate to Source Voltage R DS(on), DRAIN TO SOURCE RESISTANCE (m ) T J = 2 C V GS = V V GS, GATE TO SOURCE VOLTAGE (V) I D, DRAIN CURRENT (A) V GS = 4. V Figure 4. On Resistance vs. Drain Current and Gate Voltage R DS(on), NORMALIZED DRAIN TO SOURCE RESISTANCE V GS = V I D = 7. A T J, JUNCTION TEMPERATURE ( C) Figure. On Resistance Variation with Temperature I DSS, LEAKAGE (na) K K T J = C T J = 2 C T J = 8 C V DS, DRAIN TO SOURCE VOLTAGE (V) 3 4 Figure 6. Drain to Source Leakage Current vs. Voltage 3

4 NVMFDC478NL TYPICAL CHARACTERISTICS C, CAPACITANCE (pf) 4 Q GS Q GD C RSS 3 V GS = V 2 V DS = 32 V T J = 2 C I D = 7. A f = MHz T J = 2 C V DS, DRAIN TO SOURCE VOLTAGE (V) Q G, TOTAL GATE CHARGE (nc) Figure 7. Capacitance Variation C ISS C OSS V GS, GATE TO SOURCE VOLTAGE (V) Figure 8. Gate to Source Voltage vs. Total Charge V GS = V t, TIME (ns) t d(off) t r t d(on) t f V GS = V V DS = 32 V I S, SOURCE CURRENT (A) T J = 2 C T J = 2 C T J = C R G, GATE RESISTANCE ( ) V SD, SOURCE TO DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure. Diode Forward Voltage vs. Current I D, DRAIN CURRENT (A) R DS(on) Limit Thermal Limit Package Limit s. ms ms ms T C = 2 C V GS V Single Pulse V DS, DRAIN TO SOURCE VOLTAGE(V) Figure. Maximum Rated Forward Biased Safe Operating Area I PEAK, (A) T J (initial) = C T J (initial) = 2 C TIME IN AVALANCHE (s) Figure 2. I PEAK vs. Time in Avalanche 4

5 NVMFDC478NL TYPICAL CHARACTERISTICS R JA ( C/W). % Duty Cycle 2% % % 2% % Single Pulse PULSE TIME (sec) Figure 3. Thermal Characteristics DEVICE ORDERING INFORMATION Device Marking Package Shipping NVMFDC478NLTG C478L DFN8 (Pb Free) / Tape & Reel NVMFDC478NLWFTG 478LWF DFN8 (Pb Free) / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D.

6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SCALE 2: PIN ONE IDENTIFIER NOTE 7 NOTE 4. C. C DETAIL B M N 4X G 8 D D 7 6 ÏÏ TOP VIEW SIDE VIEW e 4 8 K D2 D3 BOTTOM VIEW 2X A E.2 C A 4X L 4X b B E E2 DFN8 x6,.27p Dual Flag (SO8FL Dual) CASE 6BT ISSUE E 2X c C SEATING PLANE DETAIL A NOTE 6 K.2 C 8X b. C A B. C NOTE 3 DETAIL A DETAIL B ALTERNATE CONSTRUCTION 4X h A DATE 26 FEB 23 NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN. AND.3 MM FROM THE TERMINAL TIP. 4. PROFILE TOLERANCE APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 6. SEATING PLANE IS DEFINED BY THE TERMINALS. A IS DEFINED AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY. 7. A VISUAL INDICATOR FOR PIN MUST BE LOCATED IN THIS AREA. GENERIC MARKING DIAGRAM* XXXXXX AYWZZ XXXXXX= Specific Device Code A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability *This information is generic. Please refer to device data sheet for actual part marking X.7 SOLDERING FOOTPRINT* 4.6 MILLIMETERS DIM MIN MAX MAX A.9. A. b b c.2.33 D. BSC D D D E 6. BSC E E e.27 BSC G.4..6 h 2 K. K.6 L M N X 2.8 4X X X..27 PITCH. DIMENSION: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: STATUS: NEW STANDARD: Semiconductor Components Industries, LLC, 22 October, 22 Rev. DESCRIPTION: 98AON47E Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed ON SEMICONDUCTOR STANDARD versions are uncontrolled except when stamped CONTROLLED COPY in red. Case Outline Number: DFN8 X6,.27P DUAL FLAG (SO8FL DUAL) PAGE OF XXX 2

7 DOCUMENT NUMBER: 98AON47E PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION. REQ. BY M. RAMOS. 6 APR 2 A CORRECTED SOLDER FOOTPRINT. REQ. BY I. CAMBALIZA. 6 FEB 2 B CORRECTED ERROR IN SOLDER FOOTPRINT SHAPE. REQ. BY I. CAMBALIZA. 29 JUN 2 C CORRECTED MARKING DIAGRAM TO ADD LOT TRACEABILITY. REQ. BY J. CARTER. 2 APR 22 D ADDED DIMENSION K TO BOTTOM VIEW AND TABLE. REQ. BY D. TRUHITTE. JAN 23 E MODIFED DIMENSIONS D & E AND ADDED NOMINAL VALUES. REQ. BY I. MARIANO. 26 FEB 23 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Semiconductor Components Industries, LLC, 23 February, 23 Rev. E Case Outline Number: 6BT

8 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor s product/patent coverage may be accessed at /site/pdf/patent Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 92 E. 32nd Pkwy, Aurora, Colorado 8 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative