NTMD4184PFR2G. Power MOSFET and Schottky Diode -30 V, -4.0 A, Single P-Channel with 20 V, 2.2 A, Schottky Barrier Diode Features

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1 NTMDPF Power MOSFET and Schottky Diode -3 V, -. A, Single P-Channel with V,. A, Schottky Barrier Diode Features FETKY Surface Mount Package Saves Board Space Independent Pin-Out for MOSFET and Schottky Allowing for Design Flexibility Low R DS(on) MOSFET and Low V F Schottky to Minimize Conduction Losses Optimized Gate Charge to Minimize Switching Losses This is a Pb-Free Device Applications Disk Drives DC-DC Converters Printers P-CHANNEL MOSFET V (BR)DSS R DS(on) Max 9 - V -3 V -. V SCHOTTKY DIODE V R Max V F Max V. V I D Max -. A I F Max. A MOSFET MAXIMUM RATINGS ( unless otherwise stated) Rating Symbol Value Unit Drain-to-Source Voltage V DSS -3 V Gate-to-Source Voltage V GS ± V Continuous Drain Current R JA (Note ) T A = C T A = 7 C I D A Power Dissipation R JA (Note ) Continuous Drain Current R JA (Note ) Power Dissipation R JA (Note ) Steady State T A = C P D. W T A = C I D -.3 A T A = 7 C -. T A = C P D.77 W Continuous Drain T A = C I D -. A Current R JA t < s (Note ) T A = 7 C -3. Power Dissipation T A = C P D.3 W R JA t < s (Note ) Pulsed Drain Current T A = C, t p = s I DM - A Operating Junction and Storage Temperature T J, T STG - to C + Source Current (Body Diode) I S -.3 A Lead Temperature for Soldering Purposes (/ from case for s) T L C SCHOTTKY MAXIMUM RATINGS ( unless otherwise stated) Peak Repetitive Reverse Voltage V RRM V DC Blocking Voltage V R V Average Rectified Forward Current, (Note ) Steady State I F. A t < s 3. G S ORDERING INFORMATION Device Package Shipping NTMDPFRG D P-Channel MOSFET SOIC- CASE 7 STYLE MARKING DIAGRAM & PIN ASSIGNMENT PF = Device Code A = Assembly Location Y = Year WW = Work Week = Pb-Free Package SOIC- (Pb-Free) C C D D PF AYWW A A S G /Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD/D. A C Schottky Diode Semiconductor Components Industries, LLC, March, - Rev. Publication Order Number: NTMDPF/D

2 NTMDPF THERMAL RESISTANCE MAXIMUM RATINGS Parameter MOSFET & Schottky Symbol Max Unit Junction-to-Ambient Steady State (Note ) R JA 79 Junction-to-Ambient t s Steady State (Note ) R JA Junction-to-FOOT (Drain) Equivalent to R JC R JF Junction-to-Ambient Steady State (Note ) R JA 3. Surface-mounted on FR board using inch sq pad size, oz Cu.. Surface-mounted on FR board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage V (BR)DSS V GS = V, I D = A -3 V Drain-to-Source Breakdown Voltage V (BR)DSS /T J 3 Temperature Coefficient mv/ C Zero Gate Voltage Drain Current I DSS VGS = V, V DS = - V -. - Gate-to-Source Leakage Current I GSS V DS = V, V GS = ± V ± na ON CHARACTERISTICS (Note 3) Gate Threshold Voltage V GS(TH) V GS = V DS, I D = A V Negative Threshold Temperature Coefficient V GS(TH) /T J. mv/ C Drain-to-Source On Resistance R DS(on) V GS = - V I D = -3. A 7 9 V GS = -. V I D = -. A Forward Transconductance g FS V DS = -. V, I D = -3. A. S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance C ISS 3 Output Capacitance C OSS V GS = V, f =. MHz, V DS = - V Reverse Transfer Capacitance C RSS Threshold Gate Charge Q G(TH) VGS = -. V, VDS = - V,. Gate-to-Source Charge Q GS I D = -3. A. Gate-to-Drain Charge Q GD. Total Gate Charge Q G(TOT) V GS = - V, V DS = - V, I D = -3. A.... SWITCHING CHARACTERISTICS (Note ) Turn-On Delay Time t d(on) 7. Rise Time Turn-Off Delay Time t r t d(off) VGS = - V, VDS = - V, I D = -. A, R G =. 3 Fall Time t f.. DRAIN-TO-SOURCE CHARACTERISTICS Forward Diode Voltage V SD VGS = V V I D = -.3 A.7 Reverse Recovery Time t RR. ns Charge Time t a VGS = V, dis/dt = A/ s, Discharge Time t I S = -.3 A b. Reverse Recovery Time Q RR 7. nc C/W A m pf nc nc ns

3 NTMDPF ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Test Condition Min Typ Max Unit SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit Maximum Instantaneous V F I F =. A.3. V Forward Voltage.3.39 Maximum Instantaneous Reverse Current 3. Pulse Test: pulse width 3 s, duty cycle %.. Switching characteristics are independent of operating junction temperatures. I F =. A....3 I R V R = V.. ma. V R = V... I D, DRAIN CURRENT (A). V V V GS =. V. V. V 3. V 3. V 3. V 3. V 3. V. V. V I D, DRAIN CURRENT (A) V DS V 3 T J = - C V DS, DRAIN-TO-SOURCE VOLTAGE (V) V GS, GATE-TO-SOURCE VOLTAGE (V) Figure. On-Region Characteristics Figure. Transfer Characteristics R DS(on), DRAIN-TO-SOURCE RESISTANCE ( ) ID = 3 A V GS, GATE-TO-SOURCE VOLTAGE (V) R DS(on), DRAIN-TO-SOURCE RESISTANCE ( ) V GS =. V V GS = V I D, DRAIN CURRENT (A) 7 9 Figure 3. On-Resistance vs. Gate Voltage Figure. On-Resistance vs. Drain Current and Gate Voltage 3

4 NTMDPF R DS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) ID = 3 A V GS = V - 7 I DSS, LEAKAGE (na), V GS = V T J = C 3 T J, JUNCTION TEMPERATURE ( C) V DS, DRAIN-TO-SOURCE VOLTAGE (V) Figure. On-Resistance Variation with Temperature Figure. Drain-to-Source Leakage Current vs. Voltage C, CAPACITANCE (pf) 3 3 V GS = V DRAIN-TO-SOURCE VOLTAGE (V) Figure 7. Capacitance Variation C iss C oss V GS, GATE-TO-SOURCE VOLTAGE (V) Q Q C rss 3 QT Q g, TOTAL GATE CHARGE (nc) V GS ID = 3 A Figure. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge t, TIME (ns) V DD = V ID =. A V GS = V t r t d(on) t f t d(off) I S, SOURCE CURRENT (A) V GS = V R G, GATE RESISTANCE ( ) Figure 9. Resistive Switching Time Variation vs. Gate Resistance.... V SD, SOURCE-TO-DRAIN VOLTAGE (V) Figure. Diode Forward Voltage vs. Current.

5 NTMDPF R(t) ( C/W) Single Pulse PULSE TIME (sec) Figure. Thermal Response - R JA at Steady State (min pad) R(t) ( C/W) Single Pulse PULSE TIME (sec) Figure. Thermal Response - R JA at Steady State ( inch sq pad) I F, INSTANTANEOUS FORWARD CURRENT (A).. T J = C.3. T J = - C V F, INSTANTANEOUS FORWARD VOLTAGE (V). I F, INSTANTANEOUS FORWARD CURRENT (A).. T J = C V F, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (V). Figure 3. Typical Forward Voltage Figure. Maximum Forward Voltage

6 NTMDPF I R, REVERSE CURRENT (A) E-3 E-3 E-3 E- E- E- E-9 T J = C I R, MAXIMUM REVERSE CURRENT (A) E-3 E-3 E-3 E- E- E- E-9 T J = C V R, REVERSE VOLTAGE (V) V R, REVERSE VOLTAGE (V) Figure. Typical Reverse Current Figure. Maximum Reverse Current C, CAPACITANCE (pf) V R, REVERSE VOLTAGE (V) Figure 7. Capacitance

7 NTMDPF PACKAGE DIMENSIONS -X- B -Y- A S. (.) M Y SOIC- NB CASE 7-7 ISSUE AH M K NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9.. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION. (.) PER SIDE.. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.7 (.) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.. 7- THRU 7- ARE OBSOLETE. NEW STANDARD IS Z- H G D C. (.) M Z Y S X S SEATING PLANE. (.) N X M J MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D G.7 BSC. BSC H.... J K..7.. M N.... S.... SOLDERING FOOTPRINT*.. STYLE : PIN. ANODE. ANODE 3. SOURCE. GATE. DRAIN. DRAIN 7. CATHODE. CATHODE SCALE : mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. FETKY and Micro are registered trademarks of International Rectifier Corporation. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 3, Denver, Colorado 7 USA Phone: or -3-3 Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: --9 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center -9- Kamimeguro, Meguro-ku, Tokyo, Japan 3- Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. NTMDPF/D

NTMD4820NR2G. Power MOSFET 30 V, 8 A, Dual N Channel, SOIC 8

NTMD4820NR2G. Power MOSFET 30 V, 8 A, Dual N Channel, SOIC 8 NTMDN Power MOSFET V, A, Dual N Channel, SOIC Features Low R DS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Dual SOIC