MJD2955, NJVMJD2955T4G (PNP) MJD3055, NJVMJD3055T4G (NPN) Complementary Power Transistors DPAK For Surface Mount Applications

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1 MJD9, NJVMJD9T4G (PNP) MJD3, NJVMJD3T4G (NPN) Complementary Power Transistors For Surface Mount Applications Designed for general purpose amplifier and low speed switching applications. Features Lead Formed for Surface Mount Applications in Plastic Sleeves (No Suffix) Straight Lead Version in Plastic Sleeves ( Suffix) Electrically Similar to MJE9 and MJE3 DC Current Gain Specified to Amperes High Current GainBandwidth Product f T =. MHz I C = madc Epoxy Meets UL 94 in ESD Ratings: Human Body Model, 3B > 8 V Machine Model, C > 4 V NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ Qualified and PPAP Capable These are PbFree Packages* SILICON POWER TRANSISTORS AMPERES 6 VOLTS, WATTS CASE STYLE CASE 369D STYLE MARKING DIAGRAMS AYWW J xxg AYWW J xxg A = Assembly Location Y = Year WW = Work Week Jxx = Device Code x = 9 or 3 G = PbFree Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, Publication Order Number: February, Rev. MJD9/D

2 MJD9, NJVMJD9T4G (PNP) MJD3, NJVMJD3T4G (NPN) MAXIMUM RATINGS Rating Symbol Max Unit CollectorEmitter Voltage V CEO 6 Vdc CollectorBase Voltage V CB 7 Vdc EmitterBase Voltage V EB Vdc Collector Current I C Adc Base Current I B 6 Adc Total Power T C = C Derate above C Total Power Dissipation (Note T A = C Derate above C P D.6 P D.7.4 Operating and Storage Junction Temperature Range T J, T stg to + C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Safe Area Curves are indicated by Figure. Both limits are applicable and must be observed.. These ratings are applicable when surface mounted on the minimum pad sizes recommended. THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC 6. C/W Thermal Resistance, JunctiontoAmbient (Note ) R JA 7.4 C/W. These ratings are applicable when surface mounted on the minimum pad sizes recommended. ÎÎÎ ELECTRICAL CHARACTERISTICS (T C = C unless otherwise noted) Characteristic Symbol Min Max ÎÎÎ Unit ÎÎÎ OFF CHARACTERISTICS CollectorEmitter Sustaining Voltage (Note 3) V CEO(sus) ÎÎ (I C = 3 madc, I B = ) 6 ÎÎ Vdc Collector Cutoff Current (V CE = 3 Vdc, I B = ) I CEO ÎÎÎ Adc Collector Cutoff Current I CEX ÎÎ madc (V CE = 7 Vdc, V EB(off) =. Vdc). (V CE = 7 Vdc, V EB(off) =. Vdc, T C = C) ÎÎÎ ÎÎÎ Collector Cutoff Current I CBO ÎÎ madc (V CB = 7 Vdc, I E = ). ÎÎÎ (V CB = 7 Vdc, I E =, T C = C) ÎÎÎ Emitter Cutoff Current (V BE = Vdc, I C = ) I EBO. madc ÎÎ ON CHARACTERISTICS ÎÎ DC Current Gain (Note 3) h (I C = 4 Adc, V CE FE ÎÎ = 4 Vdc) (I C = Adc, V CE = 4 Vdc) ÎÎÎ CollectorEmitter Saturation Voltage (Note 3) V CE(sat) ÎÎ (I C = 4 Adc, I B =.4 Adc) (I C = Adc, I B = 3.3 Adc). ÎÎÎ Vdc 8 ÎÎÎ BaseEmitter On Voltage (Note 3) V (I C = 4 Adc, V CE = 4 Vdc) BE(on).8 ÎÎÎ Vdc ÎÎÎ DYNAMIC CHARACTERISTICS CurrentGain Bandwidth Product f T ÎÎ MHz (I C = madc, V CE = Vdc, f = khz) ÎÎ 3. Pulse Test: Pulse Width 3 s, Duty Cycle %. W W/ C W W/ C

3 MJD9, NJVMJD9T4G (PNP) MJD3, NJVMJD3T4G (NPN) ORDERING INFORMATION MJD9G Device Package Type Package Shipping 7 Units / Rail MJD9G 369D 7 Units / Rail MJD9T4G, Tape & Reel NJVMJD9T4G, Tape & Reel MJD3G 7 Units / Rail MJD3T4G, Tape & Reel NJVMJD3T4G, Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. 3

4 MJD9, NJVMJD9T4G (PNP) MJD3, NJVMJD3T4G (NPN) TYPICAL CHARACTERISTICS T A. T C PD, POWER DISSIPATION (WATTS).. T C T A SURFACE MOUNT 7 T, TEMPERATURE ( C) Figure. Power Derating hfe, DC CURRENT GAIN 3 3 T J = C C - C V CE = V t, TIME ( s) t r T J = C V CC = 3 V I C /I B =..7 t V BE(off) V Figure. DC Current Gain Figure 3. TurnOn Time V, VOLTAGE (VOLTS) T J = C V I C /I B = V V CE = V t, TIME ( s) t s t f T J = C V CC = 3 V I C /I B = I B = I B. V I C /I B = Figure 4. On Voltages, MJD Figure. TurnOff Time 4

5 MJD9, NJVMJD9T4G (PNP) MJD3, NJVMJD3T4G (NPN) V, VOLTAGE (VOLTS) T J = C V I C /I B = V V CE = 3 V V I C /I B = V - 9 V s t r, t f ns DUTY CYCLE = % R B - 4 V D V CC + 3 V R B and R C VARIED TO OBTAIN DESIRED CURRENT LEVELS R C SCOPE D MUST BE FAST RECOVERY TYPE, eg: N8 USED ABOVE I B ma MSD6 USED BELOW I B ma Figure 6. On Voltages, MJD9 Figure 7. Switching Time Test Circuit r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) D =..... SINGLE PULSE. R JC(t) = r(t) R JC R JC = 6. C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T J(pk) - T C = P (pk) JC(t) P (pk) t t DUTY CYCLE, D = t /t t, TIME (ms) Figure 8. Thermal Response k IC, COLLECTOR CURRENT (AMP) T J = C s ms ms WIRE BOND LIMIT THERMAL LIMIT T C = C (D =.) SECOND BREAKDOWN LIMIT V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 9. Maximum Forward Bias Safe Operating Area s dc FORWARD BIAS SAFE OPERATING AREA INFORMATION There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 9 is based on T J(pk) = C; T C is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to % provided T J(pk) C. T J(pk) may be calculated from the data in Figure 8. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.

6 MJD9, NJVMJD9T4G (PNP) MJD3, NJVMJD3T4G (NPN) PACKAGE DIMENSIONS CASE ISSUE D L3 L4 b e E b3 4 3 b A D B DETAIL A c. (.3) M C A C c H L GAUGE PLANE L L DETAIL A ROTATED 9 CW A H C NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.M, CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED.6 INCHES PER SIDE. Z. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. INCHES MILLIMETERS DIM MIN MAX MIN MAX A A....3 b b b c SEATING c PLANE D E e.9 BSC.9 BSC H L L.8 REF.74 REF L. BSC. BSC L L4.4. Z SOLDERING FOOTPRINT* STYLE : PIN. BASE. COLLECTOR 3. EMITTER 4. COLLECTOR SCALE 3: mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 6

7 MJD9, NJVMJD9T4G (PNP) MJD3, NJVMJD3T4G (NPN) PACKAGE DIMENSIONS CASE 369D ISSUE C V B R C E NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.M, 98.. CONTROLLING DIMENSION: INCH. S T SEATING PLANE F 4 3 G A K D 3 PL J.3 (.) M T H Z INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D E F G.9 BSC.9 BSC H J K R S V Z STYLE : PIN. BASE. COLLECTOR 3. EMITTER 4. COLLECTOR ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 63, Denver, Colorado 87 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: 8898 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MJD9/D

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