A Line-Frequency Commutated Rectifier Complying with IEC Standards

Transcription

1 A ie-frequecy Commutated Rectifier Complyi with IEC 1-3- Stadards S. Buso, G. Spiazzi Departmet of Electroics ad Iformatics, Uiversity of Padova Via Gradeio 6A Padova - ITAY Tel. (39-49) Fax (39-49) Abstract. Cosumer ad household appliaces require cheap ac/dc power supplies complyi with EMC stadards. The commoly employed passive solutios are bulky ad do ot provide output voltae stabilizatio. Active solutios, based o PFC's with hih-frequecy switchi, provide compactess ad reulatio capability, but are eerally expesive due to the eed for fast-recovery diodes ad complex EMI filters. This paper presets a hih power factor rectifier, based o a modified covetioal rectifier with passive -C filter, which improves both the harmoic cotet of the iput curret ad the power factor, by meas of a low frequecy commutated switch ad a small lie-frequecy trasformer, ad allows to comply with IEC 1-3- stadard with reduced overall iductive compoets volume. I. INTRODUCTION ie-curret harmoic stadards, like IEC-1-3- [1], have led to a reat effort i developi frot-ed AC to DC coverters absorbi lihtly distorted currets. Hih frequecy power factor correctors (PFC s), which draw from the rid a curret early proportioal to the iput voltae, have already bee extesively aalyzed i the literature. Their typical performace is very ood but, for some lare volume applicatios, like household appliaces ad persoal computers they imply a uacceptable icrease of the cost ad complexity of the coversio uit. These applicatios ideed require very cheap ad reliable solutios; therefore, i may cases, passive filters are still used i cojuctio with diode rectifiers. A classical diode bride rectifier ad filter capacitor with a series filter iductor (-C rectifier), ca actually achieve compliace with the stadards, but bulky ad heavy reactive compoets are eeded []. Differet passive cofiuratios are aalyzed i [3], which are derived from the classical -C filter by addi aother capacitor iside the rectifier or eve aother diode [4]. The result is a substatial improvemet of the harmoic cotet of the absorbed curret ad power factor. However, such solutios are effective for a iput power up to 3 W, eve taki ito accout the Class A limits of IEC 1-3- [1]. Moreover, bei completely passive, these solutios do ot provide ay kid of output voltae stabilizatio. This paper discusses a hih power factor rectifier, based o a modified covetioal rectifier with passive -C filter, which icludes, as the mai additioal elemets, a low frequecy commutated switch (twice the lie frequecy), two diodes ad a small lie frequecy trasformer. This approach improves both the harmoic cotet of the lie curret ad the power factor ad therefore allows compliace with the stadards with a much smaller iductive compoets volume as compared to fully passive rectifiers. Moreover, the boost actio achieved by the switch operatio allows the proposed rectifier to compesate for the iput iductor voltae drop ad to reulate the rectified output voltae i a wide load rae. Fially, the rectifier exhibits limited di/dt ad dv/dt, which imply reduced hih frequecy EMI eeratio, ad very small switchi losses, which allow to et a quite hih overall efficiecy. II. INE-FREQUENCY COMMUTATED RECTIFIER The scheme of the proposed modified rectifier is show i Fi. 1. The basic structure is that of the usual rectifier with a -C filter, where a additioal switchi uit is iserted. Such uit cosists of a low-frequecy commutated switch, two diodes ad a lie-frequecy trasformer which is reset by the secodary side capacitor C r. All the elemets of the switchi uit, with the exceptio of diode D (which ca be a slow-recovery diode), are rated for oly a small fractio of the output power. The switch is tured o oly twice per lie period, thus allowi reduced di/dt, dv/dt ad losses. The operatio of the circuit depicted i Fi. 1, mometarily electi the trasformer maetizi curret, ca be explaied as follows: the switch is tured o with a costat delay T d after the zero crossi of the lie voltae causi a fractio / 1 of the output voltae to appear i series to the iductor with the riht polarity to cause the premature bride diode tur-o (diode D is off i this iterval). As a cosequece, the iductor curret starts to i u D u C i - - S D 1 1 C r Switchi uit R Fi. 1 - Scheme of the low frequecy commutated rectifier U o /99/$1. (c) 1999 IEEE

2 icrease earlier with respect to the atural diode tur-o istat, as show by Fi.. The duratio of the switch o-time T ON is cotrolled by a output voltae reulator ad is limited to a maximum level to avoid the trasformer saturatio. Thus a simple curret limiti protectio of the switch is also iheretly implemeted. As the switch turs off, diode D starts to coduct ad the filter iductor resoates with the output capacitor. The iput curret waveform equatios, electi the output voltae ripple, are ive by the followi expressios:.83ms T ON T OFF Class D template 1. iterval T ON : T d t T d T ON i U ω o () t = cos( ωtd) cos( ωt) 1 1 ω( t T d) U U where = 1 / is the trasformer turs ratio,. iterval T OFF : T d T ON t T d T ON T OFF () (1) i t = I U U o cos( ω( Td TON) ) cos( ωt) ω( t Td TON) ω U () where I is the iput curret value at the ed of the T ON iterval. The the iductor curret oes to zero ad diode D turs off toether with the bride diodes. I the practical implemetatio a reset circuitry must be provided to make sure the maetizi curret is forced to zero at the ed of each period. This is achieved by capacitor C r. To explai the reset process let us refer to Fi. 3a which reports the trasformer widi currets i pri ad i sec ad the voltae across the reset capacitor C r. Duri the switch o-time, the output voltae is applied to the trasformer primary widi ad its maetizi curret i µ icreases liearly accordi to the relatio: Uo iµ () t = t (3) µ where µ is the primary maetizi iductace. Duri the same iterval the secodary widi curret i sec coicides with the iput curret. Note that due to a residual voltae across capacitor C r at the beii of the T ON iterval, the iput curret does ot follow the behavior predicted by (1); istead, the iput iductor iitially resoates with C r util it is completely dischared, causi the iput curret waveshape show i Fi. 3a to differ slihtly from the ideal case of Fi.. Whe the switch turs off, i µ trasfers to the secodary widi ad chares capacitor C r flowi throuh diode D, which ow coducts the sum of the iput curret ad the maetizi curret reflected to the secodary side. Thus, a resoat oscillatio betwee capacitor C r ad T d [ms] Fi. - Iput curret waveform (1 A/div) of low-frequecy PFC ad Class D template (U i = V rms, P o=3 W, T d = 3 ms, T ON =.7 ms). maetizi iductace µ takes place. Note that the resoat frequecy ca be selected low eouh to cause the iput curret to o to zero whe i µ is still reater tha zero, thus miimizi the switch voltae stress. I fact, the maetizi curret ad capacitor C r voltae duri this iterval are ive by: iµ () t = Iµ cos( ωrt) (4) ucr () t = ZrIµ si( ωrt) where U o Iµ = T ON, ω r =, ad Zr µ µ C = 1 µ r C. r Thus the hihest C r value should be chose which esures the trasformer reset, ad this oal is achieved whe the resoace period is chose to be four times the miimum available reset time, i.e.: T π Tr = 4 TON max, Tr = (5) ω r where T is lie period. I this way, assumi the reset capacitor C r is completely dischared duri the switch otime, the switch voltae stress is miimized ad is ive by: T ON max US = Uo 1 π T T (6) ONmax This result holds o the hypothesis that the switch o-time is lo eouh to completely dischare C r duri T ON, as show i Fi. 3a. If this is ot the case, the voltae across C r stabilizes aroud a averae value which uaratees the trasformer reset. At the limit of a costat voltae across it, the switch voltae stress becomes: T ON max US = Uo 1 T T (7) ONmax /99/$1. (c) 1999 IEEE

3 a) u Cr i sec T d T ON T RESET If the latter coditio holds at omial power, the, i theory, there is o eed for diode D 1. However, a small diode should be used i order to prevet the reversal of the voltae across the electrolytic capacitor C r duri trasiet coditios. I order to complete the aalysis, Fi. 3b shows the circuit behavior with a reduced C r value which causes iterval T r / 4 to be lower tha iterval T OFF : i additio to the hiher peak voltae across it as compared to the previous case, which reflects to the trasformer primary widi, we ca observe that i µ ca ow reverse ad at istat t * it becomes equal i maitude to the iput curret, but of opposite polarity. At that poit diode D stops coducti, the iput curret ad the secodary maetizi curret remai equal, ad o to zero, thus completely the reset iterval. III. MODIFIED RECTIFIER APPICABIITY As clearly demostrated i [3] ad [4], there is a wide variety of simple modificatios of the covetioal -C diode rectifier which allow to achieve the compliace with the IEC 1-3- stadard for loads havi a rated power lower tha 3 W. The basic idea is to exploit the differece betwee the absolute harmoic limitatios applied to class A loads ad the relative limitatios applied to class D loads [1]. As kow, the differece ca be remarkable especially for low power applicatios. Thus, the oal of these modified rectifiers is to chae the shape of the iput curret so as to stay outside the Class D template, also show i Fi., for at i pri u Cr i sec i pri T d T ON T RESET t * b) Fi. 3 - Key waveforms duri the trasformer reset. a) T r > 4T OFF; b) T r < 4T OFF least 5% of the lie half period, i.e..5 ms if the lie frequecy is 5 Hz. For the low-power rae of applicatios these solutios are surely cost-effective. If the required output power is i the rae betwee 3 W ad 6 W, the same basic idea ca be applied, but the simple solutios proposed i [3] may be effectively replaced by a coverter, such as the low frequecy commutated boost preseted i [5] ad [6]. The same effect ca be achieved also by the modified rectifier proposed i this paper. As a compariso, let us cosider the case of a stadard diode-capacitor rectifier with iductive filter. The scheme is the same of Fi. 1 without the switchi uit. For a iput voltae U i of V rms (which is the miimum voltae cosidered by IEC 1-3-) ad a rated power of 3 W, the miimum value of iductor, which allows compliace with the stadard, is 19 mh (C =x47 µf). I this case, the output voltae at the rated curret is 76 V, due to the iductor voltae drop. As well kow, the resulti lie curret waveform classifies the rectifier as a Class D piece of equipmet. The maximum power deliverable by the equipmet is limited by the third harmoic as stated also i []. The switchi uit added to the stadard passive -C filter show i Fi. 1 ca achieve class A curret absorptio. The correspodi curret draw by the lie for the same operati coditios, i.e. U i = V rms ad P o = 3 W, is show i Fi.. The fiure shows that the iput curret waveform stays outside the Class D template for more tha 5% of the lie half-period, thus the rectifier is ow i Class A (it is importat to remember that the Class D template must be cetered to the hihest curret peak ad scaled accordily). As a cosequece, the filter iductor eeded to comply with the stadard, at this power level, reduces to 4 mh. As it will be explaied i the followi, the trasformer has both a stored eery ad a lobal size which is cosiderably smaller tha the iductor s. Therefore, the coverter actually reduces the total maetic material required to comply with the stadard, with respect to the passive solutio. A cosequece of the switchi uit operatio is that the maximum load power is limited by the hih-order harmoics (i this case 15 th harmoic). The output voltae is stabilized at about 3 V, thaks to the lower iductor voltae drop ad to the boost effect of the switchi uit. Nevertheless, the solutio proposed i [6], achieves the compliace almost with the same iductace value ad bei a little bit simpler, it is probably the preferred choice for this power rae. If the required output power is hiher tha 6 W, the load is cosidered i class A, o matter the curret waveform. The modified rectifier has o loer the aim of modifyi the iput curret to stay out of the class D template, but simply to improve the curret harmoic cotet. The boost coverter proposed i [5] ad [6] requires iductor values i the rae aroud 5 mh to achieve this oal. The solutio we discuss here requires almost the same iductor. For istace, at P o = 6W, 6 mh are eouh to /99/$1. (c) 1999 IEEE

4 comply with the stadard. The presece of the trasformer makes the boost solutio still preferable. Table I sums up all of these comparative cosideratios icludi also other relevat data. To derive the Table, for differet power levels rai from 3 up to 9 W, a passive -C rectifier (P) is simulated toether with the proposed active rectifier (A 1 ) ad the boost rectifier (A ). For each power level listed i the Table the followi data were collected: averae output voltae U o, iductor curret value esuri compliace with the stadard (Class D for the passive solutio up to 6 W ad Class A for the active oes ad for hiher output power), peak iductor curret, peak eery E i the iductor (E =.5 I peak), iput curret RMS value I rms, distortio factor DF = I 1rms /I rms, displacemet factor cos(φ 1 ), power factor PF = DF cos(φ 1 ), peak-to-peak output voltae ripple u o. By compari the results, ad taki ito accout the previous remark o the trasformer size, it is possible to coclude that the solutio we discuss here ca be effectively applied to reduce the size of the maetic compoets ecessary for the compliace with IEC stadard 1-3-, especially i the power rae from 6 W to at least 9 W. IV. DESIGN CONSIDERATIONS A. Selectio of reactive elemet values To develop a fully-compliat rectifier, the first step is the selectio of the ad C reactive elemet values. As far as the output capacitor value is cocered, a ood uess is the value obtaied by the approximate aalysis of the classical diode-bridecapacitive filter rectifier, i.e.: Po C = (8) fine Uo Uopp where U opp is the maximum allowed output voltae ripple (peak-to-peak). Note that, due to the exteded diode coductio ale, caused by the filter iductor, ad the switchi uit operatio, the effective output voltae ripple will be lower tha the theoretical oe. The choice of the filter iductor is more difficult ad the desi uidelies ive here have to be verified by simulatio. I case the desired output power is lower tha 6 W, the oal is to modify the waveshape of the iput curret so as to take advatae of the less restrictive Class A limits. This sile coditio, ormally allows compliace with the stadard. Thus, a ood starti poit should be a iductor value which, without the help of the switchi uit, achieves at least 6 of coductio ale, which is the width of the Class D template. Oly i this case, i fact, the switchi uit ca icrease the coductio ale so as the curret waveform stays outside the Class D template for at least 5% of the lie half-period without usi hih T ON values which would cause a icrease i the trasformer size ad of the hih-frequecy curret harmoics. For power levels above 6 W o differece exists betwee Class D ad Class A limits, thus the iductor value should be proressively icreased as the power icreases. I fact, the extesio of the coductio ale ad the reductio of the curret rate of chae duri the switch o-time are madatory i order to keep the curret harmoics below the limits. B. Trasformer desi The objective of this work is to provide compliace with the stadards with a reduced overall maetic compoets volume as compared to the passive solutio. To this purpose, the trasformer size should be miimized by choosi the miimum switch o-time which provides the desired curret harmoic reductio. This, toether with the desired turs ratio, determies the widi umber of turs. The, for a complete trasformer size estimatio, the widi RMS currets are calculated approximati with a liear rise the shape of the iput curret duri T ON (see Fi. 3). From this fiure ad from (3) ad (4) we obtai: Isec RMS = I T I ON µ ω 3 T ωr I T Ipri = ON I RMS µ (1) 3 T where I is the iput curret value at the ed of the T ON iterval, calculated from (1). The trasformer volume is related to the product of iro ad widow areas, i.e.: U T I o ON sec RMS 1 AeAw = Ipri RMS B max J kr (9) (11) where B max is the maximum flux desity, J is the desired curret desity ad k R the widow filli coefficiet. I order to ive a idea of the trasformer dimesios, let us cosider a practical example: Coverter specificatios: Table I. Compariso betwee passive ad active rectifiers at differet power levels P o [W] U o [V] [mh] I peak E [mj] I rms DF cos(φ 1) PF u o [V] 3 - P A A P A A P A A P = passive; A 1 = active proposed solutio; A = active boost rectifier; DF = Distortio Factor; cos(φ 1) = displacemet factor; PF = Power Factor /99/$1. (c) 1999 IEEE

5 U i = V rms ±%, P o = 8W, = 6 mh, T d =.8ms, T ON =.5ms, = 4. The material used for both the iductor ad the trasformer has the followi parameter values: relative permeability:...µ r = flux desity:...b = 1.35 T The utilized widow filli coefficiet k R is.4, ad the curret desity J is 3 A/mm. The trasformer parameters are: iro cross sectio:...a e = m widow area:...a w = m mea maetic path:... av =.14 m primary umber of turs:...n 1 = 435 secodary umber of turs:...n 1 = 19 maetizi iductace:... µ =.56 H primary wire diameter:...φ 1 =.5 mm primary wire diameter:...φ =.6 mm total widi area:...a cu = m. exteral core volume:...vol = m 3 Note that the total widi area A cu is well below the available widow area A w, meai that the trasformer size could be further reduced. The iductor parameter, calculated for the maximum iput curret (i.e. miimum iput voltae), are: iro cross sectio:...a e = m widow area:...a w = m mea maetic path:... av =.143 m umber of turs:...n = 67 air ap:...t ap =.36 mm wire diameter:...φ = 1.6 mm total widi area:...a cu = m. exteral core volume:...vol = m 3. The rectifier output voltae at the miimum iput voltae ad omial power is V. For the sake of compariso a similar desi was carried out for the passive solutio. The iductor value eeded to comply with the stadard for the same coverter specificatio is 15 mh. The resulti iductor parameters are: iro cross sectio:...a e = m widow area:...a w = m mea maetic path:... av =.18 m umber of turs:...n = 111 air ap:...t ap =.58 mm wire diameter:...φ = 1.6 mm total widi area:...a cu = m. exteral core volume:...vol = m 3. The rectifier output voltae at the miimum iput voltae ad omial power is 198V. Compari the resulti volumes, the reductio implied by the proposed solutio is about 33%. C. Selectio of switchi uit parameters The desi of the proposed coverter ad switchi uit is characterized by several derees of freedom. All the desi parameters are somehow related to oe aother; therefore differet desi strateies ca be idetified. A possible procedure is to select the duratio of the switch o-time, which directly determies the size of the trasformer, to be as small as possible. After this choice, which must be uided by simulatios, the trasformer turs ratio = 1 / has to be selected. The effect of the variatio of this parameter is illustrated by Fi. 4. As ca be see, by icreasi the turs ratio it is possible to improve the hih frequecy harmoic cotet of the lie curret. This helps to limit the iductor value ad/or the duratio of the switch o-time eeded to achieve compliace. The ievitable drawback is that, icreasi the turs ratio, the coverter boost actio reduces ad so the quality of the output voltae reulatio worses. The effect of the tur-o delay T d is described by Fi. 5. As ca be see, the icrease of the delay iitially reduces the harmoic cotet, but further icreasi it implies a icrease i the curret peak value (Fi. 5b) ad also i the harmoics. A further effect of the variatio of the described cotrol parameters is the variatio of the output voltae achieved by the coverter i ope loop coditios, which accouts for the boost capability of the rectifier. This is described by Fi. 4 ad Fi. 5 too. As ca be see, both a icrease of the delay ad a reductio of the trasformer turs ratio imply a icrease i the boost actio of the coverter. This effect must be traded-off aaist the previously discussed drawbacks. D. Output voltae reulatio As far as the output voltae reulatio is cocered, we must cosider separately the effects of load ad iput voltae variatios, havi i mid the costrait imposed by the maximum switch o-time, which stroly affects the trasformer size. Thus, oce we have selected the maximum T ON i order to achieve compliace with the stadard at omial load ad prescribed iput voltae, the cotrol ca oly reduce the switch o-time at load curret decreasi (delay time T d is simply kept costat). A stadard PI reulator havi a badwidth well below the lie frequecy, like ay other PFC reulator, is sufficiet to do this. Clearly, a miimum power level exists, below which the output voltae reulatio caot be maitaied. It correspods to the value for which the passive -C rectifier (without the switchi uit) achieves the same output voltae. At lower power levels, the output voltae icreases toward the iput voltae peak, like i ay stadard rectifier. For this reaso, a hih output voltae referece is preferable, sice it ca be maitaied for a broader load variatio. To ive a idea, the coverter described i the experimetal results sectio ca maitai the output voltae reulatio approximately dow to 3% of the omial power. Differetly from the low-frequecy boost coverter preseted i [5]-[6], the proposed topoloy does ot achieve a hih boost actio uless a low trasformer turs ratio is used (at the limit of a uity turs ratio the behavior of this structure becomes the same as [5]-[6]). As a cosequece, reulatio of the output voltae ca be maitaied oly for a small iput voltae icrease (which requires reductio of the switch o-time), while, at low iput voltae, T ON is kept costat ad equal to the maximum value allowed by the trasformer desi, causi the decrease of the output voltae too /99/$1. (c) 1999 IEEE

6 U o [V] = V= V= 317 V T d U T = o [V] d 3.ms 3. ms T d = ms 3.4 ms T d = ms 3.8 ms a) Harmoic order 8 = 4 6 = 4 = 3 a) Harmoic order 8 6 T d = 3.8ms 4 T d = 3.4ms T d = 3.ms T [ms] d b) T ON Fi. 4 - ie curret as a fuctio of the trasformer turs ratio. a) Frequecy domai; b) time domai (U i = 3 V rms, P o = 6W, T d = 3 ms, T ON = 36 µs) V. EXPERIMENTA MEASUREMENTS I order to verify the results obtaied by simulatio a prototype was built havi the followi specificatios: U i = 3 V rms, U o = 3V, P o = 9W, = 5.3 mh, C = x47µf Iitially the rectifier was tested without activati the switchi uit. The lie voltae ad curret measured i these coditios are show i Fi. 6. It is importat to otice that i all the performed measuremets a cotrolled, low u i ii T [ms] d b) Fi. 5 - ie curret as a fuctio of tur-o delay T d. a) Frequecy domai; b) time domai (U i = 3V rms, P o = 6W, T ON = 36 µs, = 4) This allows to have a almost harmoic-free iput voltae, as required by the IEC stadards. For the passive -C rectifier, the harmoic cotet of the curret draw from the utility rid is above the stadard limits, especially i the third ad fifth harmoic compoets, as predicted by the simulatios. Whe the switchi uit is activated the curret waveform modifies as show i Fi. 7, where the mai coverter waveforms at omial coditios are depicted. The tur-o delay T d of the ate sial was set to.8 ms. As ca be see, the iput curret waveform well arees with the simulatio results. As a cosequece, the compliace with the stadard is achieved ad oly the hih order compoets of the curret spectrum et ear to the allowed limit values. The harmoic compoets of the curret spectrum ca be see i Table II aai for differet power levels. Harmoics from 19 th up to 5 th are ormally the closest to the u i ii Fi. 6 - Iput voltae U i (1V/div) ad curret (5A/div) (U i = 3V rms, P o = 9W) impedace, voltae source is used as the test power supply. u GATE Fi. 7 - Iput voltae U i (1V/div), iput curret (5A/div) ad ate sial u ate (1V/div) (U i = 3V rms, P o = 9W) /99/$1. (c) 1999 IEEE

7 Table II - Measured iput curret harmoics at differet output power levels for the proposed rectifier Class A P o [W] I I limits I I I I I I I I I I I I correspodi limits, thus cofirmi the simulatio results. However, for the hiher power levels, the adopted iductor is probably udersized, sice the mari o the low order harmoics teds to reduce. Ayway, as ca be see, the proposed solutio allows to comply with the IEC-1-3- stadard with a pretty low iductor compared to fully passive solutios. The 5.3 mh iductor adopted i the laboratory prototype allows to icrease the power level to about 9 W, without exceedi the stadard harmoic limits. It is worth oti that, as explaied i the previous sectio the size of the ecessary trasformer is a fractio of the iductor s size. Therefore, the overall size of the maetic compoets of the power rectifier is reatly reduced as compared to the passive solutios. The measured efficiecy of the modified rectifier is always above 96%, as show by Table III. The Table also reports other measured data which allow to evaluate the differet performace of the active ad passive rectifier; the boost capability of the active solutio, for istace, is idicated by the ope loop output voltae achieved by the rectifier. As ca be see, the differece betwee the output voltae i the active ad passive rectifier for a ive output power is i the rae of 7-8 V, thaks to the switchi uit operatio. It is also worth oti the eliible differece betwee active ad passive solutio efficiecy. Fially, the behavior of the reset circuitry ad of the adopted power switch (IGBT) subber are show by Fi. 8. The drai source Table III - Experimetal compariso of active ad passive rectifiers at differet power levels (P: passive; A 1 : proposed solutio) P i [W] U o [V] I o T d [ms] T ON [µs] η [%] 61 (P) (A 1) (P) (A 1) (P) (A 1) (P) (A 1) u Cr u DS Fi. 8 - Reset capacitor C r voltae u Cr (4V/div) ad drai-source voltae o the IGBT (V/div) voltae exhibits a cotrolled overshoot which is kept by the subber (1F, 39Ω (1W)) to a acceptable level for a 6 V switch. The voltae across the reset capacitor is quite low, bei the reset time lo as compared to the switch o-time. VI. CONCUSIONS The proposed low-frequecy switched PFC is a simple ad cheap solutio to achieve compliace with EMC stadards toether with output voltae stabilizatio i ac/dc power supplies for household ad eeral-purpose applicatios. As compared to a passive rectifier, it allows substatial reductio of the iductive compoets volume at the expese of a limited icrease of circuit complexity. The added switch allows reulatio of the output voltae aaist load variatios, without affecti the coverter efficiecy. The solutio seems to be more effective i the power rae above 6W. REFERENCES 1. IEC 1-3-, First Editio , Commissio Electrotechique Iteratioale, 3, rue de Varembé, Geève, Switzerlad.. Jovaovic, D. E. Crow, "Merits ad imitatios of Full-Bride Rectifier with C Filter i Meeti IEC 1-3- Harmoic-imit Specificatios," IEEE Applied Power Electroics Cof. Proc. (APEC), March 1996, pp Redl,. Baloh, "Power-Factor Correctio i Bride ad Voltae- Doubler Rectifier Circuits with Iductors ad Capacitors," IEEE Applied Power Electroics Cof. Proc. (APEC), March 1995, pp Redl, "A Ecoomical Sile-Phase Passive Power-Factor-Corrected Rectifier: Topoloy, Operatio, Extesios, ad Desi for Compliace," IEEE Applied Power Electroics Cof. Proc. (APEC), February 1998, pp I.Sua, M.Kimata, Y.Ohishi, R.Uchida, New Switchi Method for Sile-Phase AC to DC Coverter, PCC Cof. Proc., Yokohama, 1993, pp Rossetto, G.Spiazzi, P. Teti, Boost PFC with 1 Hz Switchi Frequecy Providi Output Voltae Stabilizatio ad Compliace with EMC Stadards, 1998 Idustry Applicatios Society Aual Meeti, St. ouis, pp /99/$1. (c) 1999 IEEE