A Flying-Domain DC-DC Converter Powering a Cortex-M0 Processor with 90.8% Efficiency
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1 A Flying-Domain DC-DC Converter Powering a Cortex-M0 Processor with 90.8% Efficiency Loai G. Salem, John G. Louie, and Patrick P. Mercier University of California, San Diego ISSCC 2016
2 Independent supply for each module for per-block power management PCB SoC DSP I/O Anal og/ RF PLL Video H/W accele rators Memory Digital core1 Digital core2 Digital coren Large PCB area (1.8V) (1.5V) Voltage Regulator (1.1V) (0.9V) (0.7V) 2 of 24
3 Bring the off-chip s into the chip for lower cost Digital cores Ø Lower PCB area & product form-factor Ø Lower BOM & I/O number Mem. Battery H/W accele rators SoC Requires high density converters PCB DSP I/O Analog /RF Goal of this work: Realize a high density converter with high ɳ 3 of 24
4 New Class of DC-DC converters: Flying Power Domain Power Domain Interfacing Level Shifters All Digital Bang-Bang Control Measurement Results Summary 4 of 24
5 Converter clock Divide by 2 SC 5 of 24
6 How to get rid of the area-consuming cap Cf? Switch the load itself instead of the cap Load Cf consumes > 99% of the converter area 2-phase switched network KVL equations enforces V LOAD = V BAT /2 6 of 24
7 How to implement? Use 4 power switches to fly the load itself Switched Capacitor Switched Load (Flying Domain) Get rid of Cf > 100 area reduction 7 of 24
8 Thevenin equivalent model 2:1 Switched Capacitor f sw 8 of 24
9 f sw ½ CΔV 2 9 of 24
10 10 of 24
11 How to interface with I/O? Inputs: require fixed-domain to flying-domain shifting Outputs: require flying-domain to fixed-domain shifting 11 of 24
12 Fixed Domain 2V 1V (1V) Requires f sampling > 2f signal A continuous shifter is available for faster signals; see paper 12 of 24
13 Q = D Q = Q old 13 of 24
14 Fly the input terminals of the 2:1 cell through the switches of a 2 nd FD converter: 4:1 FD converter f CLK[1] = f CLK[0] /2 for valid steady state Salem & Mercier, VLSI 15 CLK[1] 4:1 FD Converter CLK[0] 1 st flying power domain 2 nd flying power domain 14 of 24
15 Load voltage is observable through V o Observable in both ratio settings Easy to perform Freq. Modulation + - V DD 15 of 24
16 Load voltage is observable through V o of converter Scales switching parasitics with load current for high light-load η 12 of 24
17 Tech. V IN 0.18µm SOI 0.4-3V 1.95mm 2 17 of 24
18 ɳ increases at light loads (no charge-sharing loss) Model < 0.4% 18 of 24
19 Freq. error < 2% for V OSC = 0.4-to-1.5V at ɳ = 96% 19 of 24
20 Flying the entire 1.95mm 2 µp: ɳ = 90.8% at (I µp =3.63mA, V BAT =3V), while running a checksum program at 1MHz Outputs after flying to fixed shifters 20 of 24
21 Sudden I L step: 21.8µA 1mA response time ~ 330ns, 50mV p-p 21 of 24
22 Peak efficiency vs. power density 3.71W/mm 2 22 of 24
23 Peak efficiency vs. power density 2 Flying Domain: High power density without exotic or scaled CMOS 23 of 24
24 A new class of DC-DC converters, flying-domain Load is directly switched, instead of a passive, in a 2:1 topology, increasing power density Requires SOI & doesn t eliminate C out SSL elimination Cf elimination High high Power density 24 of 24
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