l To emphasize the measurement issues l To develop in-depth understanding of noise n timing noise, phase noise in RF systems! n noise in converters!

Transcription

1 Purpose! Measurement Methods and Applications to High-Performance Timing Test! Mani Soma! Univ of Washington, Seattle! l To emphasize the measurement issues critical in high-frequency test! l To develop in-depth understanding of noise in measurements! n timing noise, phase noise in RF systems! n noise in converters! l To provide a foundation for research in RF measurement and test! Soma 1! Soma 2! Outline! l Top-down view of measurement issues! l Basic noise mechanisms and models! l Noise in measurement circuits! n converters (sampled data)! n PLL & VCO (clocks and data control)! l Case studies in measurement! n existing methods and their noise considerations! l Research in measurement methods! Soma 3! System-level View! l Focus on measurements in RF systems! Applications! TCP/IP!HID!RFCOMM! Data! L2CAP! Audio! Link Manager! Baseband! RF! Control! Software! Hardware! modules! Soma 4! RF Test Requirements! l High-frequency test for specific blocks! n RF digital blocks: PLL, I/O buffers! n RF analog / mixed-signal blocks: transceiver, modulator, VCO, LNA, etc.! l Functional parametric test to verify performance! n Phase, frequency, jitter, SNR, spectrum! l Automatic test! n Role of low-frequency ATE! Soma 5! High-frequency Test Approaches! l Which measurement can be done most efficiently at high-frequency?! n Voltage! n Current! n Time! l Which high-frequency measurement tool is available?! n GHz clocks! n Very fast sampler, converters! Soma 6! Soma 1!

2 Focus on Measurement! l Measure = acquire raw data from a signal! n usually taken for granted but..! n the critical first step of any test procedure! n strong impact on final test accuracy and decision! n strong impact in evaluating tradeoffs between on-chip and off-chip test! l Voltage! What Do We Measure?! n capture signal points {(t n,v n ), n=1,n}! Ø S/H, ADC, and sampling clocks! n most popular measurement methods! Ø in oscilloscopes, spectrum analyzers, etc.! Ø in ATE! n post-processing! Ø peak detection, voltage gain, amplitude, etc.! Ø timing estimation (e.g. zero-crossing)! Ø FFT: amplitude, phase, noise, etc.! Soma 7! Soma 8! What Do We Measure? (2)! l Current! n capture current values (at one or a few points)! Ø resistor,current sensor, clocks! n implementation! Ø built-in compliance in benchtop instrument! Ø in ATE for IDDQ test! n limited use! Ø simple short/open detection! Ø IDDQ, IDDt, IDDx testing for various faults! n post-processing! Ø usually for IDDQ applications! What Do We Measure? (3)! l Time and frequency! n direct measurement by capturing signal edges! Ø clocks for capturing edges! n indirect measurement via FFT of voltage samples! n recent strong interest in direct timing measurement! Ø on-chip BIST! Ø benchtop instrument (e.g. Wavecrest)! n post-processing! Ø FFT and / or statistical analysis! Soma 9! Soma 10! Measurement Issues! l No perfect measurement exists! l Limitations to accuracy! n noise: fundamental limit! n interactions between measuring instrument and circuit under test (CUT)! n post-processing methods and interpretation of results! Outline! l Top-down view of measurement issues! l Basic noise mechanisms and models! l Noise in measurement circuits! n converters (sampled data)! n PLL & VCO (clocks and data control)! l Case studies in measurement! n existing methods and their noise considerations! l Research in measurement methods! Soma 11! Soma 12! Soma 2!

3 Noise Characteristics & Models! l Component noise and impact on measurement! n intrinsic noise! n both in CUT and in measurement circuits! l Timing noise of high-frequency circuits! n higher-level models! n measurement methods! l thermal noise! Resistor Noise! n inherent (T= 0 K, k=1.38e-23 J/ 0 K)! n C or MHz has 4 V noise! e n 2 = 4kTR! f i n 2 = 4kT!f / R Soma 13! Soma 14! Resistor Noise & Sampling Jitter! l Resistor noise creates timing uncertainty in input sampling! n need to design for at high frequencies! l Example! n 50 system, 10 MHz clock with 250 ps rise time! n noise-induced 2.7 ps jitter with 0.5V input! 0.7kTR n!t CLK = f CLK A "t r, CLK Wiring Impact! l 16-bit ADC on loadboard, Z in = 5K, 5 cm of PCB copper track (0.25 mm wide, mm thick) between input and signal source! l R (wire) = 0.09! l gain error = R / Z in = % (> % = LSB for 16 bits)! l data accuracy is no longer 16-bit!!! Soma 15! Soma 16! Other Resistor s Parasitics! l Skin effects (f > 10 MHz for high resolution converters and high-frequency clocks)! l Copper (on PCB or on chip)! Skin! depth(cm) = 6.6 / R square (") = 2.6*10!7 f (Hz) f (Hz) Resistive Noise Reduction Methods! l Reduce noise in design! n use differential designs! n match layout! n model and simulate with noise sources, series inductance and parallel capacitance! l Reduce noise in measurement! n use shielding or guard! n use differential measurement circuits! n use low-valued resistors! n reduce measurement bandwidth if possible! n use averaging methods in voltage measurement! Soma 17! Soma 18! Soma 3!

4 Noise in Capacitors! l Capacitance between parallel wires -> crosstalk! l Capacitance between bond wires (~ 0.2 pf)! l Capacitor intrinsic noise! n 1 0 C has 64 V noise! e n (C) = kt C Capacitor Models in Measurement! l Use different models depending on measurement applications! l Add noise models for each component! Leakage-current model High-current model High-frequency model Dielectric-absorption model Soma 19! Soma 20! Shot noise! l Discrete nature of current flow! l Shot noise current! n q=1.602e-19 C! n another type of white noise! I n 2 = 4qI DC!f 1/f noise! l Flicker noise (terminology from vacuum tube)! n generally 1/f, = ! n very common! l Many names! n excess noise, pink noise, contact noise, etc.! n burst noise (popcorn noise): 1/f, = 1-2, usually 2! n red noise: 1/f 2! l Spectral density! S n ( f ) = E 2 n f Soma 21! Soma 22! Noise bandwidth! Noise bandwidth (2)! l Noise bandwidth 3-dB bandwidth! n usually larger than 3-dB bandwidth! l Definition! n system with voltage gain A v (f) or power gain A 2 v (f), maximum gain = A v0! " 1!f = # A v ( f ) 2 df A 2 v 0 l First-order lowpass filter example! n 3-dB bandwidth = f L! n noise bandwidth = f L /2! 0 Soma 23! Soma 24! Soma 4!

5 Note on measurement! Ground in measurement! l White (thermal) noise! n longer measurement time reduces noise impact! n accuracy increases as (T measure ) 1/2! l 1/f noise! n measurement accuracy does not increase with measurement time! l Burst noise! n amplitude and frequency (# bursts/sec)! n need bandwidth large enough to capture sudden short burst, small enough to avoid thermal noise dominance! l realistic ground (ground loop)! Signal Ground loop impedance ADC Soma 25! Soma 26! Other ground loops! l Current from one source flows through ground impedance of the other source! l Current around ground loop creates magnetic coupling! Dealing with ground loops! l Guidelines for both design and test! l Separate digital and analog power and ground! l Join grounds at one point of the device! Blocks on one chip Signal source A Current IA VDD VDD AVDD Test Instruments! Ground loop Next stage CUT! Digital logic on chip IN Converter OUT DGND AGND Signal source B Current IB System Analog GND Soma 27! Soma 28! Signal routing guidelines! l Separate analog and digital signals! l Avoid crossovers between analog and digital signals! l Layout sampling clock and analog input wires carefully! l Layout high-impedance signals carefully! l Use differential designs! Noise in test set-up! l Instruments, ATE, on-chip test circuits all have noise! n fundamental limit to measurement accuracy! n system noise floor! Ø highly dependent on test set-up! Ø no industry standard for interpretation! Ø need to understand basic mechanisms to interpret measurement and test results! Soma 29! Soma 30! Soma 5!

6 System noise components! Case study: System noise! l Random noise! n random timing jitter of test clocks! n thermal noise! l Digital crosstalk and clock / signal harmonics! n distinct spikes in spectrum! n correlated to analog input or clock! n synchronized noise! l Other noise sources! n broad needles in spectrum! n switching power supplies, linear power supplies, switching signals! l Use ADC to characterize system noise! l Ideal 16-bit ADC! n SNR (db) = 6.02* = db! n SNR = SQDR: noise includes quantization distortion, dynamic non-linearities, internal jitter, and internal thermal noise! l Measure via coherent sampling! n larger sample size -> noise spread over more samples -> noise per FFT bin decreases! n noise improving figure NIF with N=2 K samples! NIF(dB) = 10 log N 2 = 3.01(K! 1) n non-synchronized! Soma 31! Soma 32! Noise floor calculations! l 16-bit ADC, 2 17 samples! n SQDR = db, NIF = db! l noise floor (dbc) = SQDR+NIF= db! n dbc: reference to fundamental signal amplitude! l noise floor (mean and absolute values)! n signal swing: -5V to +5V! n signal amplitude: 5V or 20 log 5 = dbv! n mean noise floor (dbv) = = db! n absolute noise floor (dbv) = = db! Ø 11 db: worst-case bin 11 db greater than mean bin, due to Gaussian distribution of quantization noise! Sample size vs. noise floor! l Small number of samples: noise floor not visible! 0 db Hz power noise switch power supply noise SQDR+NIF Noise floor due to quantization distortion fsample/2 Soma 33! Soma 34! Sample size vs. noise floor (2)! l Larger number of samples: noise floor components and spurious component! n SFDR = spurious-free dynamic range! 0 db Fundamental Harmonics SFDR SQDR+NIF Case study: experiment! l Analogic ADC 4355! l Input signal frequency f i = Hz (approx. 1 KHz)! l Sampling frequency f s = Hz (approx. 100 KHz)! n Nyquist bandwidth = 50 KHz! n Number of signal periods = 1307! n Record size = samples = 2 17! n FFT frequency resolution = 100 KHz/2 17 = Hz! Soma 35! Soma 36! Soma 6!

7 What type of sampling?! l From the spectrum, is the sampling coherent? accurate? Why?! l Is the sampling clock jitter-free? Why?! Fundamental Harmonics and spurious noise! l Is the spike at KHz a signal harmonic or spurious noise?! f= Hz Fundamental f= KHz 0 1 KHz 5 KHz KHz Soma 37! Soma 38! Harmonics and spurious noise (2)! l Is the spike at KHz a signal harmonic or spurious noise?! KHz Answers! l f i (signal) = Hz! l f s (sampling) = Hz! l f= KHz = 12 * Hz = 12th harmonic! l f= KHz = 2*f s - 173*f i = 173th harmonic folded back into the Nyquist band! 25 KHz 37.5 KHz Soma 39! Soma 40! Harmonics identification! l Higher harmonics folded back into the Nyquist band! l n = frequency zone! n zone 0: f s (Nyquist band)! n zone 1: 0.5 f s - f s! n zone 2: 1.5 f s - 2 f s! l M = Mth harmonic of signal (M=1,2,3 )! l f (Mth harmonic in zone n folded to Nyquist zone) = (n * f s + M * f i ) or (n * f s -M * f i )! Soma 41! Harmonics and signal! l Given input frequency f i and sampling frequency f s, identify harmonic bin f b! n i = largest integer <= 2 f i / f s! ( " 1! f b = (!1) i (!1)i % f f i! $ i + ' s + )* # 2 & 2,- l Given a peak frequency f b and sampling frequency f s, identify signal frequency f i! n i = 0,1,2,3.. (ambiguity in identification)! n need 2 sampling rates to identify better! i " 1! (!1) % f f i = (!1) i f b + $ i + ' s # 2 & 2 Soma 42! Soma 7!

8 Outline! l Top-down view of measurement issues! l Basic noise mechanisms and models! l Noise in measurement circuits! n converters (sampled data)! n PLL & VCO (clocks and data control)! l Case studies in measurement! n existing methods and their noise considerations! l Research in measurement methods! Noise calculation in converters! l DAC! n ground all digital inputs! n place noise sources (thermal, shot, 1/f, etc.) in appropriate circuit elements! n contributions from each noise source type! Ø resistor, opamp, input voltage noise, input current noise! n calculate total noise using circuit analysis! Ø sum independent noise power! Soma 43! Soma 44! DAC R-2R network noise! DAC binary-weighted network! l Total noise spectral density! n independend of N! n E 2 n=4ktr! R R R R 2R 2R 2R 2R 2R 2R l Total spectral density! n approximately E 2 n=2ktr! R 2R 4R 4kTR E 2 n = " 1 + 2N!1! 1% $ # 2 N!1 ' & 2 n R Soma 45! Soma 46! DAC topologies vs. noise! l 4 topologies! n R-2R with voltage follower! n R-2R with inverting amplifier! n R-2R with non-inverting amplifier! n Binary-weighted with inverting summer! l Which has lower total noise at output?! l Why?! R-2R network R-2R network R-2R network binary network R-2R with follower! R-2R with inverting amplifier! R-2R with non-inverting amplifier! Binary-weighted with inverting amplifier! Soma 47! Soma 8!

9 DAC noise analysis! l Normalizing assumptions! n to make noise transfer function = 1 in all topologies! n R-2R networks: R F =R I =R A =R! n binary-weighted network: R F =R eq =R/2! l Lowest noise! n R-2R with follower (fewest components, no multiplication of opamp noise due to gain=1)! n binary-weighted could be better if amplifier noise dominates! DAC noise lessons! l Use amplifier with lowest noise! n E n of amplifier dominates DAC noise! l Use low-noise reference voltage! n second dominant noise factor! l Binary-weighted DAC! n below 1 KHz: resistor 1/f noise dominates! n above 1 KHz: voltage reference noise dominates! Soma 49! Soma 50! ADC noise model! l Flash ADC example! l Noise components! n resistor noise! n reference noise! n comparator noise (voltage and current)! l Noise models: white and 1/f! l Ignore digital encoder noise! ADC noise analysis! largest contribution of V ref noise! all other sources contribute most noise at the midrange comparators! Soma 51! Soma 52! ADC noise vs. bit error! l Noise distribution with respect to LSB quantization window! n Gaussian! n center of each quantized step! l 6 spread of the noise distribution! n within quantization step: no bit error! n outside quantization step! Ø calculate probability of one-bit error! Outline! l Top-down view of measurement issues! l Basic noise mechanisms and models! l Noise in measurement circuits! n converters (sampled data)! n PLL & VCO (clocks and data control)! l Case studies in measurement! n existing methods and their noise considerations! l Research in measurement methods! Soma 53! Soma 54! Soma 9!

10 Phase noise and timing jitter! l Two domains to characterize clocks in measurement! n timing systems: jitter! n RF systems: phase noise! n how to relate them?! l Case study: VCO and other oscillators! n S ( ) = phase noise in dbc (reference to carrier at 0 ) at the offset frequency ( - 0 ) from the carrier! n J cc, RMS = RMS value of cycle-to-cycle jitter! n white noise sources (thermal and shot noise)! Phase noise and timing jitter (2)! l VCO case study! n 2.2 GHz, MHz offset is equivalent to 0.3 ps RMS value of cycle-tocycle jitter! n absolute thermal jitter given a measurement time t! Ø jitter increases with measurement time! S! (") # (" / 4$)J cc,rms (" % " 0 ) 2 2 J cc, RMS # 4$ J abs = f 0 2 J cc, RMS!t 3 S "! (")(" % " 0 ) 2 0 Soma 55! Soma 56! Noise and timing jitter (1)! Noise and timing jitter (2)! l VCO with supply and substrate noise! n non-white noise: model by noise modulation V m cos( m (t))! n RMS value of period jitter J P,RMS! Ø increases with noise amplitude! n RMS value of cycle-to-cycle jitter J cc,rms! Ø increases with noise frequency! J P, RMS = V m K VCO 2 f 0 2 l Single-ended VCO! n supply and substrate noise! n V m = V DD =100 mv! n analytical vs. simulated results! period jitter cycle-to-cycle jitter noise frequency, MHz J cc, RMS = V mk VCO 2 1! cos(" m / f 0 ) # V mk VCO" m 3 f 0 2 f 0 Soma 57! Soma 58! Noise and timing jitter (3)! Measurement guidelines! l Differential-ring VCO! n supply and substrate noise! n V m = V DD =100 mv! n analytical vs. simulated results! period jitter cycle-to-cycle jitter noise frequency, MHz l Spectrum analyzer! n more noise measured with higher bandwidth! Ø cannot be compared directly! Ø divide each noise measurement by ( f) 1/2 for comparison! n analyzer calibrated resolution bandwidth noise bandwidth! n need to know how to interpret measured data correctly! Soma 59! Soma 60! Soma 10!

11 Measurement time! l Instrument response time:! n smallest time window possible! l Measurement bandwidth: f! l Relative error:!! = 1 2"#f l Use widest possible bandwidth (see next slide)! n narrowband measurements require more averaging for same accuracy! l Use long time window (with averaging when appropriate)! Soma 61! Noise reduction in measurement! l Use measurement methods with differential circuits and signals! l Use smaller bandwidth! n just enough bandwidth to reduce noise and still get good accuracy (previous slide)! l Employ signal separation and shielding! l Reduce transition switching in the measurement circuits! n use current-steering methods in analog measurement circuits to avoid di/dt transient! Soma 62! Noise reduction in measurement (2)! l Instrument = ATE, external instrument, or onchip measurement circuit! l Considerations for sub-ps timing measurements! n DUT - instrument interface! n instrument one-shot resolution / accuracy! n instrument DC input accuracy! n instrument physical location relative to DUT! n instrument jitter noise floor! n instrument throughput over data interface! n instrument trigger mode! n instrument bandwidth required to measure DUT timing parameters (rise, fall, delay, etc.)! Soma 63! Outline! l Top-down view of measurement issues! l Basic noise mechanisms and models! l Noise in measurement circuits! n converters (sampled data)! n PLL & VCO (clocks and data control)! l Case studies in measurement! n existing methods and their noise considerations! l Research in measurement methods! Soma 64! Measuring Voltage: Sampling! Sampling Architecture! Soma 65! Consider noise floor of entire test set-up, including onchip measurement circuits! Soma 66! Soma 11!

12 l Frequency! Sampling Clock Issues! n On-chip: limited by technology (CMOS, SiGe CMOS, BiCMOS)! Ø 2-5 GHz! Ø same speed as fastest on-chip signals! l unable to sample at Nyquist rate! n ATE: 1 GHz! Ø limited by pin electronics and test set-up! n Benchtop instrument! Ø up to 40 GHz samplers! Soma 67! Faster Sampling Methods! l Delay-line interpolation! n on-chip or ATE! n 1 GHz clock + 7-stage delay line (125 ps each) = 8 GHz sampling clock! correlated jitter! Soma 68! Faster Sampling Methods (2)! Sampling Limitations! l Parallel samplers! n ATE and benchtop instruments! n up to 40 GHz sampling rate! correlated jitter?! l Clock jitter! n signal with 100-ps rise time! n sampled with 5-ps jitter clock! n 5% error in sampled values! Ø averaging to reduce error in periodic signals! Ø no correction for one-shot signal! CLK signal jitter Soma 69! Soma 70! Sampling Limitations (2)! l Clock synchronization! n synchronized with signal to be sampled! n synchronized between sampling clocks! trigger signal synch CLK1 correlated jitter?! CLK2 clock synch signal Realistic clock jitter values! l On-chip (CMOS / BiCMOS) as of 2002:! n 2.2 GHz - 6 GHz clocks! Ø ps peak-to-peak jitter! Ø 3-5 ps RMS jitter! l Off-chip! n ATE, oscilloscope, spectrum analyzer, TIA! Ø 1-10 ps RMS jitter! Ø 200 fs resolution with 2 ps noise floor (best case)! Ø need calibration before measurements! Soma 71! Soma 72! Soma 12!

13 Sampling Limitations (3)! Measuring Voltage: Sampling! l Undersampling is better?! n Lower-frequency more stable clocks! n Fundamental problems in time coherency! jitter=0.005 unit Reference CLK t=1.01 unit ideal edge (no jitter) t=1.015 unit t=1.01 unit t=1.02 unit Soma 73! Soma 74! Sampling Limitations (4)! l Sample-and-Hold (capacitor noise, opamp noise, switching noise)! n limited bandwidth! n aperture error! n transient response, overshoot, etc.! l ADC (noise estimation from previous slides)! n sample rates at 8-bit < 400 MHz! n parallel (4-channel) ADC: synchronization error! Ø ATE or benchtop instrument only! l Memory storage! n limited on-chip memory or temporary buffer! Soma 75! Sampling noise sources! l Uncorrelated noise! n thermal noise! n 1/f noise! l Correlated noise (difficult to estimate correlation)! n power supply noise! n substrate noise! n clock synchronization noise! Ø delay-line generation of clocks, parallel clocks! l Noise floor of the on-chip measurement circuit! n in db for amplitude sampling! n in ps for timing accuracy! Soma 76! Direct Digital Conversion! l Sigma-delta modulator! n pulse-density conversion method! n low frequency and low conversion rates! edge jitter! Soma 77! l Clock jitter! Method limitations! l Jitter in output signal edges! n need to characterize for each modulator design! l Post-processing issues! n what parameters to extract from pulse stream?! Ø on-chip or off-chip extraction! Ø corruption / modulation of signal edges during processing due to jitter and noise sources! n correlation to accepted measurements! Ø phase noise, frequency, timing parameters! Soma 78! Soma 13!

14 Measuring Current on ATE! Measuring Current on Chip! supply noise! VS2 supply noise! VS1 Vdd Loadboard Tester Channel #2 resistive noise! current shot noise! Tester Channel #1 supply noise! Circuit Under Test Soma 79! BIC Sensor GND Soma 80! Current Measurement Issues! l Slow measurement! n ATE: 100 s - 3 ms; BICS: 50 s s! l Lower accuracy than voltage measurement! l Effects on on-chip VDD and GND! n power supply values reduced due to sensors! n power supply noise and ground noise increase! Soma 81! Current measurement noise sources! l Uncorrelated noise! n thermal noise! n 1/f noise! n shot noise! l Correlated noise! n power supply noise! n substrate noise! l On-chip comparator noise! n reference noise! n comparator offset and input noise! Soma 82! Methods to Measure Time! l Sampling! n indirect method, already covered! l Counter-based method! l Time-to-voltage converter! l Time-to-digital converter! l Differential oscillator method! l Delay search method! l Start-and-stop counter method! Soma 83! Counter-based Method! l Time interval much larger than T CLK! l Resolution = 1 clock period T CLK! n improved by delay-line interpolation! Soma 84! Soma 14!

15 Counter-method Observations! l All-digital circuits! n more robust and scalable with processes! n accuracy can be improved! n easier on-chip circuit designs! l Key noise is l Need modifications if the time interval to be measured is < T min of fastest signals! l The core of many subsequent techniques! Soma 85! switch noise! Preset T Measure Time-to-Voltage Converter! supply noise! supply noise! V = V DD Io shot noise! capacitor noise! V Io GND I o T C C l Need a DC voltage measurement or Pass / Fail comparison! l Requires analog components! n sources of errors! l Measurement time! n T+ pre-charge time! Soma 86! Time-to-Digital Converter! l Delay-line method to search for a signal edge! l Resolution = 1 unit delay! l Robust and very popular! Differential-Oscillator Method! l Measure a time interval T! n Credence, Vector12! correlated jitter! DELAY ELEMENTS T to be measured T = m 1 T 1! m 2 T 2 CLK CLK1 m1 cycles accuracy of coincidence detector! IN D Q D Q D Q D Q D Q D Q CLK2 correlated?! m2 cycles Soma 87! Soma 88! Differential-Oscillator Method (2)! l Measurement time depends on edge coincidence! n coarse / fine tuning options! n miss many edges in a periodic signal! Ø no cycle-to-cycle measurement! l Clock-triggering mechanisms and errors! l Jitter on measuring clocks CLK1, CLK2! n may be correlated! l Noise and error in coincidence detector! Soma 89! Delay Search Method! l Adjust Capture CLK to measure delay! n absolute value or Pass / Fail! n may be used to search for a signal edge! l Resolution in the ps range for on-chip test! Launch CLK Launch inputs Capture CLK Soma 90! Soma 15!

16 Start-Stop Counter Method! Start-Stop Method Observations! edge jitter! l Variations of basic counter methods! l Start clock to count at one signal edge and stop count at another predetermined signal edge! l Mostly digital designs! l Same issues with other counter-based methods! l Additional problem due to re-triggering after stop! n dead-time interval! l Core of Wavecrest timing analyzer! T average = m CLK T CLK / N signal!edges Soma 91! Soma 92! Outline! Sampling Research! l Top-down view of measurement issues! l Basic noise mechanisms and models! l Noise in measurement circuits! n converters (sampled data)! n PLL & VCO (clocks and data control)! l Case studies in measurement! n existing methods and their noise considerations! l Research in measurement methods! l Sampling in the presence of both voltage noise and timing jitter! n theory and noise analysis! n new sampling and post-processing methods! l Undersampling research with low timing coherency! n critical for on-chip RF test! l Fast clocks for Nyquist sampling! Soma 93! Soma 94! Current-measurement Research! l Faster methods to measure currents! l Higher measurement resolution! n at lower VDD! l Better designs of BICS to reduce noise effects on power supply and GND! n critical for on-chip test! l More post-processing theory and methods! n comparable to voltage sampling! Soma 95! Timing-measurement Research! l Theory and methods to reduce impact of jitter and timing noise in measurement! l Fundamental understanding of physical effects in turning ON / OFF transistors! n critical to controlling clock edges! n critical also to sampling and current-based methods! l Better circuits to capture timing edges! n process variations! Soma 96! Soma 16!

17 Leaping toward the Unknown! l Continuous-time measurements possible?! n all current methods capture discrete values or edges, not waveform segments! n no Sample-and-Hold! l Get rid of switches in measurement circuits?! n no timing uncertainty! l Processing analog values directly?! n no ADC, no clocks, no switches! Soma 97! Conclusion! l Noise models of basic components in onchip design-for-test circuits! l Noise of measurement circuits and their impact on accuracy! n noise source identification from measured data! n noise components in each measurement method! l Guidelines for low-noise measurements! l Suggested research problems! Soma 98! Soma 17!