TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH

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1 POWER LOGIC OCTAL -TYPE LATC Low r S(on)... Ω Typical Avalanche Energy...3 mj Eight Power MOS-Transistor Outputs of -ma Continuous Current -ma Typical Current-Limiting Capability Output Clamp Voltage... Low Power Consumption description The TPICB3 is a monolithic, high-voltage, medium-current, power logic octal -type latch with MOS-transistor outputs designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other medium-current or high-voltage loads. The TPICB3 contains eight positive-edgetriggered -type flip-flops with a direct clear input. Each flip-flop features an open-drain power MOS-transistor output. When clear () is high, information at the inputs meeting the setup time requirements is transferred to the RAIN outputs on the positivegoing edge of the clock () pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input () is at either the high or low level, the input signal has no effect at the output. An asynchronous is provided to turn all eight MOS-transistor outputs off. When data is low for a given output, the MOS-transistor output is off. When data is high, the MOS-transistor output has sink-current capability. Outputs are low-side, open-drain MOS transistors with output ratings of and -ma continuous sink-current capability. Each output provides a -ma typical current limit at T C = C. The current limit decreases as the junction temperature increases for additional device protection. RAIN RAIN RAIN3 RAIN 3 GN logic symbol SLIS3 APRIL 99 REVISE JULY 99 W OR N PACKAGE (TOP VIEW) The TPICB3 is characterized for operation over the operating case temperature range of C to C R V CC 8 RAIN8 RAIN RAIN RAIN RAIN RAIN RAIN3 RAIN RAIN RAIN RAIN RAIN8 This symbol is in accordance with ANSI/IEEE Standard 9-98 and IEC Publication -. L FUNCTION TABLE (each channel) INPUTS OUTPUT RAIN X L X L X L Latched = high level, L = low level, X = irrelevant PROUCTION ATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 99, Texas Instruments Incorporated POST OFFICE BOX 33 ALLAS, TEXAS

2 POWER LOGIC OCTAL -TYPE LATC SLIS3 APRIL 99 REVISE JULY 99 logic diagram (positive logic) RAIN RAIN 3 RAIN3 3 8 RAIN 9 RAIN RAIN 3 RAIN 8 RAIN8 8 9 GN POST OFFICE BOX 33 ALLAS, TEXAS

3 POWER LOGIC OCTAL -TYPE LATC SLIS3 APRIL 99 REVISE JULY 99 schematic of inputs and outputs EQUIVALENT OF EAC INPUT TYPICAL OF ALL RAIN OUTPUTS VCC RAIN Input V GN GN absolute maximum ratings over recommended operating case temperature range (unless otherwise noted) Logic supply voltage, V CC (see Note ) V Logic input voltage range, V I V to V Power MOS drain-to-source voltage, V S (see Note ) Continuous source-to-drain diode anode current ma Pulsed source-to-drain diode anode current (see Note 3) A Pulsed drain current, each output, all outputs on, I, T C = C (see Note 3) ma Continuous drain current, each output, all outputs on, I, T C = C ma Peak drain current single output, I M,T C = C (see Note 3) ma Single-pulse avalanche energy, E AS (see Figure ) mj Avalanche current, I AS (see Note ) ma Continuous total dissipation See issipation Rating Table Operating virtual junction temperature range, T J C to C Operating case temperature range, T C C to C Storage temperature range C to C Lead temperature, mm (/ inch) from case for seconds C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values are with respect to GN.. Each power MOS source is internally connected to GN. 3. Pulse duration µs and duty cycle %.. RAIN supply voltage =, starting junction temperature (TJS) = C, L = m, IAS =. A (see Figure ). PACKAGE ISSIPATION RATING TABLE TC C POWER RATING ERATING FACTOR ABOVE POWER RATING W 389 mw. mw/ C 8 mw N mw. mw/ C 3 mw POST OFFICE BOX 33 ALLAS, TEXAS 3

4 POWER LOGIC OCTAL -TYPE LATC SLIS3 APRIL 99 REVISE JULY 99 recommended operating conditions MIN MAX UNIT Logic supply voltage, VCC.. igh-level input voltage, VI.8CC V Low-level input voltage, VIL.CC V Pulsed drain output current,, VCC = (see Notes 3 and ) ma Setup time, high before, tsu (see Figure ) ns old time, high after, th (see Figure ) ns Pulse duration, tw (see Figure ) ns Operating case temperature, TC C electrical characteristics, V CC =, T C = C (unless otherwise noted) V(BR)SX VS PARAMETER TEST CONITIONS MIN TYP MAX UNIT rain-to-source breakdown voltage Source-to-drain diode forward voltage I = ma IF = ma.8 V II igh-level input current VCC =., VI = VCC µa IIL Low-level input current VCC =., VI = µa ICC Logic supply current VCC =. IN ISX rs(on) Nominal current Off-state drain current Static drain-to-source on-state resistance All outputs off All outputs on 3 VS(on) =., IN = I, TC = 8 C, 9 ma See Notes,, and VS =, VCC =.. µa VS =, VCC =.,. 8 I = ma, VCC =... I = ma, VCC =., See Notes and and Figures and µa.8 9. Ω I = 3 ma, VCC =.. 8 switching characteristics, V CC =, T C = C PARAMETER TEST CONITIONS MIN TYP MAX UNIT tpl Propagation delay time, low-to-high-level output from ns tpl Propagation delay time, high-to-low-level output from CL = 3 pf, I = ma, 9 ns tr Rise time, drain output See Figures,, and 8 ns tf Fall time, drain output ns ta Reverse-recovery-current rise time IF = ma, di/dt = A/µs, trr Reverse-recovery time See Notes and and Figure 3 3 ns NOTES: 3. Pulse duration µs and duty cycle %.. Technique should limit TJ TC to C maximum.. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.. Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a voltage drop of. at TC = 8 C. POST OFFICE BOX 33 ALLAS, TEXAS

5 POWER LOGIC OCTAL -TYPE LATC SLIS3 APRIL 99 REVISE JULY 99 thermal resistance PARAMETER TEST CONITIONS MIN MAX UNIT RθJA Thermal resistance, junction-to-ambient to W package N package All 8 outputs with equal power 9 9 C/W PARAMETER MEASUREMENT INFORMATION VCC I V 3 Ω Word Generator UT RAIN, Output CL = 3 pf (see Note B) GN Output V. TEST CIRCUIT VOLTAGE WAVEFORMS Figure. Resistive-Load Test Circuit and Voltage Waveforms Word Generator Word Generator VCC UT GN TEST CIRCUIT RAIN I, V 3 Ω Output Output CL = 3 pf (see Note B) % % tsu tpl 9% tr SWITCING TIMES % th % % 9% tw INPUT SETUP AN OL WAVEFORMS % tpl V %. tf Figure. Test Circuit, Switching Times, and Voltage Waveforms NOTES: A. The word generator has the following characteristics: tr ns, tf ns, tw = 3 ns, pulsed repetition rate (PRR) = Kz, ZO = Ω. B. CL includes probe and jig capacitance. POST OFFICE BOX 33 ALLAS, TEXAS

6 POWER LOGIC OCTAL -TYPE LATC SLIS3 APRIL 99 REVISE JULY 99 PARAMETER MEASUREMENT INFORMATION RAIN TP K Circuit Under Test IF L = m µf + TP A. A IF di/dt = A/µs % of IRM t t t3 RG river IRM VGG (see Note B) Ω ta trr TEST CIRCUIT CURRENT WAVEFORM NOTES: A. The RAIN terminal under test is connected to the TP K test point. All other terminals are connected together and connected to the TP A test point. B. The VGG amplitude and RG are adjusted for di/dt = A/µs. A VGG double-pulse train is used to set IF =. A, where t = µs, t = µs, and t3 = 3 µs. Figure 3. Reverse-Recovery-Current Test Circuit and Waveforms of Source-to-rain iode Word Generator VCC UT RAIN GN I,. Ω m VS Input I VS tw See Note B tav IAS =. A V(BR)SX = MIN TEST CIRCUIT VOLTAGE AN CURRENT WAVEFORMS NOTES: A. The word generator has the following characteristics: tr ns, tf ns, ZO = Ω. B. Input pulse duration, tw, is increased until peak current IAS =. A. Energy test is defined as EAS = IAS x V(BR)SX x tav/ = 3 mj. Figure. Single-Pulse Avalanche Energy Test Circuit and Waveforms POST OFFICE BOX 33 ALLAS, TEXAS

7 POWER LOGIC OCTAL -TYPE LATC TYPICAL CARACTERISTICS SLIS3 APRIL 99 REVISE JULY 99 I AS Peak Avalanche Current A.. PEAK AVALANCE CURRENT TIME URATION OF AVALANCE.... tav Time uration of Avalanche ms Ω rain-to-source On-State Resistance r S(on) 8 8 RAIN-TO-SOURCE ON-STATE RESISTANCE RAIN CURRENT VCC = See Note A TC = C 3 I rain Current ma Figure Figure Ω Static rain-to-source On-State Resistance r S(on) STATIC RAIN-TO-SOURCE ON-STATE RESISTANCE LOGIC SUPPLY VOLTAGE 8 3 TC = C.. VCC Logic Supply Voltage V I = ma See Note A. Switching Time ns 3 I = ma See Note A SWITCING TIME CASE TEMPERATURE tf tr tpl tpl TC Case Temperature C Figure Figure 8 NOTE C: Technique should limit TJ TC to C maximum. POST OFFICE BOX 33 ALLAS, TEXAS

8 POWER LOGIC OCTAL -TYPE LATC SLIS3 APRIL 99 REVISE JULY 99 TERMAL INFORMATION Maximum Continuous rain Current of Each Output A I MAXIMUM CONTINUOUS RAIN CURRENT OF EAC OUTPUT NUMBER OF OUTPUTS CONUCTING SIMULTANEOUSLY TC = C VCC = 3 8 N Number of Outputs Conducting Simultaneously Maximum Peak rain Current of Each Output A I MAXIMUM PEAK RAIN CURRENT OF EAC OUTPUT NUMBER OF OUTPUTS CONUCTING SIMULTANEOUSLY d = 8% d = %. VCC = d =. tw/tperiod = ms/tperiod 3 d = % d = % 8 N Number of Outputs Conducting Simultaneously Figure 9 Figure 8 POST OFFICE BOX 33 ALLAS, TEXAS

9 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONUCTOR PROUCTS MAY INVOLVE POTENTIAL RISKS OF EAT, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL AMAGE ( CRITICAL APPLICATIONS ). TI SEMICONUCTOR PROUCTS ARE NOT ESIGNE, AUTORIZE, OR WARRANTE TO BE SUITABLE FOR USE IN LIFE-SUPPORT EVICES OR SYSTEMS OR OTER CRITICAL APPLICATIONS. INCLUSION OF TI PROUCTS IN SUC APPLICATIONS IS UNERSTOO TO BE FULLY AT TE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright, Texas Instruments Incorporated

TPIC6B259 POWER LOGIC 8-BIT ADDRESSABLE LATCH

TPIC6B259 POWER LOGIC 8-BIT ADDRESSABLE LATCH POWER OIC -BIT ARESSABE ATC ow r S(on)...5 Ω Typical Avalanche Energy... mj Eight Power MOS-Transistor Outputs of 15-mA Continuous Current 5-mA Typical Current-imiting Capability Output Clamp Voltage...