TPIC6B259 POWER LOGIC 8-BIT ADDRESSABLE LATCH

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1 POWER OIC -BIT ARESSABE ATC ow r S(on)...5 Ω Typical Avalanche Energy... mj Eight Power MOS-Transistor Outputs of 15-mA Continuous Current 5-mA Typical Current-imiting Capability Output Clamp Voltage... 5 Four istinct Function Modes ow Power Consumption description This power logic -bit addressable latch controls open-drain MOS-transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers, and decoders or demultiplexers. This is a multifunctional device capable of storing single-line data in eight addressable latches and -to- decoder or demultiplexer with active-low MOS outputs. Four distinct modes of operation are selectable by controlling the clear (CR) and enable () inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in () terminal is written into the addressed latch. The addressed MOS-transistor output inverts the data input with all unaddressed MOS-transistor outputs remaining in their previous states. In the memory mode, all MOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs. To eliminate the possibility of entering erroneous data in the latch, enable should be held high (inactive) while the address lines are changing. In the -to- decoding or demultiplexing mode, the addressed output is inverted with respect to the input and all other INPUTS CR NC V CC S RAIN RAIN1 RAIN RAIN S1 N N SIS APRI 199 REVISE JUY 1995 W OR N PACKAE (TOP VIEW) outputs are off. In the clear mode, all outputs are off and unaffected by the address and data inputs. When data is low for a given output, the MOS-transistor output is off. When data is high, the MOS-transistor output has sink-current capability. Outputs are low-side, open-drain MOS transistors with output ratings of 5 and 15-mA continuous sink-current capability. Each output provides a 5-mA typical current limit at T C = 5 C. The current limit decreases as the junction temperature increases for additional device protection. The TPIC6B59 is characterized for operation over the operating case temperature range of C to 15 C OUTPUT OF ARESSE RAIN FUNCTION TABE NC CR RAIN7 RAIN6 RAIN5 RAIN S N EAC OTER RAIN Qio Qio Qio ATC SEECTION TABE SEECT INPUTS RAIN S S1 S ARESSE FUNCTION X Qio Memory NC No internal connection X Clear = high level, = low level Addressable atch -ine emultiplexer PROUCTION ATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1997, Texas Instruments Incorporated POST OFFICE BOX 655 AAS, TEXAS

2 POWER OIC -BIT ARESSABE ATC SIS APRI 199 REVISE JUY 1995 logic symbol S S1 S CR Z9 Z1 M /7 9, 1,R 9,1 1,1R 9, 1,R 9, 1,R 9, 1,R 9,5 1,5R 9,6 1,6R 9,7 1,7R This symbol is in accordance with ANSI/IEEE Std and IEC Publication RAIN RAIN1 RAIN RAIN RAIN RAIN5 RAIN6 RAIN7 POST OFFICE BOX 655 AAS, TEXAS 7565

3 POWER OIC -BIT ARESSABE ATC SIS APRI 199 REVISE JUY 1995 logic diagram (positive logic) S RAIN CR 5 RAIN1 CR 6 RAIN S1 CR 7 RAIN CR S 1 1 RAIN CR 15 RAIN5 CR 16 RAIN6 CR 17 RAIN7 1 CR CR 19 9,1,11 N POST OFFICE BOX 655 AAS, TEXAS 7565

4 POWER OIC -BIT ARESSABE ATC SIS APRI 199 REVISE JUY 1995 schematic of inputs and outputs EQUIVAENT OF EAC INPUT TYPICA OF A RAIN OUTPUTS VCC RAIN 5 Input 1 V N N absolute maximum ratings over the recommended operating case temperature range (unless otherwise noted) ogic supply voltage, V CC (see Note 1) V ogic input voltage range, V I V to 7 V Power MOS drain-to-source voltage, V S (see Note ) Continuous source-to-drain diode anode current ma Pulsed source-to-drain diode anode current (see Note ) A Pulsed drain current, each output, all outputs on, I, T C = 5 C (see Note ) ma Continuous drain current, each output, all outputs on, I, T C = 5 C ma Peak drain current single output, I M, T C = 5 C (see Note ) ma Single-pulse avalanche energy, E AS (see Figure ) mj Avalanche current, I AS (see Note ) ma Continuous total dissipation See issipating Rating Table Operating virtual junction temperature range, T J C to 15 C Operating case temperature range, T C C to 15 C Storage temperature range C to 15 C ead temperature 1,6 mm (1/16 inch) from case for 1 seconds C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to N.. Each power MOS source is internally connected to N.. Pulse duration 1 µs and duty cycle %.. RAIN supply voltage = 1, starting junction temperature (TJS) = 5 C, = m, IAS =.5 A (see Figure ). PACKAE ISSIPATION RATIN TABE TC 5 C POWER RATIN ERATIN FACTOR ABOVE TC = 5 C TC = 15 C POWER RATIN W 9 mw 11.1 mw/ C 7 mw N 15 mw 1.5 mw/ C 6 mw POST OFFICE BOX 655 AAS, TEXAS 7565

5 POWER OIC -BIT ARESSABE ATC SIS APRI 199 REVISE JUY 1995 recommended operating conditions MIN MAX UNIT ogic supply voltage, VCC.5 5. igh-level input voltage, VI.CC V ow-level input voltage, VI.1CC V Pulsed drain output current, TC = 5 C, VCC = (see Notes and 5) 5 5 ma Setup time, high before, tsu (see Figure ) ns old time, high after, th (see Figure ) ns Pulse duration, tw (see Figure ) ns Operating case temperature, TC 15 C electrical characteristics, V CC =, T C = 5 C (unless otherwise noted) V(BR)SX VS PARAMETER TEST CONITIONS MIN TYP MAX UNIT rain-to-source breakdown voltage Source-to-drain diode forward voltage I = 1 ma 5 IF = 1 ma.5 1 V II igh-level input current VCC = 5., VI = VCC 1 µa II ow-level input current VCC = 5., VI = 1 µa ICC ogic supply current VCC = 5.5 IN ISX rs(on) Nominal current Off-state drain current Static drain-to-source on-state resistance All outputs off 1 All outputs on 15 VS(on) =., IN = I, TC = 5 C, 9 ma See Notes 5, 6, and 7 VS =, VCC = µa VS =, VCC = 5., TC = 15 C.15 I = 1 ma, VCC = I = 1 ma, TC = 15 C VCC =., See Notes 5 and 6 and Figures 6 and 7 µa Ω I = 5 ma, VCC =. 5.5 switching characteristics, V CC =, T C = 5 C PARAMETER TEST CONITIONS MIN TYP MAX UNIT tp Propagation delay time, low-to-high-level output from 15 ns tp Propagation delay time, high-to-low-level output from C = pf, I = 1 ma, 9 ns tr Rise time, drain output See Figures 1,, and ns tf Fall time, drain output ns ta Reverse-recovery-current rise time IF F = 1 ma, di/dt = A/µs, 1 trr Reverse-recovery time See Notes 5 and 6 and Figure ns NOTES:. Pulse duration 1 µs and duty cycle %. 5. Technique should limit TJ TC to 1 C maximum. 6. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts. 7. Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a voltage drop of. at TC = 5 C. POST OFFICE BOX 655 AAS, TEXAS

6 POWER OIC -BIT ARESSABE ATC SIS APRI 199 REVISE JUY 1995 thermal resistance RθJA PARAMETER TEST CONITIONS MIN MAX UNIT W package 9 Thermal resistance junction-to-ambient to All outputs with equal power C/W N package 95 PARAMETER MEASUREMENT INFORMATION Word enerator (see Note A) S S1 S CR TEST CIRCUIT V VCC UT N RAIN 9, 1, 11 I 7, 1 17 R = 5 Ω Output C = pf (see Note B) CR S S1 S RAIN5 V. V RAIN VOTAE WAVEFORMS. NOTES: A. The word generator has the following characteristics: tr 1 ns, tf 1 ns, tw = ns, pulsed repetition rate (PRR) = 5 kz, ZO = 5 Ω. B. C includes probe and jig capacitance. Figure 1. Resistive-oad Test Circuit and Voltage Waveforms 6 POST OFFICE BOX 655 AAS, TEXAS 7565

7 POWER OIC -BIT ARESSABE ATC PARAMETER MEASUREMENT INFORMATION SIS APRI 199 REVISE JUY 1995 Word enerator (see Note A) Word enerator (see Note A) 1 19 VCC CR UT RAIN N 9, 1,11 I 7, 1 17 V 5 Ω Output C = pf (see Note B) Output 1% 5% tp 9% tr SWITCIN TIMES 5% 5% tp V 9% 1%. tf tsu TEST CIRCUIT th 5% 5% tw INPUT SETUP AN O WAVEFORMS NOTES: A. The word generator has the following characteristics: tr 1 ns, tf 1 ns, tw = ns, pulsed repetition rate (PRR) = 5 kz, ZO = 5 Ω. B. C includes probe and jig capacitance. Figure. Test Circuit, Switching Times, and Voltage Waveforms RAIN TP K Circuit Under Test IF (see Note A) = 1 m 5 µf 5 + TP A.1 A IF di/dt = A/µs 5% of IRM t t1 t R river IRM V (see Note B) 5 Ω ta trr TEST CIRCUIT CURRENT WAVEFORM NOTES: A. The RAIN terminal under test is connected to the TP K test point. All other terminals are connected together and connected to the TP A test point. B. The V amplitude and R are adjusted for di/dt = A/µs. A V double-pulse train is used to set IF =.1 A, where t1 = 1 µs, t = 7 µs, and t = µs. Figure. Reverse-Recovery-Current Test Circuit and Waveforms of Source-to-rain iode POST OFFICE BOX 655 AAS, TEXAS

8 POWER OIC -BIT ARESSABE ATC SIS APRI 199 REVISE JUY 1995 PARAMETER MEASUREMENT INFORMATION Word enerator (see Note A) S S1 S CR VCC UT N RAIN I 7, Ω m VS Input I VS tw See Note B tav IAS =.5 A V(BR)SX = 5 MIN 9, 1, 11 TEST CIRCUIT VOTAE AN CURRENT WAVEFORMS NOTES: A. The word generator has the following characteristics: tr 1 ns, tf 1 ns, ZO = 5 Ω. B. Input pulse duration, tw, is increased until peak current IAS =.5 A. Energy test level is defined as EAS = IAS V(BR)SX tav/ = mj. Figure. Single-Pulse Avalanche Energy Test Circuit and Waveforms TYPICA CARACTERISTICS I AS Peak Avalanche Current A PEAK AVAANCE CURRENT vs TIME URATION OF AVAANCE TC = 5 C tav Time uration of Avalanche ms Figure 5 rain-to-source On-State Resistance Ω r S(on) RAIN-TO-SOURCE ON-STATE RESISTANCE vs RAIN CURRENT VCC = See Note A TC = 15 C TC = 5 C TC = C I rain Current ma NOTE C: Technique should limit TJ TC to 1 C maximum. Figure 6 POST OFFICE BOX 655 AAS, TEXAS 7565

9 POWER OIC -BIT ARESSABE ATC Ω Static rain-to-source On-State Resistance r S(on) STATIC RAIN-TO-SOURCE ON-STATE RESISTANCE vs OIC SUPPY VOTAE TC = C TC = 15 C TC = 5 C VCC ogic Supply Voltage V TYPICA CARACTERISTICS I = 1 ma See Note A Switching Time ns I = 1 ma See Note A SIS APRI 199 REVISE JUY 1995 SWITCIN TIME vs CASE TEMPERATURE tp tp Figure 7 Figure NOTE : Technique should limit TJ TC to 1 C maximum. tf tr TC Case Temperature C POST OFFICE BOX 655 AAS, TEXAS

10 POWER OIC -BIT ARESSABE ATC SIS APRI 199 REVISE JUY 1995 TERMA INFORMATION Maximum Continuous rain Current of Each Output A I MAXIMUM CONTINUOUS RAIN CURRENT OF EAC OUTPUT vs NUMBER OF OUTPUTS CONUCTIN SIMUTANEOUSY TC = 15 C TC = 5 C TC = 1 C VCC = N Number of Outputs Conducting Simultaneously Maximum Peak rain Current of Each Output A I MAXIMUM PEAK RAIN CURRENT OF EAC OUTPUT vs NUMBER OF OUTPUTS CONUCTIN SIMUTANEOUSY d = % d = 5%.1 VCC = TC = 5 C d =.5 tw/tperiod = 1 ms/tperiod 1 5 d = % d = 1% 6 7 N Number of Outputs Conducting Simultaneously Figure 9 Figure 1 1 POST OFFICE BOX 655 AAS, TEXAS 7565

11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPICATIONS USIN SEMICONUCTOR PROUCTS MAY INVOVE POTENTIA RISKS OF EAT, PERSONA INJURY, OR SEVERE PROPERTY OR ENVIRONMENTA AMAE ( CRITICA APPICATIONS ). TI SEMICONUCTOR PROUCTS ARE NOT ESINE, AUTORIZE, OR WARRANTE TO BE SUITABE FOR USE IN IFE-SUPPORT EVICES OR SYSTEMS OR OTER CRITICA APPICATIONS. INCUSION OF TI PROUCTS IN SUC APPICATIONS IS UNERSTOO TO BE FUY AT TE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright, Texas Instruments Incorporated

12 This datasheet has been download from: atasheets for electronics components.

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