TPIC6259 POWER LOGIC 8-BIT ADDRESSABLE LATCH

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1 POWER OIC 8-BIT ARESSABE ATC ow r S(on).... Ω Typical Avalanche Energy...75 mj Eight Power MOS Transistor Outputs of 5-mA Continuous Current.5-A Pulsed Current Per Output Output Clamp Voltage at Four istinct Function Modes ow Power Consumption description This power logic 8-bit addressable latch controls open-drain MOS transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers, and decoders or demultiplexers. This is a multifunctional device capable of storing single-line data in eight addressable latches with -to-8 decoding or demultiplexing mode active-low MOS outputs. Four distinct modes of operation are selectable by controlling the clear (CR) and enable () inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in () terminal is written into the addressed latch. The addressed MOS transistor output inverts the data input with all unaddressed MOS-transistor outputs remaining in their previous states. In the memory mode, all MOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs. To eliminate the possibility of entering erroneous data in the latch, enable should be held high (inactive) while the address lines are changing. In the -to-8 decoding INPUTS CR SIS9A APRI 99 REVISE SEPTEMBER 995 PN V CC S RAIN RAIN RAIN RAIN S N PN W OR N PACKAE (TOP VIEW) or demultiplexing mode, the addressed output is inverted with respect to the input and all other outputs are high. In the clear mode, all outputs are high and unaffected by the address and data inputs. Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins,,, and are internally connected, and each pin must be externally connected to the power system ground in order to minimize parasitic inductance. A single-point connection between pin 9, logic ground (N), and pins,,, and, power ground (PN) must be externally made in a manner that reduces crosstalk between the logic and load circuits. The TPIC659 is characterized for operation over the operating case temperature range of C to 5 C OUTPUT OF ARESSE RAIN FUNCTION TABE PN CR RAIN7 RAIN6 RAIN5 RAIN S PN EAC OTER RAIN Qio Qio Qio ATC SEECTION TABE SEECT INPUTS RAIN S S S ARESSE FUNCTION X Qio Memory X Clear Addressable atch 8-ine emultiplexer Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PROUCTION ATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 995, Texas Instruments Incorporated POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775

2 POWER OIC 8-BIT ARESSABE ATC SIS9A APRI 99 REVISE SEPTEMBER 995 logic symbol S S S CR Z9 Z 8M /7 9,,R 9,,R 9,,R 9,,R 9,,R 9,5,5R 9,6,6R 9,7,7R This symbol is in accordance with ANSI/IEEE Std 9-98 and IEC Publication RAIN RAIN RAIN RAIN RAIN RAIN5 RAIN6 RAIN7 POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775

3 POWER OIC 8-BIT ARESSABE ATC SIS9A APRI 99 REVISE SEPTEMBER 995 logic diagram (positive logic) S CR RAIN 5 RAIN CR 6 RAIN S 8 CR 7 RAIN CR S RAIN CR 5 RAIN5 CR 6 RAIN6 8 CR 7 RAIN7 CR 9 CR,,, PN POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775

4 POWER OIC 8-BIT ARESSABE ATC SIS9A APRI 99 REVISE SEPTEMBER 995 schematic of inputs and outputs EQUIVAENT OF EAC INPUT TYPICA OF A RAIN OUTPUTS VCC RAIN Input V V N N PN absolute maximum ratings over the recommended operating case temperature range (unless otherwise noted) ogic supply voltage, V CC (see Note ) V ogic input voltage range, V I V to 7 V Power MOS drain-to-source voltage, V S (see Note ) Continuous source-drain diode anode current A Pulsed source-drain diode anode current A Pulsed drain current, each output, all outputs on, I n, T A = 5 C (see Note ) ma Continuous drain current, each output, all outputs on, I n, T A = 5 C ma Peak drain current single output, I M, T A = 5 C (see Note ) A Single-pulse avalanche energy, E AS (see Note ) mj Avalanche current, I AS (see Note ) A Continuous total power dissipation See issipation Rating Table Operating virtual junction temperature range, T J C to 5 C Storage temperature range, T stg C to 5 C ead temperature.6 mm (/6 inch) from case for seconds C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES:. All voltage values are with respect to N and PN.. Each power MOS source is internally connected to PN.. Pulse duration µs, duty cycle %. RAIN supply voltage =, starting junction temperature, (TJS) = 5 C, = m, IAS = A (see Figure ). PACKAE ISSIPATION RATIN TABE TA 5 C POWER RATIN ERATIN FACTOR ABOVE TA = 5 C TA = 5 C POWER RATIN W 5 mw 9. mw/ C 5 mw N 5 mw 9. mw/ C mw POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775

5 POWER OIC 8-BIT ARESSABE ATC SIS9A APRI 99 REVISE SEPTEMBER 995 recommended operating conditions over recommended operating temperature range (unless otherwise noted) MIN MAX UNIT ogic supply voltage, VCC.5 5. igh-level input voltage, VI.8CC V ow-level input voltage, VI.CC V Pulsed drain output current, TC = 5 C, VCC = (see Notes and 5).8.5 A Setup time, high before, tsu (see Figure ) ns old time, high after, th (see Figure ) 5 ns Pulse duration, tw (see Figure ) 5 ns Operating case temperature, TC 5 C electrical characteristics, V CC =, T C = 5 C (unless otherwise noted) PARAMETER TEST CONITIONS MIN TYP MAX UNIT V(BR)SX rain-source breakdown voltage I = ma VS Source-drain diode forward voltage IF = 5 ma, See Note.85 V II igh-level input current VCC = 5., VI = VCC µa II ow-level input current VCC = 5., VI = µa ICC ogic supply current IO =, All inputs low 5 µa IN ISX rs(on) Nominal current Off-state drain current Static drain-source on-state resistance VS(on) =., IN = I, TC = 85 C, 5 ma See Notes 5, 6, and 7 VS =.5 µa VS =, TC = 5 C.5 5 I = 5 ma, VCC =.. I = 5 ma, TC = 5 C, See Notes 5 and 6. Ω VCC =. and Figures 8 and 9 I = 5 ma, VCC =.. switching characteristics, V CC =, T C = 5 C PARAMETER TEST CONITIONS MIN TYP MAX UNIT tp Propagation delay time, low-to-high-level output from 65 ns tp Propagation delay time, high-to-low-level output from C = pf, I = 5 ma, ns tr Rise time, drain output See Figures,, and 65 ns tf Fall time, drain output ns ta Reverse-recovery-current rise time IF F = 5 ma, di/dt = A/µs, trr Reverse-recovery time See Notes 5 and 6 and Figure ns NOTES:. Pulse duration µs, duty cycle % 5. Technique should limit TJ TC to C maximum. 6. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts. 7. Nominal current is defined for a consistent comparison between devices from different sources. It is the current that produces a voltage drop of. at TC = 85 C. thermal resistance RθJA PARAMETER TEST CONITIONS MIN MAX UNIT W package Thermal resistance junction-to-ambient to All 8 outputs with equal power C/W N package 8 POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775 5

6 POWER OIC 8-BIT ARESSABE ATC SIS9A APRI 99 REVISE SEPTEMBER 995 PARAMETER MEASUREMENT INFORMATION Word enerator (see Note A) V SCC I S S UT 7, R = 95 Ω Output 7 CR RAIN N PN C = pf 9,, (see Note B), TEST CIRCUIT CR S S S RAIN5 RAIN VOTAE WAVEFORMS V. V. Figure. Typical Operation Mode Word enerator (see Note A) Word enerator (see Note A) 8 VCC N 9 UT TEST CIRCUIT CR RAIN PN 9,,, I 7, 7 V 95 Ω Output C = pf (see Note B) Output % tsu 5% tp 9% tr SWITCIN TIMES 5% th 5% 5% tw INPUT SETUP AN O WAVEFORMS 5% tp V 9% %. tf Figure. Test Circuit, Switching Times, and Voltage Waveforms NOTES: A. The word generator has the following characteristics: tr ns, tf ns, tw = ns, pulsed repetition rate (PRR) = 5 kz, ZO = 5 Ω. B. C includes probe and jig capacitance. 6 POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775

7 POWER OIC 8-BIT ARESSABE ATC PARAMETER MEASUREMENT INFORMATION SIS9A APRI 99 REVISE SEPTEMBER 995 RAIN TP K Circuit Under Test IF (see Note B) = m 5 µf 5 + TP A.5 A IF dl/dt = A/µs t 5% of IRM t t R river IRM V (see Note A) 5 Ω ta trr TEST CIRCUIT CURRENT WAVEFORM NOTES: A. The V amplitude and R are adjusted for di/dt = A/µs. A V double-pulse train is used to set IF =.5 A, where t = µs, t = 7 µs, and t = µs. B. The RAIN terminal under test is connected to the TP K test point. All other terminals are connected together and connected to the TP A test point. Figure. Reverse-Recovery-Current Test Circuit and Waveforms of Source-rain iode Word enerator (see Note A) S S S CR N VCC UT RAIN PN I 7, 7. Ω = m VS Input I VS tw See Note B tav IAS = A V(BR)SX = MIN 9,,, TEST CIRCUIT NOTES: A. The pulse generator has the following characteristics: tr ns, tf ns, ZO = 5 Ω. B. Input pulse duration, tw, is increased until peak current IAS = A. Energy test level is defined as EAS = IAS V(BR)SX tav/ = 75 mj. VOTAE AN CURRENT WAVEFORMS Figure. Single-Pulse Avalanche Energy Test Circuit and Waveforms POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775 7

8 POWER OIC 8-BIT ARESSABE ATC SIS9A APRI 99 REVISE SEPTEMBER 995 TYPICA CARACTERISTICS I AS Peak Avalanche Current A.. PEAK AVAANCE CURRENT TIME URATION OF AVAANCE TJS = 5 C MAXIMUM CONTINUOUS RAIN CURRENT OF EAC OUTPUT NUMBER OF OUTPUTS CONUCTIN SIMUTANEOUSY 8 Maximum Continuous rain Current of Each Output ma I TA = 5 C TA = 5 C VCC = TA = C.... tav Time uration of Avalanche ms N Number of Outputs Conducting Simultaneously Figure 5 Figure 6 MAXIMUM PEAK RAIN CURRENT OF EAC OUTPUT NUMBER OF OUTPUTS CONUCTIN SIMUTANEOUSY Maximum Peak rain Current of Each Output A I.5.5 d = 5% VCC = TA = 5 C d = tw/tperiod = ms/tperiod d = 8% d = 5% d = % N Number of Outputs Conducting Simultaneously Figure 7 8 POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775

9 POWER OIC 8-BIT ARESSABE ATC TYPICA CARACTERISTICS SIS9A APRI 99 REVISE SEPTEMBER 995 Static rain-source On-State Resistance Ω r S(on) STATIC RAIN-SOURCE ON-STATE RESISTANCE RAIN CURRENT VCC = See Note A TC = 5 C TC = 5 C TC = C Static rain-source On-State Resistance Ω S(on) r STATIC RAIN-SOURCE ON-STATE RESISTANCE OIC SUPPY VOTAE TC = 5 C TC = 5 C TC = C I = 5 ma See Note A I rain Current A VCC ogic Supply Voltage V Figure 8 Figure 9 7 SWITCIN TIME FREE-AIR TEMPERATURE tr 6 tp Switching Time ns 5 tf I = 5 ma See Note A tp TA Free-Air Temperature C Figure NOTE A: Technique should limit TJ TC to C maximum. POST OFFICE BOX 655 AAS, TEXAS 7565 POST OFFICE BOX OUSTON, TEXAS 775 9

10 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, license, warranty or endorsement thereof. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated TI product or service, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use. Resale of TI s products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use. Also see: Standard Terms and Conditions of Sale for Semiconductor Products. Mailing Address: Texas Instruments Post Office Box 655 allas, Texas 7565 Copyright, Texas Instruments Incorporated

TPIC6B259 POWER LOGIC 8-BIT ADDRESSABLE LATCH

TPIC6B259 POWER LOGIC 8-BIT ADDRESSABLE LATCH POWER OIC -BIT ARESSABE ATC ow r S(on)...5 Ω Typical Avalanche Energy... mj Eight Power MOS-Transistor Outputs of 15-mA Continuous Current 5-mA Typical Current-imiting Capability Output Clamp Voltage...