A Wideband Low-Power Cascade Modulator Based on Considerations of the Integrator Settling Behavior

Transcription

1 Proceeding of the 5th WEA nt. onf. on ntrumentation, Meaurement, ircuit and ytem, Hangzhou, hina, April 16-18, 006 (pp11-116) A Wideband Low-Power acade Modulator Baed on onideration of the ntegrator ettling Behaior Y YN 1, HENRH KLAR, PETER WENNEKER 1 (1) TO-EMEA, RF/F nnoation enter Munich Freecale emiconductor chatzbogen 7, 8189 Munich, Gemany () Technical Unierity of Berlin -ntitute of omputer Engineering and Microelectronic, Berlin Germany Abtract: - Thi paper preent a tudy of the ect of ettling error due to finite gain-bandwidth product (GBW) and lew-rate (R) of opamp in Σ A/D modulator. Baed on the theoretical point of iew, a new architecture for cacade multibit Σ A/D modulator i propoed to achiee better performance at low oerampling ratio. The performance improement i analyzed and compared with traditional cacade architecture. imulation reult how that the propoed igma-delta modulator relaxe the circuit requirement on the GBW of opamp up to twice the ampling frequency. At the ame time, the requirement on lew rate i ignificantly low, o that it can be automatically atified for an adequate ettle during it ettling phae. Therefore, the propoed architecture i uitable for wideband and low-power application. Moreoer, it i hown that the propoed architecture i alo immune to other non-idealitie, uch a finite D-gain, capacitor mimatching and non-linear D-gain. Key-Word: - Analog integrated circuit, high-peed high-reolution analog to-digital conerter, and igma delta modulator 1 ntroduction High-peed high-reolution analog-to-digital conerter (AD) are one of the key deice in meaurement equipment and communication ytem. Therefore, many different AD baed on ariou kind of AD topologie hae been deeloped. Among them, igma-delta AD hae been frequently applied to realize high reolution under the conideration of low cot and power conumption. For high-peed application, integrator defectie ettling i the main bottleneck in the preent wideband igma-delta modulator deign. Many low oerampling high-reolution modulator ue MAH tructure [] [4], where 1-bit quantizer i commonly ued in the firt tage, to aoid the performance degradation due to the non-linearity of DA. Howeer, thee tructure need a high opamp GBW to reliee the impact on the ettling error. With the deelopment of the icient dynamic element matching (DEM) technique [6]-[8], multibit quantization ha been recently ued in ingle-loop igma-delta modulator to realize high-reolution at low OR. Although, the required opamp GBW can be relaxed by uing multibit quantizer, it i practically difficult to be obtained, ince high-order ingle-loop modulator are formed by cacading multiple integrator in the forward path, and therefore, the dc gain of the forward path i ery high. A a reult, the ignal, which i ened by quantizer, i almot independent of the input ignal. Therefore the input leel of integrator are till high [8]. Another problem aociated with ettling error of all of the aforementioned tructure i the appearance of harmonic ditortion due to the gain dependence of the integrator on it input, when opamp dynamic operation i in partial lewing. n thi paper, the ect of ettling error thermal noie on the performance of igma-delta modulator will be dicued, and an icient interdependency between finite GBW and R of opamp will be decribed for etimating the minimum demand on the GBW of opamp. Following it, a new cacade igma-delta modulator architecture i preented, which combine the merit of cacaded igma-delta Modulator tructure, low ditortion tructure [9], and multibit quantization. Thi AD deelopment relaxe the GBW of opamp a low a twice the ampling frequency f, much lower than that in other igma-delta modulator implementation [3]-[5]. Another adantage of the propoed modulator i that it i inenitie to circuit non-idealitie. ection contain a general analyi of the ettling behaior in the integrator. ection 3 decribe the newly-propoed architecture. ection 4 preent the imulation reult for the alidation of performance improement. The concluion i followed in ection 5.

2 Proceeding of the 5th WEA nt. onf. on ntrumentation, Meaurement, ircuit and ytem, Hangzhou, hina, April 16-18, 006 (pp11-116) Analyi of ettling Behaior.1 integrator implified model The ettling error i caued by GBW and R of amplifier in igma-delta modulator [1] []. The implified model of a integrator i hown in Fig.1, which conit of two pair of input ampler, a ampling capacitor, an integration capacitor and a ingle-pole amplifier. The amplifier i modeled by the tranconductance g m, with biaing current BA, G and L tanding for a paraitic capacitor aociated with the ummation node of the amplifier input and a capacitie load, which include paraitic at the amplifier output node and the paraitic aociated with the bottom plate of the integration capacitor, repectiely. Fig. 1 implified MO integrator chematic n thi cae, the equialent cloed-loop capacitance at the integrator output depend on the equialent open-loop capacitance ( cl,ol ) and the dc feedback factor (f) during the integration phae, and it i gien by [11]: eq, ol ( + G + ) L eq, cl = = + G + f (1) Therefore, the cloe-loop time contant and lew rate are obtained, repectiely []: eq, cl τ = () g R m BA = (3) eq, cl Furthermore, the relationhip between the lew rate and the time contant ha been deried uing the imple quare-law model of the MO tranitor []: BA G th R * τ = = = (4) g m Where G i the quiecent gate-to-ource oltage of the input tranitor, th i it threhold oltage, and i the oerdrie oltage. Reforming (4) by introducing gain-bandwidth product GBW, a more deign-oriented contant i obtained: R GBW = π (5) t indicate that both deign parameter R and GBW are directly proportional to BA, and therefore, the ratio i quite contant in opamp, which depend directly on the oerdrie oltage.. ettling Behaior of the integrator With repect to the ettling error, two eparate cae hae been conidered [5]: 1. n the cae of R (7) τ there i no lew-rate limitation, and the integrator output will be linearly ettled.. n the cae of R < (8) τ and 1 t0 = τ < (9) R f the op-amp i firt in lewing within t 0, and therefore, the integrator output how a partially R limited nonlinear ettling. mpoing (4) in (7) and reforming, we get the linearly-ettling condition: (10) imilarly, impoing (4) in (8) and (9), the partially R limited nonlinear ettling condition with GB =GBW/f i: < 1 GB < (11) +π The linear ettling error can be approximated a: T ε t exp = exp ( πgb ) (1) τ wherea the nonlinear ettling error can be approximately ealuated a: R* τ ε t *exp T τ 1+ Rτ = πgbw *exp 1+ f *exp πgb 1+ notm (13)

3 Proceeding of the 5th WEA nt. onf. on ntrumentation, Meaurement, ircuit and ytem, Hangzhou, hina, April 16-18, 006 (pp11-116) caling factor in the nth tage. With the conideration of phyically achieable output wing, in combination of behaior imulation and tatitical optimization, we obtain; g i1 =1 g i =1 g i1 =0.5 i=.n-1 g N1 =1 g N =0.5 g N3 =1 H(z) in the block denote the integration function: 1 z H ( z) = (14) 1 1 z Fig. The relationhip between the demanded alized GB and the relatie integrator input leel for a gien ettling error Fig. illutrate the correponding relationhip between the alized GB and the integrator relatie input leel. The output repone of the integrator i aumed to be ettled to a gien error of 0.05%, 0.1% and 0.5%, repectiely, and =00m. t i hown that the low input leel of the integrator i the key to reduce the required alized gain-bandwidth GB. Note that mot of the other exiting igma-delta modulator hae a great occurrence that the input leel of the integrator are relatiely large, o that eq. (10) i not atified. Therefore, they operate motly in the non-linear ettling region. onequently, a relatiely large opamp gain-bandwidth i required, and harmonic i produced. Additionally, the opamp alized gain-bandwidth GB can alo be reduced by uing a certain topology, which i inenitie to the ettling error. 3 Propoed Σ Modulator With repect to aing power and maximizing the conerion rate, the mot eential iue in the deign of AD i to reduce the alized GB a much a poible, wherea the reolution of the conerter i not deteriorated. t mean, when the ignal bandwidth i fixed, f i alo fixed, and the reduced requirement on the opamp GBW reult in a maller BA, and thu maller power conumption; on the other hand, when the opamp GBW i fixed due to technology limitation, a higher f can be ued, reulting in extended ignal bandwidth. Baed on the analyi on the ettling behaior of integrator, a new alternatie approach to realize wideband and wide-dynamic-range AD i propoed, in which the low-ditortion multi-bit igma-delta modulator concept [9] i introduced into cacaded igma delta modulator. The propoed generic architecture i hown in Fig.3, where g N1, g N, g N3 are the intertage Fig. 3. The propoed N-tage cacade igma-delta modulator deally, the quantization error in all tage except the lat one of the cacade tructure can be completely cancelled in the digital domain. Therefore, the output ignal can be expreed a the combination of the delayed input ignal and the (N+1) th -order noie-haped quantization noie (N i the number of cacaded tage), that i: ( N 1) 1 N + 1 Y = X * z + E N (1 z ) (15) where E N indicate the lat-tage quantization error. Note that the propoed intertage caling factor do not degrade the dynamic range a other cacade tructure. The key adantage oer other high-order cacade i that the indiidual input leel of the integrator i coniderably lower, een with high feedforward gain / =1 in the two integrator of firt tage, a only low-leel quantization noie E i introduced in the integrator loop. To illutrate thi, Fig. 4 how the hitogram of the integrator input (X 1 and X ) and quantizer input (X 3 ) for an input ignal with amplitude of -3 dbf. Fig.5 preent the performance improement with repect to the ettling error by comparing the NDR, ignal-to-(noie+ditortion) ratio,. the alized GB

4 Proceeding of the 5th WEA nt. onf. on ntrumentation, Meaurement, ircuit and ytem, Hangzhou, hina, April 16-18, 006 (pp11-116) and OR of a (4b) cacade [4] with the one decribed in thi paper with N=4 and 4-bit quantizer in the firt and third tage, repectiely. The reult of behaioral imulation are obtained by auming that the lew rate of opamp alway follow the relationhip of (5), where =00 m. t i hown that the needed gain-bandwidth-product in Hz of the propoed one i only f, wherea that of the traditional cacade i oer 4 f [3] [5], in order to aoid the impact of the ettling error. Note that there i a ytematic lo of 1 bit, or 6 db NDR in the traditional cacade architecture due to the maller amplifying factor in comparion with an ideal (N+1) th -order igma-delta modulator. Thi lo i aoided in the propoed architecture, ince the propoed integrator gain are optimized to obtain the ideal (N+1) th -order noie haping function. Returning to the propoed 4-b quantizer in the firt tage, note that the quantization noie i low, o that the quantization noie leakage i ignificantly low. The new modulator architecture dramatically relaxe the requirement of high preciion analog tage epecially that of opamp with high dc-gain, which i more difficult to obtain a technologie adance [10]. Finally, the propoed architecture i inenitie to the nonlinearity of opamp by inerting the additional feed-forward path from the modulator input directly to the quantizer input in the firt tage, where the loop filter procee only haped quantization noie. ince, ideally, no input ignal i proceed by the loop-filter integrator; therefore, no harmonic ditortion i generated [9]. 4 imulation Reult Fig. 4 Firt tage hitogram of the integrator input and quantizer input relatie to the F oltage. (a) (a) (b) Fig. 6 The output pectra of the propoed (4b)-1-1-1(4b) (a) with ideal cae, (b) with circuit non-idealitie (b) Fig.5 NDR alized GB and OR of (a) the cacade [4], and (b) the propoed one in thi paper with N=4. Fig. 7 The NDR againt input leel in the propoed igma-delta modulator with Monte arlo analyi. The propoed architecture ha been alidated by behaior imulation of a (4b)-1-1-1(4b) modulator in MATLAB. The modulator wa deigned with a ampling rate of 00 MHz, a fixed OR of 8, yielding a ignal bandwidth of 1.5 MHz. The input i a 3 MHz ine-wae ignal with amplitude of -3 dbf. The 4 bit

5 Proceeding of the 5th WEA nt. onf. on ntrumentation, Meaurement, ircuit and ytem, Hangzhou, hina, April 16-18, 006 (pp11-116) quantizer are ued for the firt- and lat tage modulator, and the ingle-bit quantizer are ued for other modulator. The caling loop gain are et a mentioned before. The finite opamp dc gain, unity-gain frequency, and capacitor mimatching in the integrator of the firt tage are et to 55 db, 400 MHz (R 60 /µ) and 0.1%, repectiely. The output pectra of the ideal cae and the aforementioned non-ideal cae are hown in Fig. 6. The achieable NDR i 84. db and 8.5 db, repectiely. Fig. 7 illutrate the NDR againt the input leel for the propoed modulator with Monte arlo analyi of 30 time, where not only the proce ariation of capacitor are conidered a the wort cae σ =0.5%, but alo the deign parameter ariation of finite opamp dc gain and GBW frequency are aumed a large a 0% deiated from their nominal alue, repectiely. t i hown that the achieable peak NDR and DR of the propoed modulator are not enitie to circuit non-idealitie, and een with the aumed large parameter ariation the performance degradation i only about 6 db. Table 1 preent the predicted performance ummary of the propoed (4b) (4b) igma-delta modulator. ampling frequency 00 MHz Digital output rate (M=8) 5 M/ DR(ideal cae) 85 db Peak NDR(nonideal cae) 8.5 db Peak NDR(wore cae) 79. db DR (ideal cae) 87.8 db DR (wore cae) 81.5 db Etimated Power onumption (1.8upply) mw Table 1 performance ummary 5 oncluion An architecture of the wideband and high-dr cacade high-order igma-delta modulator i propoed. t ue the low-ditortion econd-order igma-delta modulator a the firt tage of a cacade igma-delta modulator, therefore both integrator in the firt tage proce only low power quantization noie. onequently, the requirement on the opamp gain-bandwidth-product of the propoed igma-delta modulator i ignificantly relaxed by f, which i lower than 4 f in other traditional igma-delta modulator implementation. On the other hand, uing a multibit quantizer in the firt tage reduce the enitiity to non-idealitie of circuit, uch a finite dc-gain of opamp and capacitor mimatching. Hence, the propoed architecture i a uitable candidate for wideband, high-reolution and low-power application. Reference: [1] F. Medeiro, B. Perz-erdu, A. Rodriquez-azquez, and J.L. Huerta Modeling OpAmp-nduced Harmonic Ditortion for witched-apacitor Σ modulator Deign, EEE A1994, pp , Jun [] L.A. William, B. A. Wooley A Third-Order igma-delta Modulator with Extended Dynamic Range, EEE J. olid-tate ircuit, ol. 9, pp , Mar [3] A. M. Marque,. Peluo, M. teyaert, and W. anen, A 15-b reolution -MHz Nyquit-rate delta igma AD in a 1-µm MO technology, EEE J. olid-tate ircuit, ol. 33, pp , Jul [4] R. del Rio, F. Medeiro, and A. Rodriquez-azquez, HGH-ORDER AADE MULTBT Σ MODULATOR FOR xdl APPLATON, EEE A000,, pp , May [5] R. del Río et al., Reliable analyi of ettling error in integrator Application to the deign of high-peed Σ Modulator, EEE A 000 pp , May [6] K. leugel,. Rabii, and B. A. Wooley, A.5- igma-delta modulator for broadband communication application, EEE J. olid-tate ircuit, ol. 36, pp , Dec [7]. Fujimori, L. Longo, A. Hairapetian, K. eiyama,. Koic, J. ao, and hu-lap han A 90-dB NR.5-MHz Output-Rate AD Uing acaded Multibit Delta igma Modulation at 8 Oerampling Ratio, EEE J. olid-tate ircuit, ol. 35, pp , Dec [8] P. Balmelli Q. Huang, A 5M/ 14b 00mW Σ Modulator in 0.18 µm MO, EEE Dig. Tech. Paper, 74-75, 004. [9] J. ila, U.-K. Moon, J. teengaard, and G.. Teme, Wideband low-ditortion delta-igma AD topology, Electron. Lett., ol. 37, pp , Jun [10] Yi. Yin, H. Klar, P. Wenneker, A AADE MULTBT Σ MODULATOR WTH REDUED ENTTE TO NON-DEALTE, EEE A005, pp , May [11] Y. Geert, A. Marque, M. teyaert, and W. anen, A 3.3-, 15-bit, Delta-igma AD with a ignal Bandwidth of 1.1 MHz for ADL Application. EEE Journal of olid-tate ircuit, ol. 34, pp , July 1999.