A Solution for DC-DC Converters Study
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1 Advance in Automatic ontrol, Modelling & Simulation A Solution for D-D onverter Study MIHAI RAA, GABRIELA RAA, DREL ERNMAZU, LEN MANDII, RISINA PRDAN Faculty of Electrical Engineering and omputer Deign Stefan cel Mare Univerity of Suceava Str. Univeritatii, Nr. 3, Suceava RMANIA mihair@eed.uv.ro, gabrielar@eed.uv.ro, dorelc@eed.uv.ro, lmandici@eed.uv.ro, critinap@eed.uv.ro Abtract: - A olution for the tudent experimental tudy of the teady-tate characteritic from the buck, boot and buck-boot converter i preented. At the outet, the propoed olution which permit tudent to oberve the influence of the place and inductor place in the converter on the output voltage i preented. Finally, ome experimental reult illutrating the influence of witching frequency, witch duty-ratio, nubber capacitor, output current, etc. to dc-dc converter operation are offered. Key-Word: - D-D power converter, Power emiconductor device, Pule width modulation converter, Switched Mode Power Supplie Introduction D-D converter are widely ued in regulated witch-mode dc power upplie and in dc motor drive application. Switch-mode dc-dc converter (called SMPS Switched Mode Power Supplie) are ued to convert the unregulated dc input into a controlled dc output at a deired voltage level a preented in Fig. [], [2]. converter chema and to be able to build the tudied converter independently and fat [2]-[5]. 2 D-D converter without electrical iolation he baic dc-dc converter topologie, without electrical iolation, are the tep-down (buck), tepup (boot) and buck-boot converter [], [6]. Fig.. D-D converter ytem he main feature of SMP are high efficiency and high power denity. hey are ued in many domain like computer, telecom, automotive and dometic application. Mot power upplie are deigned to meet ome or all the following requirement: - regulated output; - iolation; - multiple output. In thi paper, we propoe a olution to make the power electronic lab work more attractive for tudent. hi olution aim at increaing tudent educational acquiition. eacher run the lab work uccefully provided that the tudent undertand the tudy chema and the influence of ome of it component in the good work of the converter. f coure, it i important for tudent both to identify each component of the 2. Step-down (Buck) converter A the name implie [], a tep-down converter produce a lower average output voltage than the dc input voltage i. hi converter i deigned to work for a pure reitive load, a hown in Fig. 2. Fig. 2. Step-down converter he average output voltage can be calculated in term of the witch-duty ratio (α t N / ): t v 0 α 0 N ( t) dt i i () ISBN:
2 Advance in Automatic ontrol, Modelling & Simulation So, we can control by varying the duty ratio, called Pule Width Modulation (PWM). he ignal which control the on/off tate of the witch i generated by comparing a ignal level control voltage v control with a repetitive waveform (awtooth waveform). he duty ratio i controlled by the level of v control and the witching frequency by the awtooth waveform frequency. he output voltage fluctuation i very important. o minimize thi fluctuation, a low-pa filter coniting of an inductor and a capacitor can be ued. Fig. 3 illutrate the teady-tate waveform for continuou conduction, where the inductor current flow continuouly. 2 ( α) S 8 L 2 π f ( ) c α f where, f i the witching frequency and (3) f c i the low-pa filter frequency. 2π L oltage ripple can be minimized by electing fc<<f and thi ripple i independent of the output load power a the converter operate in a continuou conduction mode. 2.2 Step-up (Boot) converter he tep-up (boot) converter preented in Fig. 4.a, produce a higher average output voltage than the dc input voltage, a it name ugget. Main application of thee converter are the regenerative braking of dc motor and regulated dc power upplie [], [7]. Fig. 3. ontinuou conduction in tep-down converter he output voltage ripple depend on the capacitance value, which can be calculated by conidering the waveform preented in Fig. 3. Auming that all of the ripple component in flow through the capacitor and their average component flow through the load reitor, the haded area in Fig. 3 repreent an additional charge Q. herefore, the peak-to-peak voltage ripple, can be obtained a follow: and Q I 8 8 L L ( α) (2) Fig. 4. Step-up dc-dc converter In Fig. 4.b it i illutrated the inductor voltage in teady tate. If we equate the integral of thi voltage over one time period to zero, ( ) 0 i tn + i FF (4) and rearrange term, the output voltage can be calculated: i t S FF α (5) ISBN:
3 Advance in Automatic ontrol, Modelling & Simulation he output voltage ripple for thi converter, conidering that the output current i contant, can be calculated imilarly to the previou cae Q I α α and R where τ R i time contant. α R α τ (6) (7) 2.3 Buck-Boot converter hi converter (Fig. 5.a) i a combination of the two baic topologie (buck converter and boot converter). he main application of buck-boot converter are the regulated dc power upplie, where the output voltage can be either higher or lower than the input voltage, and where a negative polarity output i deired, with repect to the common terminal of the input voltage [], [2] 3 Experimental reult It very important for the tudent attending power electronic lab work to undertand how thee converter work and to oberve the influence of inductor value L, witching frequency f, witch duty-ratio α, nubber capacitor, output current I, etc. to dc-dc converter functioning and performance. 3. Deign example Before analyzing the circuit diagram topology of buck (Fig.2), boot (Fig.4.a) and buck-boot (Fig.5.a) converter preented in ection 2, it i very important for the tudent to undertand that the converter ue the ame component: activelycontrolled witch uch a tranitor (MSFE, IGB or BJ), diode, inductor, capacitor and reitive load. If we ue an IGB module, thi will be ufficient for controlled witch and diode (uing freewheeling diode placed in parallel with the IGB that i not need). So, all component ued to build thee converter are preented in Fig. 6, where in addition to the component above mentioned, there are alo IGB driver (we ue SKHI0 from Semikron) and PWM control board, which permit to adjut the frequency and duty cycle of IGB control ignal [8]-[0]. - IGB Module, - IGB Driver, - PWM control board Inductor and apacitor omponent Fig. 5. Buck-boot converter Auming that the integral of inductor voltage (hown in Fig. 5.b) over one time period equal to zero and rearranging term, it can be obtained the converter output voltage: S α (8) i tff α he formula for output voltage ripple, conidering that the output current i contant, i identical to boot converter formula. Reitive Load Fig. 6. he component for dc-dc converter Fig. 7 how the circuit diagram topology for buck (Fig. 7.a), boot (Fig. 7.b) and buck-boot (Fig. 7.c) converter uing the component preented in Fig. 6. All experimental tet are performed with 3.8. ISBN:
4 Advance in Automatic ontrol, Modelling & Simulation (c) Fig. 7. ircuit diagram topology of dc-dc converter 3.2 Experimental waveform he experimental reult for buck converter are illutrated in Fig. 8. he influence of witching frequency f on buck converter working i illutrated in Fig. 8.a, where f 2. khz and in Fig. 8.b, where f 0 khz. hee reult demontrate that increaing the witching frequency f will bring about a reduction of both inductor current ripple and output voltage ripple. In Fig. 9, it i preented the experimental waveform for boot converter with (Fig. 9.a) and without (Fig. 9.b) nubber capacitor. he nubber capacitor (not hown in Fig. 7) i neceary to limit the voltage overhoot, which appear becaue the high current i witched fat. (c) Fig. 8. Experimental waveform for the buck converter In practice, it i very important to be able to aemble thi capacitor a cloe a poible (to minimize elf-inductance) to protect the power emiconductor. In thi way, the tudent can tudy the nubber capacitor influence and the way voltage overhoot are limited. he IGB turn-off regime i characterized by ISBN:
5 Advance in Automatic ontrol, Modelling & Simulation damped ocillation between nubber capacitor and D-link capacitor. he frequency of the damped ocillation (typically in the range of 00 khz up to everal MHz) i determined by the bu bar paraitic inductance and the nubber capacitor value. hi frequency can be calculated with equation (9), for our application f 00 khz. modifying the load reitor value and oberve it influence to the converter working. f 2 π L D Link nubber (9) Fig. 0. Experimental waveform for the buck-boot converter Fig. 9. Experimental waveform for the boot converter he experimental waveform for the buck-boot converter are preented in Fig. 0. In thi cae, the output voltage can be maller than the input voltage (Fig. 0.a) or higher than the input voltage (Fig. 0.b) by adjuting the witch duty-ratio. For all circuit diagram topology the tudent can vary the duty-ratio (α), meaure the output voltage and oberve the relation between thee two parameter (i.e. Fig.8.b and Fig. 8.c). f coure, they can alo adjut the output current I by 4 oncluion hi olution for the tudy of buck, boot and buck-boot converter i very ueful for power electronic lab ince it offer many advantage: - helping tudent to undertand that thee converter ue the ame component which are ued to make different electrical circuit topologie; - offering the poibility to change the electrical chema topology very eaily; - improving the tudy of influence of witching frequency, witch duty-ratio and output current to inductor voltage ( ), inductor current ( ), output voltage ( ) and output voltage ripple for all converter; - allowing the tudy of nubber capacitor effect; ISBN:
6 Advance in Automatic ontrol, Modelling & Simulation - allowing to make a comparative analyi of the ignal for thee three converter; - offering the poibility to tudy the converter in both continuou-conduction and dicontinuouconduction mode working; Acknowledgement hi paper wa upported by the project Progre and development through pot-doctoral reearch and innovation in engineering and applied cience PRiDE - ontract no. PSDRU/89/.5/S/57083, project cofunded from European Social Fund through Sectorial perational Program Human Reource (IREE), ol. 3, Iue: 5, ctober 200, pp [0] N. L. elanovic, I. L. elanovic, Z. R. Ivanovic, A New Approach to Power Electronic Simulation, ontrol and eting, Advance in Electrical and omputer Engineering, ol. 2, No., 202, pp Reference: [] N. Mohan,. M. Underland, W. P. Robbin, Power Electronic, onverter, Application and Deign, John Wiley & Son, Inc., [2] M. Rata, G. Rata, L.D. Milici, I. Graur, An Efficient Solution of the Step-down onverter for Student eaching, Electronic and Electrical Engineering (Elektronika ir Elektrotechnika), Nr: 3(9), 2009, pp [3] P. Miller, Switch mode power upply teaching experiment, 39th International Univerititie Power Engineering onference, 2005, ol - 3, pp [4] SA. Shiravar, eaching practical deign of witch-mode power upplie, IEEE ranaction on Education, ol. 47, Iue: 4, 2004, pp [5] U. Probt, Economic and veratile laboratory etup for teaching power electronic in bachelor coure, 3 H European onference on Power Electronic and Application ~ EPE2009, ol. -9, pp [6] L. Fan, Y. Yu, Adaptive Non-ingular erminal Sliding Mode ontrol for D-D onverter, Advance in Electrical and omputer Engineering, ol., No. 2, 20, pp [7] K.I. Hwu, W.. u,.f. huang, A Step-Up onverter Baed on harge Pump and Dual Boot, International Review of Electrical Engineering (IREE), ol. 7, Iue: 4 Jul-Aug 202, pp [8] A. Pleşca, hermal Analyi of Power Semiconductor onverter, Power Quality / Book, In INEH (Ed.), 20, ISBN [9] A. Pleca, hermal ranient Regime Analyi for Fue and Power Semiconductor, International Review of Electrical Engineering ISBN:
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