Phase-Locked Loops (PLL)

Transcription

1 Phae-Locked Loop (PLL) Recommended Text: Gray, P.R. & Meyer. R.G., Analyi and Deign of Analog Integrated Circuit (3 rd Edition), Wiley (992) pp

2 Introduction The phae-locked loop concept wa firt developed in the It ha ince been ued in communication ytem of many type, particularly in atellite communication ytem. Until recently, however, phae-locked ytem have been too complex and cotly for ue in mot conumer and indutrial ytem, where performance requirement are more modet and other approache are more economical. The PLL i particularly amenable to monolithic contruction, however, and integrated-circuit phae-locked loop can now be fabricated at very low cot. Their ue ha become attractive for many application uch a FM demodulator, tereo demodulator, tone detector, frequency yntheizer, and other.

3 Definition A PLL i a feedback ytem that include a. Voltage Controlled cillator (VC), 2. phae detector, and 3. low pa filter within it loop. It purpoe i to force the VC to replicate and track the frequency and phae at the input when in lock. The PLL i a control ytem allowing one ocillator to track with another. It i poible to have a phae offet between input and output, but when locked, the frequencie mut exactly track.

4 The PLL output can be taken from either. V cont, the filtered (almot DC) VC control voltage, or 2. from the output of the VC depending on the application. The former provide a baeband output that track the phae variation at the input. The VC output can be ued a a local ocillator or to generate a clock ignal for a digital ytem. Either phae or frequency can be ued a the input or output variable. f coure, phae and frequency are interrelated by: dϕ t ω( t) and ϕ( t) ϕ(0) + ω( t') dt' dt 0

5 Application: There are many application for the PLL:. a. FM demodulator 2. b. Frequency yntheizer 3. c. Clock generation You hould note that there will be different input and output variable and different deign criteria for each cae, but you can till ue the ame baic loop topology and analyi method.

6 Phae detector: Phae detector compare the phae at each input and generate an error ignal, v e (t), proportional to the phae difference between the two input. D i the gain of the phae detector (V/rad). v e ( ϕ ( t) ϕ ( )) ( t) t D out A one familiar circuit example, an analogue multiplier (Gilbert cell) can be ued a a phae detector. Recall that the mixer take the product of two input. v e (t) A(t)B(t). If, in A( t) Aco( ω0t + ϕ A ) and B( t) B co( ω0t + ϕ B ) A( t) B( t) AB co( ω0t + ϕ A ) co( ω0t + ϕ B ) ( AB / 2) [ co( 2ω t + ϕ + ϕ ) + co( ϕ ϕ )] 0 A B A B

7 Since the two input are at the ame frequency when the loop i locked, we have:. one output at twice the input frequency and 2. an output proportional to the coine of the phae difference. v ( AB / 2) [ co( 2ω t + ϕ + ϕ ) + ( ϕ ϕ )] e( t) 0 co A The doubled frequency component mut be removed by the lowpa loop filter. Any phae difference then how up a the control voltage to the VC, a DC or lowly varying AC ignal after filtering. B A B

8 Tranfer Characteritic The averaged tranfer characteritic of uch a phae detector i hown below. Note that in many implementation, the characteritic may be hifted up in voltage (ingle upply/ingle ended). If the phae difference i π /2, then the average or integrated output from the XR-type phae detector will be zero (or V DD /2 for ingle upply, digital XR). The lope of the characteritic in either cae i D.

9 Voltage-Controlled cillator (VC) In PLL application, the VC i treated a a linear, time-invariant ytem. Exce phae of the VC i the ytem output. ϕ out t V cont dt' The VC ocillate at an angular frequency, ω out. It frequency i et to a nominal ω 0 when the control voltage i zero. Frequency i aumed to be linearly proportional to the control voltage with a gain coefficient or VC (rad//v). ω out ω + V cont Thu, to obtain an arbitrary output frequency (within the VC tuning range), a finite V cont i required. Let define φ out φ in φ.

10 VC (cont.) In the figure below, the two input to the phae detector are depicted a quare wave. The XR function produce an output pule whenever there i a phae mialignment. Suppoe that an output frequency ω i needed. From the upper right figure, we ee that a control voltage V will be neceary to produce thi output frequency.

11 VC (cont.) The phae detector can produce thi V only by maintaining a phae offet φ 0 at it input. In order to minimize the required phae offet or error, the PLL loop gain, D, hould be maximized, ince ϕ 0 V ω ω0 D D Thu, a high loop gain i beneficial for reducing phae error.

12 PLL dynamic repone To ee how the PLL work, uppoe that we introduce phae tep at the input at t t. So that, ϕ ( ) in ωt + ϕ0 + ϕu t t Since we have a tep in phae, it i clear that the initial and final frequencie mut be identical: ω. But, a temporary change in frequency i neceary to hift the phae by f.

13 Dynamic Repone ( ϕ) The area under ω out give the additional phae becaue V cont i proportional to frequency. ϕ ωoutdt Vcont ( t) dt t t After ettling, all parameter are a before ince the initial and final frequencie are the ame. Thi how that V cont (t) can be ued to monitor the dynamic phae repone of the PLL.

14 Dynamic Repone ( ω.) Now, let invetigate the behaviour during a frequency tep: ϕ 2 ϕ + ϕ The will caue the phae difference to grow with time Thi in turn caue the control voltage, V cont, to increae, moving the frequency tep will caue the phae difference to grow with time ince a frequency tep i a phae ramp. Thi in turn caue the V cont, to increae, moving the VC frequency up to catch up with the input reference ignal. In thi cae, we have a permanent change in ω out ince a higher V cont i required to utain a higher ω out. If the frequency tep i too large, the PLL will loe lock.

15 PLL in Locked Condition Approach: We will dicu the detail of phae detector and loop filter a we proceed. But, at thi point, we will treat the PLL a a linear feedback ytem. We aume that it i already locked to the reference ignal, and examine how the output varie with the loop tranfer function and input. A frequency domain approach will be ued, pecifically decribing tranfer function in the -domain. V e ()/ φ D and φ out ()/V cont () / Note that the VC perform an integration of the control voltage and thu provide a factor of / in the loop tranfer function. Becaue of thi, a PLL i alway at leat a firt order feedback ytem.

16 PLL a Feedback Sytem. Loop Gain: T ( ) FWD ( ) FB ( ) Tranfer Function: UT( ) IN( ) H ( ) FWD( ) + T ( ) The Loop gain can be decribed a a polynomial: '( + a)( + b) l T ( ) n ( +α )( + β ) l RDER the order of the polynomial in the denominator TYPE n (the exponent of the factor in the denominator) PHASE ERRR ε ( ) IN( ) / + T ( ) [ ] [ ] ) ε SS lim ε( ) limε ( t STEADY STATE ERRR 0 t SS error i a characteritic of feedback control ytem. Thi i the error remaining in the loop at the phae detector output after all tranient have died out. Large loop gain lead to mall errorr

17 PLL a a firt-order filter The cloed-loop gain tranfer function i given by Auming The tranfer function in term of frequency variation therefore can be expreed a: Auming that LP i removed and v D A, hence Thu the loop inherently produce a firt order low-pa tranfer characteritic ( ) A F A F V D D i / ) ( ) ( + ϕ ) ( then dt d i i i i ϕ ω ϕ ω D D i i A F A F V V + ) ( ) ( ϕ ω v v i V + ω

18 PLL a a firt-order filter Auming that LP i removed and v D A, hence Thu the loop inherently produce a firt order low-pa tranfer characteritic. D D i i A F A F V V + ) ( ) ( ϕ ω v v i V + ω

19 Example A PLL ha a o of 2π (khz/v), a v of and a free-running frequency of 500Hz. Find V for a contant input ignal frequency of 250 Hz and khz Sketch the repone of V ( ωi ωo ) V / At 250 Hz, At 500 Hz ( 2π (250) 2π (500))/ 2 (khz / V ) 0. V ( 2 π (000) 2π (500))/ 2 (khz / V ) 0. V V π 25 V π 5

20 PLL a a firt-order filter Thi example how that PLL can operate with no loop filter Neverthele it ha everal practical drawback. Since the phae detector i really a multiplier, it produce a um frequency component at it output a well a the difference frequency component. Thi component at twice the carrier frequency will be fed directly to the output if there i no loop filter. Alo, all the out-of-band interfering ignal preent at the input will appear, hifted in frequency, at the output. Thu, a loop filter i very deirable in application where interfering ignal are preent.

21 Second-order PLL The mot common configuration for integrated circuit PLL i the econdorder loop. Here, loop filter F() i imply a ingle-pole, low-pa filter, uually realized with a ingle reitor and capacitor. Thu Subtituting thi into It give: The root of thi tranfer function are D D i i A F A F V V + ) ( ) ( ϕ ω / ) ( ω F + v v i V 2 / / ω ω + + ±,2 4 2 ω ω v

22 Damping Factor Thi tranfer function an be alo expreed a: V 2 ωi 2ζ ω ω ω n ζ 2 ω ω v v i n We can have a very underdamped repone when ω << V. Think about the invere Laplace tranform of the complex conjugate pole pair. n croover frequency i damping factor

23 The invere Laplace tranform of the complex conjugate pole pair. Give,2 v( t) ω 4 ± 2 ω t v e ω ω 2 4 in 2 ω v A good compromie i uing a maximally flat low-pa pole configuration in For thi repone, the damping factor hould be equal to / 2 Thu t ω ζ and ω 2 2 v 2 v

24 PLL open-loop repone with no loop filter

25 PLL open-loop repone with a ingle-pole filter

26 PLL open-loop repone with zero added in loop filter Adding a reitor to the lowpa loop filter contribute a zero to it tranfer function + / ω2 F( ) + / ω ω 2 R 2 C ω ( + R )C R 2 Thu, the zero frequency i alway higher than the pole frequency, ω 2 >ω.

27 Lock Range Lock Range. Range of input ignal frequencie over which the loop remain locked once it ha captured the input ignal. Thi can be limited either by the (a) phae detector or (b) the VC frequency range. If limited by phae detector: 0 < φ <π i the active range where lock can be maintained.

28 Lock Range For the phae detector type hown (Gilbert multiplier or mixer), the voltage v. phae lope revere outide thi range. Thu the frequency would change in the oppoite direction to that required to maintain the locked condition. V e-max ± D π /2 When the phae detector output voltage i applied through the loop filter to the VC, ω out max ± V π /2 ω L (lock range) where V D, the product of the phae detector and VC gain. Thi i the frequency range around the free running frequency that the loop can track. Doen t depend on the loop filter Doe depend on DC loop gain b. The lock range could alo be limited by the tuning range of the VC. cillator tuning range i limited by capacitance ratio or current ratio and i finite. In many cae, the VC can et the maximum lock range.

29 Capture Range Capture range: Range of input frequencie around the VC centre frequency onto which the loop will lock when tarting from an unlocked condition. The capture range i the range of input frequencie for which the initially unlocked loop will lock on an input ignal and i alway le than the lock range. the capture range i difficult to predict analytically. A a very rough rule of thumb, the approximate capture range can be etimated uing the following procedure: When the input frequency i wept through a range around the center frequency, the output voltage a a function of input frequency diplay a hyterei effect.

30 Capture Range Aume that the loop i opened at the loop-amplifier output and that a ignal with a frequency not equal to the free-running VC frequency i applied at the input of the PLL. The inuoidal difference frequency component that appear at the output of the phae detector ha the value V p π (t) 2 ω ω D co( i oc ) t

31 Capture Range The output from the loop amplifier thu conit of a inuoid at the difference frequency whoe amplitude i reduced by the loop filter. Thi component i paed through the loop filter, and the output from the loop amplifier reulting from thi component i (t) π Vo D A F( j( ωi ωoc )) co( ( ωi ωoc ) t ϕ ) 2 whereϕ i ϕ F( j( ωi ωoc )) In order for capture to occur, the magnitude of the voltage that mut be applied to the VC input i ωi ωoc Voc(t) Capture i likely to occur when V (t) V (t) Therefore: oc < π ωi ωoc < D A F( j( ωi ωoc )) 2 Sometime a frequency detector i added to the phae detector to ait in initial acquiition of lock. o

32 Typical Quetion The 2nd-order phae-locked loop (PLL) ytem illutrated in Fig. 2 contain ub-element with correponding gain value a hown in Table. The amplifier gain may be aumed to be contant.

33 Typical Quetion Table of Gain Component Symbol Value Unit Phae Detector D 50 volt/radian VC 0 6 Radian/ec/volt Amplifier A 20 db Given loop-filter component value R 5.6 kω, R Ω and C nf, ketch (a) the aymptotic cloed-loop (Vo/ω ) PLL frequency repone and etimate the banbwidth and (b) the aymptotic loop-gain repone and graphically or otherwie, determine the 0 db intercept frequency