Active Harmonic Elimination in Multilevel Converters Using FPGA Control

Transcription

1 Active Harmonic Elimination in Multilevel Converter Uing FPGA Control Zhong Du, Leon M. Tolbert, John N. Chiaon Electrical and Computer Engineering The Univerity of Tenneee Knoxville, TN Abtract Thi paper preent an optimal total harmonic ditortion (THD control algorithm referred to a active harmonic elimination method for cacaded H-bridge multilevel converter control with unequal DC ource. Firt, the multilevel converter i decoupled into unipolar converter, the low order harmonic, uch a the th, 7th, th and th are eliminated by uing elimination theory, and the minimum THD combination of unipolar converter for multilevel converter control i found. Next, the magnitude and phae of the reidual higher harmonic are computed and ubtracted from the original output voltage waveform to eliminate thee higher harmonic. To validate the propoed algorithm, the method i imulated by Matlab firt. After the imulation, an experimental -level H- bridge multilevel converter with a real-time controller baed on Altera FLEX K field programmable gate array (FPGA i ued to implement the algorithm with 8 control reolution. The experimental reult how that the method can effectively eliminate the pecific harmonic a expected, and the output voltage waveform have low THD. Keyword-Multilevel converter; active harmonic elimination; FPGA control. I. INTRODUCTION Multilevel converter continue to receive more and more attention becaue of their high voltage operation capability, low witching loe (high efficiency and low output of electromagnetic interference (EMI. The deired output of a multilevel converter i yntheized by everal ource of DC voltage. With an increaing number of DC voltage ource, the converter voltage output waveform approache a nearly inuoidal waveform while uing a low witching frequency cheme. Thi reult in low witching loe, and becaue everal DC ource are ued to yntheize the total output voltage, each witch experience a lower dv/dt compared to a ingle level converter. Conequently, the multilevel converter technology i a promiing technology for high power electric device uch a utility application []-[]. The traditional PWM method, pace vector PWM method, ub-harmonic PWM method (SH-PWM [] and witching frequency optimal PWM (SFO-PWM [] for multilevel converter require equal DC voltage ource. One control method for multilevel converter i the fundamental frequency witching method. Such a cheme i conidered in [7] wherein the trancendental equation characterizing the harmonic content are converted into polynomial equation [7]. Elimination theory [] [] [9](uing reultant wa then ued (along with the pecial ymmetry propertie of the equation to determine the witching angle to eliminate pecific harmonic, namely the th, 7th, th, and th. However, a the number of DC ource increae, the degree of the polynomial in thee equation are large and one reache the limitation of the capability of contemporary computer algebra oftware tool (e.g., Mathematic or Maple to olve the ytem of polynomial equation uing elimination theory [8]. The benefit of the fundamental frequency witching method i it low witching frequency compared to other control method. Generally, the computational complexity of the method limit it ue to multilevel converter with equal DC ource. If one wanted to apply the method to multilevel converter with changing (unequal DC ource, the et of trancendental equation to be olved are no longer ymmetric and require the olution of a et of high-degree equation, which i beyond the capability of contemporary computer algebra. In order to ue the method, the contant DC ource voltage mut be maintained which increae the cot of the ytem []. To overcome the computational difficulty of the reultant method with unequal DC voltage ource, a new optimal PWM algorithm i propoed in thi paper. We refer to it a an active harmonic elimination method. Conider a multilevel converter with unequal DC voltage ource. For each level, the et of trancendental equation characterizing the harmonic i developed. The low order harmonic for each DC voltage ource (the th, 7th, th and th in the experiment reported here are eliminated uing a unipolar witching cheme in which the witch angle are determined uing elimination theory [7][8]. Then the combination for deired fundamental output voltage with the lowet total harmonic ditortion (THD i earched. Specifically choen higher order harmonic (the odd non triplen harmonic from the 7th to the th in the experiment are eliminated by uing an additional witching angle (one for each higher harmonic to generate the negative of the harmonic in order to cancel it. Therefore, the output voltage waveform will have low THD //$. IEEE. 7

2 An experimental -level H-bridge multilevel converter i employed to validate the method. The experimental reult how that the fundamental frequency witching method can effectively eliminate low order harmonic. The experimental reult alo how that the active harmonic generating elimination method can effectively cancel pecifically choen higher order harmonic. II. RESULTANT METHOD FOR UNIPOLAR SWITCHING SCHEME CONVERTER Baed on harmonic elimination theory, the control of the inuoidal wave generation i to chooe a erie of witching angle to yntheize a deired inuoidal voltage waveform. A typical -angle unipolar witching output i hown in Fig.. m V /(V ( dc and the THD i computed a 9 Vi,7,,, THD ( V The reultant method decribed in [8] i ued here to find the olution (when they exit. The witching angle,,, and olution veru the modulation index are hown in Fig.. Fig. how the THD correponding to the olution. From the witching angle olution hown in Fig., it can be derived that the olution exit in a range of the modulation indice from to.9. Some modulation indice have no olution, and there are more than one olution et for ome modulation indice. Fig. how that different olution et have different THD value. Another feature i the THD i very high for the low modulation index range. Fig.. -angle unipolar witching output The Fourier erie expanion of the output voltage waveform a hown in Fig. i V dc V( t [co( n n n n n ]in( nt n n,,... ( Ideally, given a deired fundamental voltage V, one want to determine the witching angle,,, and o that V(t=V (t, and pecific higher harmonic of V n (t are equal to zero. For a three-phae application, the triplen harmonic in each phae need not be canceled a they automatically cancel in the line-to-line voltage. Here, the th, 7th, th, and th order harmonic are choen to be removed. That i, the witching angle mut atify the following equation: co co co co co co co co co m co co co co 7 co7 co7 co7 co7 co co co co co co co co Here, m i defined a modulation index: ( Fig.. Five-angle olution v. m Fig.. THD v. m 8

3 III. PROPOSED MULTILEVEL CONVERTER CONTROL WITH UNEQUAL DC VOLTAGE SOURCES A cacaded H-bridge multilevel converter can be viewed a everal unipolar converter connected in erie, and thee unipolar converter can each be controlled independently. The control method inherently cannot generate low order harmonic ince each unipolar converter doe not generate low order harmonic even with unequal DC voltage ource. Each unipolar converter for i=,, (here i the number of DC voltage ource i required to atify the equation decribed in (, that i co i co i co co i co mi co i co i co co i co co7 i co7 i co7 co7 i co7 co i co i co co i co co co co co co i i The total modulation index m i ci V dci / Vdc mi, where V dc i the nominal DC voltage, V dci i the i th DC voltage and c i (c i {-,,} i a combination coefficient. For convenience, let k i =(V dci / V dc o that m i cikimi. The problem here i: Given m and k i for i=,, compute c i and m i that minimize the total harmonic ditortion, i.e., 9 THD i,7,,,... Vi /V. In other word, for each modulation index m, find the combination (c i, m i for i=,, of the DC ource that give the lowet THD. For example, for =, the goal i the lowet THD and the elimination of the th, 7th, th, th, 7th, 9th, rd and th harmonic. The optimal goal i to find a combination with eparate DC ource with lowet higher order harmonic ditortion: 9 THD i 9,,,7,... Vi /V (6 Here, THD i only computed by higher order harmonic becaue the th, 7th, th, th harmonic are eliminated by unipolar witching cheme, and the 7th, 9th, rd, th will be eliminated by generating correponding negative harmonic to cancel them. Thi will be introduced in the next ection. A combination of the unipolar converter with the lowet THD will be given by (6. Therefore, there are no the th, 7th, th, th, 7th, 9th, rd, th harmonic, and the 9th, t, th, 7th, t, rd, 7th, 9th hould be very low. Conider a numerical example in which k =.67, k =.78, k =.97, k =.9. In thi cae, for each m one mut olve m i cikimi for the ( c i, mi that minimize the THD. The minimum THD achieved by thi method i hown in Fig. and labeled Example. A another example, let k =.6, k =.78, k =., k =.9 and again the i ( minimum achievable THD i alo plotted in Fig. and labeled a Example. Although the THD for a ingle unipolar converter i high, thee example how that it can be low for a combination of everal unipolar converter. IV. Fig.. Minimum THD with - th harmonic eliminated ACTIVE HARMONIC GENERATING METHOD TO ELIMINATE HIGH ORDER HARMONICS From equation (, the voltage content can be divided into four part: V t V ( t V ( t V ( t V ( (7 ( p p p p t. Fundamental frequency voltage: ci kivdc V p( t [co( i i co( i co( ]in( t i (8. Triplen harmonic voltage: Vp( t ckv i i dc [co( ni ni ni ni ni ]in( nt i n,9,, n (9. Low order harmonic voltage that can be eliminated by applying reultant method. Vp ( t ckv i i dc [co( ni ni ni ni ni ]in( nt i n,7,, n (. High order harmonic voltage that have not been eliminated by the unipolar witching cheme. V ( t p i n7,9,, ckv i i dc[co( n i n i n n i n ]in( nt n ( Auming the application i a balanced three-phae ytem, the triplen harmonic (9 need not be eliminated. Thi then 9

4 leave the higher order harmonic (. To eliminate thee harmonic, the active harmonic generating elimination method i ued. A quare wave i generated (one for each of thee harmonic whoe fundamental i equal to the negative of the harmonic that i to be eliminated. For example, to eliminate the 7th harmonic, a quare wave whoe Fourier erie expanion i V( t i m,, cikivdc [co( mh i co( mh i m co( mh co( mh co( mh ]in( mht i ( i generated. When h=7, the m= term of ( cancel the n=7 term of ( and the next harmonic of concern that i produced by ( i at 7=8. Thi harmonic and higher one (77, etc. are eay to filter uing a low-pa filter. Repeating the above procedure to the multilevel converter, the 9th, rd, etc. harmonic can all be eliminated. The net effect of thi method i to remove the low order harmonic and to generate new higher order harmonic by increaing the witching frequency. The additional witching number in a cycle for the active harmonic elimination method i N n. For w n7,9,, example, if the harmonic are eliminated through th, the upper limit witching number i 8. Fig. how a imulation reult with the harmonic elimination up to th. The FFT analyi of the line-line voltage of Fig. i hown in Fig. 6. The th, 7th, th, th, 7th, 9th, rd, th harmonic are zero, and the 9th, t, th, 7th, t, rd, 7th, 9th are very low, near zero. V. HARDWARE IMPLEMENTATION A real-time controller baed on Altera FLEX K field programmable gate array (FPGA i ued to implement the algorithm. The block diagram of the controller i hown in Fig. 7. PCI Interface Phae A Addre Generator Output Data Buffer x bit Switching Data Addre Selector Phae B Addre Generator Phae C Addre Generator Three- Phae Signal Controller Divider Multilevel Converter Controller Ocillator f Fig. 7. Block diagram for the FPGA controller Fig.. Simulation voltage waveform with - th harmonic eliminated (f=6hz (THD=.79% Fig. 6. Normalized FFT analyi of line-line voltage hown in Fig. (f=6hz The witching data are tored in a bit in-chip RAM. The RAM i ued to tore half cycle data up to a thirteen-level multilevel converter. An ocillator generate a fixed frequency clock ignal, and a divider i ued to generate the pecified control clock ignal correponding to the multilevel converter output frequency. Three phae addre generator hare a public witching data RAM becaue they have the ame witching data with different phae angle, and the witching data i only for one half cycle becaue the witching data i ymmetric. For each tep, the three-phae ignal controller control the addre elector to fetch the correponding witching data from the RAM to the output buffer. Aume the ocillator frequency i f, the multilevel converter output frequency i f, and there are 8 tep for each multilevel converter output cycle. The divider number N i: N f f / 8 ( / The control reolution or the tep ize i: T / f / 8 (

5 If the output frequency f i 6 Hz, the control reolution by ( i 8.8. For convenience of operation, the FPGA controller wa deigned a a card to be plugged into a peronal computer, which ued a peripheral component interconnect (PCI bu to communicate with the microcomputer. The whole ytem block i hown in Fig. 8. Multilevel Converter Fig. how the 6-Hz output line-line voltage waveform. Fig. how the FFT analyi of the line-line voltage. From the FFT plot in Fig., it i een that all harmonic up to the th have been eliminated. The THD baed on theoretical computation, imulation, and experiment are.%,.79%, and.8%, repectively. The THD for the experiment i a little higher than that of theoretical computation and imulation becaue the limitation of control reolution i 8, and the witche are not ideal. FPGA Controller PCI BUS Microcomputer Fig. 8. Sytem block In Fig. 8, the microcomputer i ued to interface with the uer, compute the witching data and tore the witching data into the RAM of the controller. The control ignal are generated by FPGA hardware intead of oftware to guarantee real-time control performance of the ytem. The ytem tructure alo guarantee low computational load of the microcomputer becaue it jut compute the witching data once for each modulation index m and it computational time cannot diturb the ytem control performance. VI. EXPERIMENTAL RESULTS The propoed multilevel converter control method ha been implemented in an -level H-bridge multilevel converter, which i hown in Fig. 9, to eliminate the non-triplen harmonic up to the th where V dc =6V, m=.86 and k =.67, k =.78, k =.97, k =.9. Fig.. Experimental line-line voltage with-th harmonic eliminated (f=6hz (THD=.8% It can be een from Fig. that the line-line voltage waveform i very cloe to a inuoidal waveform. Only very high frequency harmonic with low magnitude exit in the line-line voltage. The FFT analyi of the line-line voltage of Fig. hown in Fig. confirm the expectation that the th, 7th, th, th, 7th, 9th, rd, th harmonic are zero, and the 9th, t, th, 7th, t, rd, 7th, 9th are very low, near zero. Thi prove the theoretical computation and imulation. Fig. 9. kw multilevel converter prototype Fig.. Normalized FFT analyi of line-line voltage hown in Fig.

6 VII. CONCLUSION Thi paper propoe and develop an active harmonic elimination control algorithm for multilevel converter with unequal DC voltage ource. The imulation reult and experimental reult how that the algorithm can be ued to eliminate pecific higher order harmonic effectively and reult in a dramatic decreae in the output voltage THD. [] J. K. Steinke, Control trategy for a three phae AC traction drive with a -Level GTO PWM inverter, IEEE PESC, 988, pp. -8. ACKNOWLEDGMENTS We would like to thank the National Science Foundation for partially upporting thi work through contract NSF ECS We would alo like to thank Oak Ridge National Laboratory for partially upporting thi work through UT/Battelle contract No. 7. REFERENCES [] H. S. Patel and R. G. Hoft, Generalized harmonic elimination and voltage control in thyritor inverter: Part I harmonic elimination, IEEE Tranaction on Indutry Application, vol. 9, May/June 97, pp. -7. [] H. S. Patel and R. G. Hoft, Generalized harmonic elimination and voltage control in thyritor inverter: Part II voltage control technique, IEEE Tranaction on Indutry Application, vol., Sept./Oct. 97, pp [] J. S. Lai and F. Z. Peng, Multilevel converter A new breed of power converter, IEEE Tranaction on Indutry Application, vol., no., May /June 996, pp [] K. Sangun, M. H. Todorovic, P.N. Enjeti, Three-phae active harmonic rectifier (AHR to improve utility input current THD in telecommunication power ditribution ytem, IEEE Tranaction on Indutry Application, vol. 9, no., July/Aug.. pp.. [] C. K. Duffey, R. P. Stratford, Update of harmonic tandard IEEE-9: IEEE recommended practice and requirement for harmonic control in electric power ytem, IEEE Tranaction on Indutry Application, vol., no. 6, Nov./Dec. 989, pp. -. [6] L. M. Tolbert, J. N. Chiaon, K. McKenzie, Z. Du, Elimination of harmonic in a multilevel converter with non equal DC ource, IEEE Applied Power Electronic Conference, February 9-,, Miami, Florida, pp [7] J. N. Chiaon, L. M. Tolbert, K. J. McKenzie, Z. Du, Control of a multilevel converter uing reultant theory, IEEE Tranaction on Control Sytem Theory, vol., no., May, pp. -. [8] J. N. Chiaon, L. M. Tolbert, K. J. McKenzie, Z. Du, A new approach to olving the harmonic elimination equation for a multilevel converter, IEEE Indutry Application Society Annual Meeting, October -6,, Salt Lake City, Utah, pp [9] P. N. Enjeti, P. D. Zioga, J. F. Linday, Programmed PWM technique to eliminate harmonic: A critical evaluation IEEE Tranaction on Indutry Application, vol. 6, no., March/April. 99. pp. 6. [] L. M. Tolbert, F. Z. Peng, T. Cunnyngham, J. N. Chiaon, Charge balance control cheme for multilevel converter in hybrid electric vehicle, IEEE Tranaction on Indutrial Electronic, vol. 9, no., October, pp [] G. Carrara, S. Gardella, M. Marcheoni, R. Salutari, G. Sciutto, A new multilevel PWM method: a theoretical analyi, IEEE Tranaction on PowerElectronic, vol. 7, no., July 99, pp. 97-.