PRECISION P-CHANNEL EPAD MOSFET ARRAY QUAD ZERO THRESHOLD MATCHED PAIR

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1 TM DVNCED LINER DEVICES, INC. PRECISION P-CHNNEL EPD MOSFET RRY QUD ZERO THRESHOLD MTCHED PIR EPD E N B L E D LD37/LD37 VGS(th)=.V GENERL DESCRIPTION LD37/LD37 high prcision monolithic quad P-Channl MOSFET arrays ar matchd at th factory using LD's provn EPD CMOS tchnology. This dvic is availabl in a quad vrsion and is a mmbr of th EPD Matchd Pair MOSFET Family. Th LD37/LD37 is a P-channl vrsion of th popular LD8/LD8 Prcision Thrshold dvic. Togthr, ths two MOSFET sris nabl complmntary prcision N-Channl and P- Channl MOSFET array basd circuits. Intndd for low voltag and low powr small signal applications, th LD37/LD37 faturs prcision.v Zro Thrshold Voltag, which nabls circuit dsigns with vry low oprating voltags such as < +.5V powr supplis whr th circuits oprat blow th thrshold voltag of th LD37/LD37. This fatur also nhancs input/output signal oprating rangs, spcially in vry low oprating voltag nvironmnts. With ths low thrshold prcision dvics, a circuit with multipl cascading stags can b constructd to oprat at xtrmly low supply or bias voltag lvls. LD37/ LD37 also faturs high input impdanc (2.5 x Ω) and high DC currnt gain (> 8 ). LD37/LD37 MOSFETs ar dsignd for xcptional matching of dvic lctrical charactristics. Th Gat Thrshold Voltag V GS(th) is st prcisly at.v +/-.2V, faturing a typical offst voltag of only +/-.V (mv). s ths dvics ar on th sam monolithic chip, thy also xhibit xcllnt tmpratur tracking charactristics. Thy ar vrsatil dsign componnts for a broad rang of prcision analog applications such as basic building blocks for currnt mirrors, matching circuits, currnt sourcs, diffrntial amplifir input stags, transmission gats, and multiplxrs. Ths dvics also xcl in limitd oprating voltag applications such as vry low lvl prcision voltag-clamps. In addition to matchd pair lctrical charactristics, ach individual MOSFET xhibits individual wll controlld manufacturing charactristics, nabling th usr to dpnd on tight dsign limits from diffrnt production batchs. (Continud on nxt pag) BLOCK DIGRM PPLICTIONS.5% prcision currnt mirrors and currnt sourcs Low Tmpco (<= 5ppm/ C) currnt mirrors/sourcs Enrgy harvsting circuits Vry low voltag analog and digital circuits Backup battry circuits & powr failur dtctors Prcision low lvl voltag-clamps Low lvl zro-crossing dtctor Sourc followrs and buffrs Prcision capacitiv probs and snsor intrfacs Prcision charg dtctors and charg intgrators Discrt diffrntial amplifir input stag Pak-dtctors and lvl-shiftrs High-sid switchs and Sampl-and-Hold switchs Prcision currnt multiplirs Discrt analog switchs / multiplxrs Discrt voltag comparators FETURES & BENEFITS Prcision matchd Gat Thrshold Voltags Prcision offst voltags (V OS ): LD37: 2mV max. LD37: mv max. Sub-thrshold voltag opration Low min. oprating voltag of lss than.2v Ultra low min. oprating currnt of lss than n Nano-powr opration Wid dynamic oprating currnt rangs Exponntial oprating currnt rangs Matchd transconductanc and output conductanc Matchd and trackd tmpratur charactristics Tight lot-to-lot paramtric control Positiv, zro, and ngativ V GS(th) tmpco bias currnts Low input capacitanc Low input/output lakag currnts PIN CONFIGURTION LD37 D P (2) D P2 (5) ~ V- (5) D P3 () D P4 (6) IC* DP 2 M M2 6 5 IC2* DP2 G P (3) G P2 (4) G P3 () G P4 (7) GP 3 4 GP2 S P (4) V+ (2) S P2 (3) I C () I C2 (6) V+ (2) S P3 (9) S P4 (8) SP 4 3 SP2 V- V- V- 5 2 V+ ORDERING INFORMTION ( L suffix dnots lad-fr (RoHS)) Oprating Tmpratur Rang * C to +7 C 6-Pin SOIC Packag 6-Pin Plastic Dip Packag DP4 GP4 SP4 6 M4 M DP3 GP3 SP3 LD37SCL LD37PCL SCL, PCL PCKGES LD37SCL LD37PCL *I C pins ar intrnally connctd, connct to V- *Contact factory for industrial tmp. rang or usr-spcifid thrshold voltag valus. 27 dvancd Linar Dvics, Inc., Vrs.. of 9

2 GENERL DESCRIPTION (cont.) Ths dvics ar built to offr minimum offst voltag and diffrntial thrmal rspons, and thy can also b usd for switching and amplifying applications in -.4V to -8.V (+/-.2V to +/-4.V) powrd systms whr low input bias currnt, low input capacitanc, and fast switching spd ar dsird. Ths dvics, xhibiting wll controlld turn-off and sub-thrshold charactristics, oprat th sam as standard nhancmnt mod P-Channl MOSFETs. Howvr, th prcision of th Gat Thrshold Voltag nabl two ky additional charactristics, or oprating faturs. First, th oprating currnt lvl varis xponntially with gat bias voltag at or blow th Gat Thrshold Voltag (subthrshold rgion). Scond, th circuit can b biasd and opratd in th subthrshold rgion with n of bias currnt and nw of powr dissipation. For most gnral applications, connct th V+ pin to th most positiv voltag and th V- and IC (intrnally-connctd) pins to th most ngativ voltag in th systm. ll othr pins must hav voltags within ths voltag limits at all tims. Standard ESD protction facilitis and procdurs for static snsitiv dvics ar rquird whn handling ths dvics. BSOLUTE MXIMUM RTINGS Drain-Sourc voltag, V DS -8.V Gat-Sourc voltag, V GS -8.V Oprating Currnt 8m Powr dissipation 5mW Oprating tmpratur rang SCL, PCL C to +7 C Storag tmpratur rang -65 C to +5 C Lad tmpratur, sconds +26 C CUTION: ESD Snsitiv Dvic. Us static control procdurs in ESD controlld nvironmnt. OPERTING ELECTRICL CHRCTERISTICS V+ = +5V V- = GND T = 25 C unlss othrwis spcifid LD37 LD37 Paramtr Symbol Min Typ Max Min Typ Max Unit Tst Conditions Gat Thrshold VGS(th) V IDS = -µ, VDS = -.V Voltag Offst Voltag VOS 2 2 mv VGS(th)M - VGS(th)M2 or VGS(th)M3 - VGS(th)M4 Gat Thrshold TCVGS(th) -2-2 mv/ C Tmpratur Drain Sourc On IDS(ON) m VGS = VDS = -5.V Currnt Transconductanc GFS µ/v VGS = VDS = -5.V Currnt 2 Transconductanc GFS % VGS = VDS = -5.V Mismatch Output Conductanc 2 GOS µ/v VGS(th) = -4.V, VDS = -5.V Drain Sourc On RDS(ON).. KΩ VGS = -5.V, Rsistanc VDS = -.V Drain Sourc On RDS(ON) % Rsistanc Mismatch Drain Sourc BVDSX V Brakdown Drain Sourc IDS (OFF) 4 4 p Lakag Currnt Gat Lakag Currnt IGSS 2 2 p Input Capacitanc 2 CISS pf Nots: Consists of junction lakag currnts 2 Sampl tstd paramtrs LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 2 of 9

3 TYPICL PERFORMNCE CHRCTERISTICS OUTPUT CHRCTERISTICS OUTPUT CHRCTERISTICS V- = -5.V V GS = V GS(th) - 5V V GS = V GS(th) - 4V V GS = V GS(th) - 3V V GS = V GS(th) - 2V V GS = V GS(th) - V VGS = VGS(th) - 4V -25 C -45 C C +7 C +25 C +85 C +25 C DRIN SOURCE ON VOLTGE - VDS(ON) (V) DRIN SOURCE ON VOLTGE - VDS(ON) (V) FORWRD TRNSFER CHRCTERISTICS VDS = -.V V+ = V LD37 LD372 LD374 LD GTE SOURCE VOLTGE - VGS (V) IDS(ON) (n) FORWRD TRNSFER CHRCTERISTICS (SUBTHRESHOLD).. LD37 LD372 LD374 LD378 VDS = -.V V+ = V GTE SOURCE VOLTGE - VGS (V) LOW VOLTGE OUTPUT CHRCTERISTICS V+ = V V GS - V GS(th) = -V.4.5-5V -4V -3V -2V DRIN SOURCE ON VOLTGE - VDS(ON) (V) vs. GTE ND DRIN SOURCE VOLTGE LD378 LD374 LD372 LD GTE ND DRIN SOURCE VOLTGE VGS = VDS (V) LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 3 of 9

4 TYPICL PERFORMNCE CHRCTERISTICS (cont.) FORWRD TRNSFER CHRCTERISTICS EXPNDED (SUBTHRESHOLD) LD37 LD372 LD374 LD378 VDS = -5.V V+ = V GTE SOURCE VOLTGE - VGS (V) IDS(ON) (n).. FORWRD TRNSFER CHRCTERISTICS FURTHER EXPNDED (SUBTHRESHOLD) VDS = -5V GTE SOURCE OVERDRIVE VOLTGE VGS - VGS(th) (V) VGS(th) (V) vs. SUBSTRTE BIS VDS = -.V LD378 LD374 LD372 LD37 VGS(th) (V) vs. V- VOLTGE VDS = -.V V+ = V LD37: V GS(th) =.V LD372: V GS(th) = -.2V LD374: V GS(th) = -.4V LD378: V GS(th) = -.8V SUBSTRTE BIS - V+ (V) V- VOLTGE (V) VGS(th) (V) vs. DRIN SOURCE VOLTGE LD37 LD372 LD374 LD378 VGS(th) (V) vs. MBIENT TEMPERTURE VDS = -.V V+ = V LD378 LD374 LD372 LD DRIN SOURCE VOLTGE - VDS (V) MBIENT TEMPERTURE - T ( C) LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 4 of 9

5 TYPICL PERFORMNCE CHRCTERISTICS (cont.) TRNSCONDUCTNCE GFS (µ/v) TRNSCONDUCTNCE vs. MBIENT TEMPERTURE VGS = VGS(th) -.5V VDS = -5.V VGS = VGS(th) - 4.V VDS = -5.V VGS = VGS(th) -.V VDS = -5.V TRNSCONDUCTNCE GFS (µ/v) TRNSCONDUCTNCE vs. V+ = V VGS = VGS(th) - 4.V VDS = -5.V VGS = VGS(th) -.V VDS = -5.V VGS = VGS(th) -.5V VDS = -5.V MBIENT TEMPERTURE - T ( C) - VGS(th) (V) 8 TRNSCONDUCTNCE vs. GTE SOURCE OVERVOLTGE 7 OUTPUT CONDUCTNCE vs. MBIENT TEMPERTURE TRNSCONDUCTNCE GFS (µ/v) VDS = -.V V+ = V OUTPUT CONDUCTNCE GDS (µ/v) VGS = VGS(th) - 4.V VDS = -5.V VGS = VGS(th) -.V VDS = -5.V VGS = VGS(th) -.5V VDS = -5.V GTE SOURCE OVERVOLTGE - VGS-VGS(th) (V) MBIENT TEMPERTURE - T ( C) OUTPUT CONDUCTNCE GDS (µ/v) OUTPUT CONDUCTNCE vs. DRIN SOURCE ON VOLTGE VGS(th) -.V VGS(th) - 4.V VGS(th) -.5V DRIN SOURCE ON VOLTGE - VDS(ON) (V) ZERO TEMPERTURE COEFFICIENT (ZTC) VDS = -.V V+ = V +25 C C -45 C +85 C +25 C GTE SOURCE OVERDRIVE VOLTGE VGS - VGS(th) (V) LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 5 of 9

6 TYPICL PPLICTIONS LOW VOLTGE CURRENT SOURCE MIRROR V+ = +.V to +5.V /2 LD37 V+ LOW VOLTGE CURRENT SOURCE W/ GTE CONTROL /2 LD37 V+ = +.V to +5.V RSET M M 2 /2 LD8xx, /2 LD28xx, LD9xx or LD229xx M, M 2 : N-Channl MOSFET, : P-Channl MOSFET = V+ - Vt = Digital Logic Control of Currnt Sourc ON OFF RSET M M : N-Channl MOSFET, : P-Channl MOSFET /4 LD8xx, /4 LD28xx, /2 LD9xx or /2 LD229xx LOW VOLTGE DIFFERENTIL MPLIFIER V+ = +5.V /2 LD37 PMOS PIR V IN + M M 2 NMOS PIR V OUT V IN - /2 LD8xx, /2 LD28xx, LD9xx or LD229xx Currnt Sourc M, M 2 : N-Channl MOSFET, : P-Channl MOSFET.5% PRECISION LOW VOLTGE CURRENT SOURCE MULTIPLICTION V+ = +.V to +5.V V+ = +.V to +5.V =. X M PSET LD37 M NSET MN M N2 M N3 M NX M P M P2 M P3 MPY LD8xx or LD28xx M NSET: M N, M N2..M NX : N-Channl MOSFET =. X. Y M PSET: M P, M P2..M PY : P-Channl MOSFET LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 6 of 9

7 TYPICL PPLICTIONS (cont.).5% LOW VOLTGE PRECISION CURRENT MIRRORS V+ = +.V to +5.V V+ = +.V to +5.V ISET /2 LD37 M 2 M = = V + - Vt /2 LD8xx, /2 LD28xx, LD9xx or LD229xx = =.5KΩ < < 5.MΩ V + - Vt M, M 2 : N-Channl MOSFET, : P-Channl MOSFET.5% PRECISION LOW VOLTGE CSCODE CURRENT SOURCES V+ = +.5V to +5.V MP MP 2 MP 3 MP 4 LD37 MP B MP B2 MP B3 MP B4 LD37 V+ - 2Vt = 3. = 3 ( ) MP...MP 4 : LD37 P-Channl MOSFET (st individual pkg) MP B...MP B4 : LD37 P-Channl MOSFET (2nd individual pkg).5% PRECISION LOW TEMPCO CSCODE CURRENT SOURCES V+ = +.V to +.5V V+ = +3.V to +5.V LD37 M M 2 M 2 M LD8xx or LD28xx = = V + - 2Vt Tmpratur stabl <= ppm/ C whn = 57µ. M, M 2,, : N-Channl MOSFET M, M 2,, : P-Channl MOSFET LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 7 of 9

8 SOIC-6 PCKGE DRWING 6 Pin Plastic SOIC Packag E Millimtrs Inchs S (45 ) D b Dim b C D-6 E H L ø S Min Max Min Max BSC.5 BSC S (45 ) H C L ø LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 8 of 9

9 PDIP-6 PCKGE DRWING 6 Pin Plastic DIP Packag E E Millimtrs Inchs Dim Min Max Min Max b b S D c D-6 E E b 2 L L S ø 5 5 b c ø LD37/LD37, Vrs.. dvancd Linar Dvics, Inc. 9 of 9

QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD PRECISION MATCHED PAIR MOSFET ARRAY

QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD PRECISION MATCHED PAIR MOSFET ARRAY TM DVNCD INR DVICS, INC. QUD/DU N-CHNN NHNCMNT MOD PD PRCISION MTCHD PIR MOSFT RRY PD D84/D94 N B D VGS(th)= +.4V GNR DSCRIPTION D84/D94 ar high prcision monolithic quad/dual nhancmnt mod N-Channl MOSFTS