ALD810023/ALD QUAD/DUAL SUPERCAPACITOR AUTO BALANCING (SAB ) MOSFET ARRAY ADVANCED LINEAR DEVICES, INC. GENERAL DESCRIPTION FEATURES & BENEFITS

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1 TM DVND INR DVIS, IN. QUD/DU SUPRPITOR UTO BNING (SB ) MOSFT RRY PD N B D D810023/D GNR DSRIPTION Th D810023/D ar mmrs of th D8100xx (quad) and D9100xx (dual) family of Suprcapacitor uto Balancing MOSFTs, or SB MOSFTs. SB MOSFTs ar uilt with production provn PD tchnology and ar dsignd to addrss voltag and lakag-currnt alancing of suprcapacitors connctd in sris. Suprcapacitors, also known as ultracapacitors or suprcaps, connctd in sris can lakag-currnt alancd y using a comination of on or mor dvics connctd across ach suprcapacitor stack to prvnt ovr-voltags. Th D offrs a st of uniqu, prcis oprating voltag and currnt charactristics for ach of four SB MOSFT dvics, as shown in its Oprating lctrical haractristics tal. It can usd to alanc up to four suprcapacitors connctd in sris. Th D has its own st of uniqu prcision Oprating lctrical haractristics for ach of its two SB MOSFT dvics, suital for up to two sris-connctd suprcapacitors. ach SB MOSFT faturs a prcision gat thrshold voltag in th V t mod, which is 2.30V whn th gat-drain sourc trminals (V GS = V DS ) ar connctd togthr at a drain-sourc currnt of I DS(ON) = 1µ. In this mod, input voltag V IN = V GS = V DS. Diffrnt V IN producs an Output urrnt I OUT = I DS(ON) charactristic and rsults in an ffctiv varial rsistor that varis in valu xponntially with V IN. This V IN, whn connctd across ach suprcapacitor in a sris, alancs ach suprcapacitor to within its voltag and currnt limits. FTURS & BNFITS Simpl and conomical to us Prcision factory trimmd utomatically rgulats and alancs lakag currnts ffctiv for suprcapacitor charg-alancing Balancs up to 4 suprcaps with a singl I packag Balancs 2-cll, 3-cll, 4-cll sris-connctd suprcaps Scalal to largr suprcap stacks and arrays Nar zro additional lakag currnts Zro lakag at 0.3V low ratd voltags Balancs sris and/or paralll-connctd suprcaps akag currnts ar xponntial function of cll voltags ctiv currnt rangs from <0.3n to >1000µ lways activ, always fast rspons tim Minimizs lakag currnts and powr dissipation PPITIONS Sris-connctd suprcapacitor cll lakag alancing nrgy harvsting ong trm ackup attry with suprcapacitor outputs Zro-powr voltag dividr at slctd voltags Matchd currnt mirrors and currnt sourcs Zro-powr mod maximum voltag limitr Scald suprcapacitor stacks and arrays PIN ONFIGURTIONS D Whn V IN = 2.30V is applid to an D810023/D910023, its I OUT is 1µ. For a 100mV incras in V IN, to 2.40V, I OUT incrass y aout tnfold. For an additional incras in V IN to 2.52V for th D (2.54V for th D810023), I OUT incrass on hundrdfold, to 100µ. onvrsly, for a 100mV dcras in V IN to 2.20V, I OUT dcrass to on tnth of its prvious valu, to 0.1µ. nothr 100mV dcras in input voltag would rduc I OUT to 0.01µ. nc, whn an D810023/D SB MOSFT is connctd across a suprcapacitor that chargs to lss than 2.10V, it would dissipat ssntially no powr. (ontinud on nxt pag) I* D N1 G N1 S N M1 M I* D N2 G N2 S N2 V PRODUT FMIY SPIFITIONS D N4 6 M4 M3 11 D N3 For mor information on suprcapacitor alancing, how SB MOSFTs achiv automatic suprcapacitor alancing, th dvic charactristics of th SB MOSFT family, product family product slction guid, applications, configurations, and packag information, plas download from th documnt: G N4 S N S PKG G N3 S N3 D8100xx/D9100xx Family of Suprcapacitor uto Balancing (SB ) MOSFT RRYs D I* 1 8 V ORDRING INFORMTION ( suffix dnots lad-fr (RoS)) G N1 2 G N2 Oprating Tmpratur Rang Packag to -4 to 85 (ommrcial) (Industrial) 16-Pin SOI D810023S D810023SI 8-Pin SOI D910023S D910023SI D N1 3 6 D N2 S N1 4 5 S N2, S PKG *I pins ar intrnally connctd, connct to 2014 dvancd inar Dvics, Inc., Vrs of 6

2 GNR DSRIPTION (ONT.) Th voltag dpndnt charactristic of th D810023/ D on-rsistanc is ffctiv in controlling xcssiv voltag ris across a suprcapacitor whn connctd across it. In sris-connctd suprcapacitor stacks, whn on suprcapacitor voltag riss, th voltag of th othr suprcapacitors drops, with th ons that hav th highst lakag currnts having th lowst suprcapacitor voltags. Th SB MOSFTs connctd across ths suprcapacitors would xhiit complmntary opposing currnt lvls, rsulting in littl additional lakag currnts othr than thos causd y th suprcapacitors thmslvs. For tchnical assistanc, plas contact D tchnical support at tchsupport@aldinc.com. PPYING T D810023/D910023: 1) Slct a maximum suprcapacitor lakag currnt limit for any suprcapacitor usd in th stack. This is th sam as output currnt, I OUT = I DS(ON), of th D810023/D Tst that ach suprcapacitor lakag currnt mts this maximum currnt limit for us in th stack. 2) Dtrmin whthr th input voltag V IN (V GS = V DS ) at that I OUT is accptal for th intndd application. This voltag is th sam voltag as th maximum dsird oprating voltag of th suprcapacitor. For xampl, with th D810023, I OUT = 300µ corrsponds to V IN = 2.64V. 3) Dtrmin that th oprating voltag margin, du to various tolrancs and/or tmpratur ffcts, is adquat for th intndd oprating nvironmnt of th suprcapacitor. SMTI DIGRM OF TYPI ONNTION FOR FOUR-SUPRP STK D8100XX V 15.0V IDS(ON) 80m , 12 M M M3 9 6 M V1 V2 V3 SMTI DIGRM OF TYPI ONNTION FOR TWO-SUPRP STK D9100XX 2 M1 4 M2 3, 8 6 V 15.0V IDS(ON) 80m 1 2 V1 1, 5, 8, 16 1, DNOTS PKG PIN NUMBRS 1-4 DNOTS SUPRPITORS 1-8 DNOTS PKG PIN NUMBRS 1-2 DNOTS SUPRPITORS D810023/D dvancd inar Dvics, Inc. 2 of 6

3 BSOUT MXIMUM RTINGS V to voltag 15.0V Drain-Sourc voltag, VDS 10.6V Gat-Sourc voltag, VGS 10.6V Oprating urrnt 80m Powr dissipation 500mW Oprating tmpratur rang S to Oprating tmpratur rang SI -4 to 85 Storag tmpratur rang -65 to 15 ad tmpratur, 10 sconds 26 UTION: SD Snsitiv Dvic. Us static control procdurs in SD controlld nvironmnt. OPRTING TRI RTRISTIS V = 5V, = GND, T = 25, VIN = VGS =VDS, IOUT = IDS(ON) unlss othrwis spcifid D Paramtr Symol Min Typ Max Unit Tst onditions Gat Thrshold Voltag Vt V VGS = VDS; IDS(ON) = 1µ Offst Voltag VOS 5 20 mv Vt1 - Vt2 or Vt3 - Vt4 Offst Voltag Tmpco TVOS 5 µv/ Vt1 - Vt2 or Vt3 - Vt4 Gat Thrshold Voltag Tmpco TVt -2.2 mv/ VGS = VDS; IDS(ON) = 1µ Output urrnt IOUT µ VIN = 1.90V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT µ VIN = 2.00V Drain Sourc On Rsistanc RDS(ON) 2000 MΩ Output urrnt IOUT 0.01 µ VIN = 2.10V Drain Sourc On Rsistanc RDS(ON) 210 MΩ Output urrnt IOUT 0.1 µ VIN = 2.20V Drain Sourc On Rsistanc RDS(ON) 22 MΩ Output urrnt IOUT 1 µ VIN = 2.30V Drain Sourc On Rsistanc RDS(ON) 2.3 MΩ Output urrnt IOUT 10 µ VIN = 2.40V Drain Sourc On Rsistanc RDS(ON) 0.24 MΩ Output urrnt IOUT 100 µ VIN = 2.54V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT 300 µ VIN = 2.64V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT 1000 µ VIN = 2.82V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT 3000 µ VIN = 3.12V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT µ VIN = 3.2V Drain Sourc On Rsistanc RDS(ON) MΩ Drain Sourc Brakdown Voltag BVDSX 10.6 V Drain Sourc akag urrnt1 IDS(OFF) p VIN = VGS = VDS = Vt VIN = VGS = VDS = Vt - 1.0, 4 n T = 125 Gat akag urrnt1 IGSS p VGS = 5.0V, VDS = 0V VGS = 5.0V, VDS = 0V, 1 n T = 125 Input apacitanc ISS 15 pf VGS = 0V, VDS = 5.0V Turn-on Dlay Tim ton 10 ns Turn-off Dlay Tim toff 10 ns rosstalk 60 db f = 100Kz D810023/D dvancd inar Dvics, Inc. 3 of 6

4 BSOUT MXIMUM RTINGS V to voltag 15.0V Drain-Sourc voltag, VDS 10.6V Gat-Sourc voltag, VGS 10.6V Oprating urrnt 80m Powr dissipation 500mW Oprating tmpratur rang S to Oprating tmpratur rang SI -4 to 85 Storag tmpratur rang -65 to 15 ad tmpratur, 10 sconds 26 UTION: SD Snsitiv Dvic. Us static control procdurs in SD controlld nvironmnt. OPRTING TRI RTRISTIS V = 5V, = GND, T = 25, VIN = VGS =VDS, IOUT = IDS(ON) unlss othrwis spcifid D Paramtr Symol Min Typ Max Unit Tst onditions Gat Thrshold Voltag Vt V VGS = VDS; IDS(ON) = 1µ Offst Voltag VOS 5 20 mv Vt1 - Vt2 Offst Voltag Tmpco TVOS 5 µv/ Vt1 - Vt2 Gat Thrshold Voltag Tmpco TVt -2.2 mv/ VGS = VDS; IDS(ON) = 1µ Output urrnt IOUT µ VIN = 1.90V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT µ VIN = 2.00V Drain Sourc On Rsistanc RDS(ON) 2000 MΩ Output urrnt IOUT 0.01 µ VIN = 2.10V Drain Sourc On Rsistanc RDS(ON) 210 MΩ Output urrnt IOUT 0.1 µ VIN = 2.20V Drain Sourc On Rsistanc RDS(ON) 22 MΩ Output urrnt IOUT 1 µ VIN = 2.30V Drain Sourc On Rsistanc RDS(ON) 2.3 MΩ Output urrnt IOUT 10 µ VIN = 2.40V Drain Sourc On Rsistanc RDS(ON) 0.24 MΩ Output urrnt IOUT 100 µ VIN = 2.52V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT 300 µ VIN = 2.60V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT 1000 µ VIN = 2.4V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT 3000 µ VIN = 2.80V Drain Sourc On Rsistanc RDS(ON) MΩ Output urrnt IOUT µ VIN = 3.30V Drain Sourc On Rsistanc RDS(ON) MΩ Drain Sourc Brakdown Voltag BVDSX 10.6 V Drain Sourc akag urrnt1 IDS(OFF) p VIN = VGS = VDS = Vt VIN = VGS = VDS = Vt - 1.0, 4 n T = 125 Gat akag urrnt1 IGSS p VGS = 5.0V, VDS = 0V VGS = 5.0V, VDS = 0V, 1 n T = 125 Input apacitanc ISS 30 pf VGS = 0V, VDS = 5.0V Turn-on Dlay Tim ton 10 ns Turn-off Dlay Tim toff 10 ns rosstalk 60 db f = 100Kz D810023/D dvancd inar Dvics, Inc. 4 of 6

5 SOI-16 PKG DRWING 16 Pin Plastic SOI Packag Millimtrs Inchs D 1 Dim 1 D-16 S Min Max Min Max BS BS D810023/D dvancd inar Dvics, Inc. 5 of 6

6 SOI-8 PKG DRWING 8 Pin Plastic SOI Packag Millimtrs Inchs D Dim 1 D-8 Min Max Min Max BS BS 1 S D810023/D dvancd inar Dvics, Inc. 6 of 6