THE SECOND 1 x 500 MW HVDC BACK-TO-BACK INTERCONNECTION AT VIZAG

Transcription

1 THE SECOND 1 x 500 MW HVDC BACK-TO-BACK INTERCONNECTION AT VIZAG Abstract R.Suri Birger Jnssn N. Ottssn R.S. Mni POWERGRID, ABB Pwer Technlgies AB, ABB Limited, India Sweden India The Secnd 1 x 500 MW HVDC Back-t-back statin is lcated very near a similar 1 x 500 MW HVDC BtB prject already implemented in the first phase by Pwergrid. The secnd 500MW intercnnectin, which has been cmmissined recently has increased the direct inter-reginal pwer transfer capability frm the Eastern t Suthern regins t a ttal f 3000 MW. Bth the back t back statins are perating in parallel. A back-t-back HVDC cnverter can be used when tw asynchrnus AC systems need t be intercnnected fr bulk pwer transmissin r fr AC system stabilizatin reasns. In an HVDC back-t-back statin there are n verhead lines r cables separating the rectifier and the inverter, hence the DC current can be kept high and the DC vltage lw. The lw DC vltage means that the air clearance requirement is lw, which favurs a cmpact design f the valve hall. The back-t-back HVDC cnverter statin at Vizag is f the cnventinal type with indr thyristr valves and smthing reactrs lcated utdr. The HVDC Back-t-back utilizes a special mid-pint (6 pulse bridge) grunding design fr the thyristr valves n the suthern side with tw smthing reactrs installed in series n the neutral side. This paper intends t cver the verall scheme including assciated AC netwrk, main circuit arrangement, layut, filtering scheme including any new features adpted, an verview f the cntrl and prtectin schemes, the higher level cntrl features and strategies adpted. The paper als mentins the prtectin prvided fr mitigatin f ferr-resnance which may ccur during peratin f series cmpensatin n the 400 kv lines n the Eastern side. The paper will als cver the majr system and cmmissining tests cnsisting f high vltage energisatin, pwer flw and tests f all majr cntrls. 1.0 THE SECOND 1 x 500 HVDC PROJECT AT VIZAG 1.1 Intrductin The HVDC back-t-prjects at Vizag are part f Pwergrid s East-Suth Intercnnectins. The first 1 x 500 MW HVDC prject was cmmissined in 1999 thus enabling pwer transfer frm the Eastern regin t the Suthern regin. The next step in the intercnnectin was the cnstructin f the 2000 MW HVDC biple between Talcher

2 in the Eastern regin and Klar in the Suthern regin. This biplar HVDC lng distance transmissin with a line length f arund 1370 kms. was cmpleted and cmmissined in 2002 and frms the East-Suth Intercnnectr-II. The secnd 1 x 500 MW HVDC prject at Vizag frms the East-Suth Intercnnectr-III. Vizag I&II Figure(1) Map f India shwing gegraphical lcatin f Vizag I & II The secnd phase is very similar t the first 1 x 500 MW back-t-back, emplying similar mdular back-t-back cnverters, with classic line cmmutated cnverters. Bth the phases link the 400 kv netwrks f the Eastern regin and Suthern regin. The cnnectin t the Eastern Regin netwrk in Orissa is by 400 kv duble-circuit transmissin lines, nearly 225 km in length, running frm the Vizag-I East bus t the Jeypre 400 kv substatin in Orissa. Bth the systems perate at 50 Hz. A simple ne line diagram fr the a.c.netwrk in given in fig (2) belw. It can be seen that the lines t Jeypre frm the East bus have series capacitrs cmpensating up t 50% line inductance, installed at the Jeypre end. This series cmpensatin is part f the transmissin netwrk planned with the Secnd 1 x 500 MW HVDC blck at Vizag.

3 Figure (2) AC Netwrk arund Vizag HVDC Statin G Simhadri Khamam SSLBPH Suth Netwrk Vizag Pl Vijayawada Gazuwaka Suth (400kV) Filter Banks Vizag I (Suth) Filter Banks Vizag II (Suth) (incl. sh.reactr) Vizag I Vizag II Filter Banks Vizag I (East) Filter Banks Vizag II (East) (incl. sh. reactr) Gazuwaka East (400kV) Jeypre East Netwrk Indravati Meramundali Indravati (220kV) Rengali Vizag HVDC back-t-back: AC Netwrks

4 2.0 SYSTEM ASPECTS The tw electric systems are rather large, yet the cnnectin t the Eastern regin, is at a relatively weak pint in it s netwrk. The Suthern Regin system has an installed capacity f abut MW. The minimum shrt circuit capacity at the HVDC statin at Vizag(Suth) was defined as 2500 MVA cnsidering bth blcks perating at verlad pwer f 1100 MW. This culd hwever vary widely and based n actual netwrk studies was determined t be as high as 8000 MVA, depending n the number f cnnected generatrs at Simhadri and the status f the intercnnecting lines t Khammam and Vijayawada. When cmpared t the first phase f the intercnnectin, 4 ns. 400 kv lines have cme up, ne duble-circuit each t Khammam and Vijayawada, thus cnsiderably increasing the shrt circuit level at Vizag (Suth). The cnnectin pint t the Eastern regin is defined at the Vizag 400 kv substatin East bus. The Eastern Regin system has an installed capacity f MW, but the Vizag (East) bus, at the end f a 225 km lng line frm the Jeypre 400 kv sub-statin lcated in Orissa which is quite remte frm majr generatrs like Talcher which is abut 500 kms. away. At the time set fr cmmercial peratin f the phase ne, the lwest shrt circuit capacity at Vizag (East) was defined as 1200 MVA (with nly ne line t Jeypre and n series cmpensatin). Based n actual netwrk studies the shrt circuit capacity culd be as high as 3000 MVA. 3.0 STATION CONFIGURATION AND LAYOUT Figure 3.0 gives the single line verview f the Blck-2. The Blck-2 is essentially similar t Blck-1, supplied by a different manufacturer. The main difference is the cnfiguratin and arrangement f the thyristr valves. The perating vltage with respect t grund is nly abut half f the ple vltage due t the mid-pint grunding adpted here fr the cnverter valves. The junctin between the tw 6 pulse bridges fr ne f the sides (Suthern side in this case) is grunded thrugh the smthing reactr. The smthing reactr is in itself split int tw halves each f 30 mh, the mid-pint f which is grunded. As the statin is a back-t-back with n part f the d.c. side expsed t atmsphere, the abve cnfiguratin is cmpatible in terms f verall insulatin crdinatin. The nminal direct vltage t grund is +/- 88 kv. On the Suthern side the 400 kv a.c. bus is an extensin f the existing bus t which the Blck-2 a.c. side is als cnnected. On the Eastern side the intercnnectin f Blck-2 is thrugh sectin breakers and a shrt span f 400 kv line f abut 0.5 km in length. The main statin ccupies an area f rughly 500 x 150 m and cvers the fllwing areas: Valve Hall and Service Building Cnverter Transfrmers Smthing Reactr AC Yards and filter fr East and Suth sides Shunt Reactr

5 Auxiliary buildings like diesel generatr and fire fighting pump huse 33kV auxiliary statin SOUTH 400 kv 50 Hz EAST 400 kv 50 Hz HP12/24 HP 3 & 12/24 B HP 3 & 12/24 B HP12/24 HP 3 & 12/24 B HP3& 12/24 B 80 Mvar 3 x 110 Mvar 3 x 110 Mvar 80 Mvar Figure (3) Single Line Diagram In additin t the main area there is an extensin bay area fr interfacing with the existing Blck-1 East bus. A shrt 500 m. verhead line cnnects the Blck-2 main area t the Eastern extensin. The main items will be briefly explained herein. 3.1 Filtering and Reactive Pwer Cntrl The filter banks have been designed t be identical fr the Suth and Eastern sides althugh the impedance diagrams are nt exactly the same fr bth the regins. They cnsist f an HP-12/24 sectin frming the base and tw numbers f a cmbinatin f HP 12/24 and HP3 branches giving the additinal filtering and reactive pwer supprt

6 required at higher pwer levels. All the switchable banks have identical rating f 110 MVAr. In additin t the shunt filter banks, ne shunt reactr f 80 MVAr each has been prvided n each side. The shunt reactrs are rated t cnsume 80 MVAr at a nminal vltage f 400 kv. The ttal fundamental frequency rating fr the filter bank is 330 Mvar fr the 500 MW cnverter. In additin the PLC filter als gives abut 12 MVAr net. Fig. 4.0 gives the reactive pwer exchange limits that need t be maintained with the a.c. netwrk fr all values f pwer flw n the HVDC back-t-back frm minimum pwer till the 2 hur verlad pwer level. These limits as per the prject Technical specificatins are defined fr pwer flw in either directin. These limits have t be maintained fr all variatins f the a.c. netwrk cnfiguratin and vltage variatins within +/- 5% and frequency variatin in the range 47.5 Hz t 50.5 Hz. T achieve the abve, the back-t-back cntrl scheme, apart frm adpting filter switching can als use variatin in the cnverter firing angles. The firing angles fr the Vizag back-t-back can be increased t as high as 63 deg. electrical. The Reactive Pwer Cntrls als limit the a.c. vltage step at filter switching t within +/- 5% as stipulated in the prject Technical Specificatins. All the capacitrs required fr the AC and PLC filters have been supplied frm ABB s wrks in Bangalre, India. Reactive Pwer Exchange 50 Reactive Pwer [MVAr] Cnverter Deficit Cnverter Surplus -200 Pdref [MW] Figure (4) Reactive Pwer Exchange Limits

7 3.2 Valves and Valve Hall The valve hall is abut 13.0 m high and under nrmal peratin is ventilated with slight verpressure t prevent dust ingress. The valves are all f suspended type arranged in tw rws, ne fr each side. The smthing reactrs lcated n the d.c. neutral side are lcated just utside the valve hall and are cnnected t the mid-pint f the Suth side valves thrugh wall bushings, which cntain als the DCCT s fr the cnverter prtectin. With this arrangement the d.c. side vltages is as fllws: Line t neutral (acrss 12 pulse bridge) 176 kv Line t grund 88kV Each valve unit cnsists f 6 thyristr mdules cnnected in series, with 6 thyristr levels per mdule. The thyristr level cntains a 5 inch. dia thyristr (type YST 90), vltage grading circuits and a Thyristr Cntrl Unit. The valve arresters are munted at the side f the single valve inside the valve hall. The valve cling system used here is a single circuit system using nly de-mineralised water with heat exchangers (dry clers) lcated utside. This system is relatively easy t maintain and avids the hassles f large utdr cling twers. The smthing reactrs are f air insulated type and have a rating f 30 mh each. 3.3 Cnverter Transfrmers The cnverter transfrmers are f single-phase 3 winding type and have the fllwing main parameters: Capacity 201 MVA per single phase unit Vltage 400/ 3 kv rms, 74.5/ 3(Y) rms,/74.5 kv ( ) rms Cling OFAF The tap changers, tw per unit, are lcated within the main tank. All the bushings except the 400 kv high vltage bushings are inside the valve hall. Accrdingly the star and delta cnnectins fr the transfrmer secndary t intercnnect t the tw 6 pulse bridges are lcated within the valve hall. Six f the ttal seven cnverter transfrmers have been manufactured in ABB s wrks in Barda in India. Figure 5 gives an verview f the HVDC Statin at Vizag as seen frm the Suth side.

8 Figure 5.0 View f Secnd 1 x 500 MW HVDC Blck frm Suth Side 4.0 CONTROL & PROTECTION SYSTEM OVERVIEW 4.1 HVDC Cntrl System Basic Cntrl Mdes The nrmally used cntrl mde is the cnstant pwer cntrl mde fr pwer flw in either directin. This is als the cntrl mde where the higher rder cntrls explained later, add their cntributins s as t derive the effective current rder which is fed t the Cnverter Firing Cntrl. The reference pint fr the pwer rder is the AC main bus bars n the inverter side. In additin t this cnstant current cntrl mde is als prvided. This is a specific cntrl mde used fr limited purpses like testing current rating f main circuit equipment.

9 4.2 Higher Level Cntrls Tw higher level cntrls cntribute t the nrmal pwer cntrl mde depending n the system cnfiguratin and netwrk behaviur Pwer Mdulatin (AC System Stabilisatin cntrl) This cntrller prvides a cntributin t the set pwer rder s that the HVDC pwer can be mdulated s as t damp pst disturbance pwer scillatins in either netwrk. When disturbance ccurs in either the Suthern r the Eastern regins and pwer scillatins set in, the pwer mdulatr in the d.c. prvides variatin f d.c. pwer t stabilize the affected a.c. netwrk. The undisturbed a.c. netwrk is used as a reference (r bulwark) while damping f scillatins is attempted n the disturbed netwrk. The cntributin frm the mdulatr will be stpped if, in the curse f mdulatin, the disturbances get transferred t the ther netwrk Frequency Cntrl The frequency cntrller which is active always, essentially helps maintain the netwrk frequency, n either side, within a dead-band (+/- 0.5 Hz), abut a target frequency F TR (settable between 47.5 & 51.5 Hz), prvided the netwrk n the ther side is perating within a specified dead-band (0.05 Hz f it s pre-set frequency). The frequency cntrller cntributin is stpped if during it s actin, the reference netwrk frequency ges ut side it s set band. 4.3 Operatin in C-rdinatin with Blck-1 Bth the blcks f 500 MW are envisaged t perate in parallel but independently. As jint peratin mde is nt prvided fr currently, essential cntrl c-rdinatin like fr example, perating mde fr the RPC is crdinated manually by the respective statin peratrs. During the detailed design phase f Blck-2 it was decided t lcate the cntrl mimic in the Blck-1 cntrl rm itself t enable easy crdinatin f the cntrl mdes by the statin peratrs. Anther aspect f crdinated cntrl f bth the blcks invlves prper respnse f the pwer mdulatin cntrl and frequency cntrl during system disturbances. In rder t fulfill this, detailed system studies were dne by mdelling the cntrl functins prpsed fr Blck-2 with brad based mdels f similar type being assumed fr Blck- 1. These studies included lad flws ver the full perating range at the given system vltage limits and dynamic simulatin studies invlving simulatin f single phase t grund and three phase faults fllwed by tripping f lines and filters as apprpriate, as wuld be dne by the RPC cntrller r ver-vltage limitatin functin in the RPC. The slpe settings fr the frequency cntrllers were chsen similar fr bth the blcks t avid cnflict.

10 Fr the Suthern side which is much strnger there is little prblem in individual r cmbined peratin f bth the blcks as far as cntrl f vervltages are cncerned r fr pst fault recvery. Fr disturbances in the Eastern regin sme special measures are required t be taken particularly when the series cmpensatin n the Jeypre lines are in service. 4.4 Prtectin System The HVDC statin at Vizag uses all the cnventinal prtectins nrmally emplyed in such schemes. The entire prtectin system is digital and built arund ABB s MACH-2 platfrm. The prtectins can be bradly classified int the fllwing areas: AC side prtectins including the cnverter transfrmers AC Filter prtectins DC side prtectins cvering all equipment including valves All the statin prtectins including the bus-bar prtectins and the cnverter transfrmer prtectins are all cvered thrugh digital prtectins within Mach-2. The cnverter transfrmer is mainly cvered by differential, ver current and ver-excitatin prtectins apart frm the standard Buchhlz relay. The switchyard has AC ver-vltage and bus differential prtectins. A.C. filters are prvided with capacitr bank unbalance, earth-fault and resistr/reactr verlad prtectins. The filter lw vltage tuned circuits are als cvered by a supervisin fr de-tuning, which mnitrs fr any high currents within the parallel LC circuits. The d.c. side prtectins include the fllwing: Cnverter Prtectins Vltage Stress which is als linked t the Cnverter transfrmer tap changer cntrl High Angle Supervisin DC Overcurrent Lw vltage detectin Thyristr Mnitring Valve Misfire Prtectin Cling Water Temperature Supervisin Ple Prtectins DC ver vltage & under vltage prtectins DC Harmnic prtectin DC differential

11 Smthing reactr and earth-fault 5.0 SYSTEM TESTS 5.1 Sub-system and H.V. energisatin tests Fr the Vizag-2 HVDC prject almst all the cntrl and prtectins systems are micrprcessr based. Mst f the sub-system sftware testing was therefre perfrmed during the factry system tests at Ludvika, Sweden. The cubicles fr cntrl and prtectin and peratr cmmunicatin were intercnnected t each ther and t the HVDC simulatr which represented the main circuits. The system tests perfrmed at site were in many cases a repetitin f the tests perfrmed in factry with actual main circuits cnnected t the real AC and DC systems. Prir t the system tests the site verficatins invlved a step-by-step prcedure cnsisting f sub-system tests t check intercnnected equipment prir t High Vltage energisatin and the H.V. energisatin tests t check fr crna, abnrmal nise and any ther abnrmalities prir t cmmencing pwer flw. 5.2 System Tests The system tests were the final tests where everything wrks tgether: cntrls, main circuit equipment, filters and ther supprting systems cnnected t the a.c. netwrks under the supervisin f the test team and the system dispatchers. The basic system tests invlved start/stp and ramping up f the blck in pwer and current cntrl, verificatin f filter switching, lw and high pwer tests in bth directins, stable cnverter cntrl mde shift, change ver t redundant cntrl systems, thyristr mnitring, prtective blck sequences, emergency trip, auxiliary pwer disturbances and verificatin f tapchanger and reactive pwer cntrls. The c-rdinated effrts tgether with the reginal lad despatch centers made it pssible t perfrm the system testing in nly six weeks frm de-blcking t successful trial peratin. Having the riginal test plan in cnsideratin, when discussing a suitable detailed test prgram, the final schedules were decided n day-t-day basis. Example f tests perfrmed are current and pwer cntrl and emergency pwer cntrl, frequency cntrl, sub-synchrnus damping cntrl and supervisin, and heat run with thermvisin check. Tests were carried ut in bth pwer directins with and withut the adjacent cnverter in peratin. In additin, tests were perfrmed t prvke interactins between the tw independent 500 MW cnverter blcks. It was shwn that pre-insertin resistrs n the cnverter breakers reduce disturbances when energizing cnverter transfrmers adjacent t the perating cnverter. The East system is relatively weak at the pint f the cnverters lcatin and it was als shwn that the bth cnverters active and reactive pwer

12 cntrls need t be crdinated by the peratrs in rder t reduce the fluctuatins f the East cnverter bus vltage Tests f Sub-Synchrnus Damping Cntrller A sub-synchrnus resnance damping cntrller has been prvided in the Vizag-2 HVDC system t prvide psitive damping in case f build up f sub-synchrnus trsinal interactins, particularly n the nearby Simhadri thermal machines. The Simhadri plant has 2 x 500 MW machines which culd be subject t sme subsynchrnus scillatins during any disturbances, which culd be further negatively damped when Vizag-Suth side is the rectifier and under cnditins f weak Suth side a.c. netwrk. Accrdingly it was decided t subject the installed cntrller t sme basic checks, if nt the full scale tests. During the curse f system tests an pprtunity arse whereby the tw 400 kv circuits t Khammam were t be tripped fr a planned shutdwn while the cnnectin t Vijayawada was minimal. This was als the cnditin wherein pwer flw was frm Suth t East, thus fulfilling the criteria f Suth side being the rectifier side. The tripping f the Khammam line itself became the disturbing input and the utput f the Sub-Synchrnus damping cntrller was mnitred t check fr psitive damping, under the pst tripping weak netwrk cnditin. The trsinal frequency f interest (19.9 Hz) was mnitred during this phase, which shwed prper damping Ferr-resnance Detailed system simulatins shwed a risk f ferr-resnance n the East side at certain system cnditins with the series cmpensatin in service at Jeypre. This cnditin ccurs nly when pwer flws frm the Suth t the East side which is nt the nrmal directin f pwer flw. Bypassing the series cmpensatin wuld cease the ferr-resnance. Hence, a ferrresnance detectin circuit was develped and supplied n the East side. The principle f the detectin circuit is that it mnitrs a characteristic harmnic that ccurs during ferrresnance. Shuld the harmnic level breach the threshld setting values, a signal is released. The signal frm the detecting circuit can be transmitted t Jeypre by teleprtectin in rder t by-pass the series capacitrs and interrupt the resnant circuit. 6.0 CONCLUSION The new 400 kv transmissin lines and the secnd cnverter blck assciated with phase tw went int service in January this year, The full phase tw started cmmercial peratin in March fllwing extensive system tests.

13 The prject was handed ver well befre the scheduled perid t the Owner, M./s. Pwergrid. One majr feature f this prject has been the quantum f indigenisatin in the prducts used. Apart frm the majrity f the cnvertr transfrmers and all the capacitrs, the main bay 400 kv circuit breakers, all bay instrument transfrmers and discnnectrs were supplied lcally. Sme f the system studies fr the higher level cntrls were als perfrmed lcally. ACKNOWLEDGEMENT: The authrs wish t express their sincere gratitude t the Managements f M/s. Pwergrid Crpratin f India Limited, ABB Pwer Technlgies, Sweden and ABB Limited, India fr encuragement and permissin t publish this paper. REFERENCE: (1) A.Girgi, R.Rendina, G.Gergantzis, C. Marchiri, G.Pazienza, S.Crsi, C. Pincella, M.Pzzi, K.G.Danielssn, H.Jhanssn, A.Orini, R.Grampa, The Italy-Greece HVDC Link Paper f CIGRE Sessin 2002, Paris. (2) Jhn Graham, Dn Menzies, Geir Biledt, Antôni Ricard Carvalh, W Wei Ping, Acaci Wey; Electrical System Cnsideratins fr the Argentina-Brazil 1000 MW Intercnnectin; CIGRE Biennial, Paris, 2000 (3) The Garabi 2000 MW Intercnnectin, Back-t-back HVDC t cnnect Weak AC Systems J.Graham, B. Jnssn, R.S.Mni Cuncil f Pwer Utilities, Cnference n Present and Future Trends in Transmissin and Cnvergence, December 2002, New Delhi, India