GNSS LOW NOISE AMPLIFIER GaAs MMIC

Transcription

1 GNSS LOW NOISE AMPLIFIER GaAs MMIC GENERAL DESCRIPTION NJG1130KA1 is a low noise amplifier GaAs MMIC designed for GNSS (Global Navigation Satellite Systems). The LNA offers excellent low noise figure, high linearity and low current consumption. Two stage amplifier and ESD protection circuit are integrated in the IC to achieve very high gain and high ESD tolerance. An ultra-small and ultra-thin package of FLP-A1 is adopted. PACKAGE OUTLINE NJG1130KA1 APPLICATIONS GNSS applications, like GPS, Galileo, GLONASS and COMPASS PND (Personal Navigation Device), Car Navigation, Tablet PC, Mobile Phone, and others mobile device applications GPS L2 Band application Note: For GPS L2 Band application please refer to Application Note FEATURES Low voltage operation Low current consumption High gain Low noise figure 1dB gain compression output power High output IP3 Ultra-small & ultra-thin package +2.85V typ. 5.0mA typ. 29.0dB f=1575mhz 0.5dB f=1575mhz +1dBm f=1575mhz +14dBm f= mhz, Pin=-35dBm FLP-A1 (Package size: 1. x 1. x 0.mm) PIN CONFIGURATION (Top View) 4 5 AMP 3 2 Pin Connection 1. RF OUT 2. GND 3. VDD 4. RF IN 5. GND. GND AMP 1 Package Orientation Mark Note: Specifications and description listed in this datasheet are subject to change without notice. Ver

2 ABSOLUTE MAXIMUM RATINGS T a =+25 C, Z s =Z l =50 PARAMETERS SYMBOL CONDITIONS RATINGS UNITS Drain Voltage V DD 5.0 V Input power Pin V DD =2.85V +15 dbm Power dissipation P D on PCB board, at Tjmax=150 C 170 mw Operating temperature T opr -40~+85 C Storage temperature T stg -55~+150 C ELECTRICAL CHARACTERISTICS GENERAL CONDITIONS: V DD =2.85V, f RF =1575MHz, T a =+25 C, Z s =Z l =50, with application circuit PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS Operating voltage V DD V Operating current I DD RF OFF ma Small signal gain Gain db Noise figure 1dB gain compression output power 3rd order output intercept point NF Exclude PCB & connector losses (0.dB) db P -1dB(out) dbm OIP3 f1=f RF, f2=f1+0khz, Pin=-35dBm dbm RF IN VSWR VSWRi RF OUT VSWR VSWRo

3 NF (db) Gain (db) Pout, IM3 (dbm) OIP3 (dbm) IIP3 (dbm) Pout (dbm) Gain (db) IDD (ma) NJG1130KA1 ELECTRICAL CHARACTERISTICS (Condition: Ta=+25 C,V DD =2.85V, Zs=Zl=50 with application circuit) 25 Pout vs. Pin 30 Gain, IDD vs. Pin P-1dBout=+1dBm 25 Gain Pout -5 - Gain 1dB Compression Line P-1dBin=-1.0dBm Pin (dbm) 15 IDD P-1dBin=-1.0dBm Pin (dbm) 40 Pout, IM3 vs. Pin (f1=1575mhz, f2=f1+0khz) 17 OIP3, IIP3 vs. frequency (f1=1550~100mhz, f2=f1+0khz, Pin=-35dBm) -8 OIP3=+15.4dBm 1 15 OIP Pout IM3-0 IIP3=-13.4dBm Pin (dbm) IIP frequency (MHz) NF, Gain vs. frequency (f=1550~100mhz) Gain NF (NF: Exclude PCB & Connector Losses) frequency (MHz) - 3 -

4 OIP3 (dbm) IIP3 (dbm) VSWRi VSWRo Gain (db) NF (db) P-1dB(OUT) (dbm) NJG1130KA1 ELECTRICAL CHARACTERISTICS (Condition: Ta=+25 C, Zs=Zl=50 with application circuit) 32 Gain, NF vs. VDD 15.0 P-1dB(OUT) vs. VDD P-1dB(OUT) Gain NF VDD (V) VDD (V) OIP3, IIP3 vs. VDD (f1=1575mhz, f2=f1+0khz, Pin=-35dBm) -2 VSWRi, VSWRo vs. VDD OIP VSWRo 12 - IIP3-12 VSWRi VDD (V) VDD (V) IDD vs. VDD (RF OFF) 9 8 IDD (ma) 7 5 IDD VDD (V) - 4 -

5 k-factor OIP3 (dbm) IIP3 (dbm) VSWRi, VSWRo Gain (db) NF (db) P-1dB(OUT) (dbm) NJG1130KA1 ELECTRICAL CHARACTERISTICS (Condition: V DD =2.85V, Zs=Zl=50 with application circuit) 32 Gain, NF vs. Temperature P-1dB(OUT) vs. Temperature 31 Gain P-1dB(OUT) NF Temperature ( o C) Temperature ( o C) 19 OIP3, IIP3 vs. Temperature (f1=1575mhz, f2=f1+0khz, Pin=-35dBm) -12 VSWRi, VSWRo vs. Temperature IIP VSWRi OIP3-1 VSWRo Temperature ( o C) Temperature ( o C) IDD vs. Temperature (RF OFF) k-factor vs. Temperature (f=0mhz~ghz) 8 15 IDD (ma) 4 2 IDD 5-40 o C - o C 0 o C +25 o C +50 o C +85 o C Temperature ( o C) frequency (GHz) - 5 -

6 ELECTRICAL CHARACTERISTICS (Condition: Ta=+25 C, V DD =2.85V, Zs=Zl=50 with application circuit) S11, S22 Zin, Zout VSWR S21, S12 S11, S22 (~GHz) S21, S12 (~GHz) - -

7 APPLICATION CIRCUIT (Top View) RFIN L1 8.2nH 4 AMP 3 L3.8nH VDD L2 18nH C2 00pF 5 2 C3 00pF L4 33nH AMP 1 R1 C1 0pF RFOUT NOTES: L1 and L2 form the input matching circuit. The LNA has integrated coupling and DC-blocking capacitor at the input. L3 is a matching inductor of the integrated 1 st amplifier and 2 nd amplifier. It should be connected to the terminal3 as close as possible. L4 is an output matching inductor. C1 is a coupling and DC-blocking capacitor at the output. C2 and C3 are bypass capacitors. They should be connected between L3 and L4. C2 should be placed to the side of L3, and C3 should be placed to the side of L4, and should not be directly connected L3 and L4. R1 is a stability resistor at high frequency, and it should be connected to the terminal1. Ground terminal (No.2, 5, ) should be connected to the ground plane as close as possible for good RF performance. For good performance, the terminal1,3 and 4 should not be coupled though floating-capacitance which exists between RF transmission lines

8 TEST PCB LAYOUT (Top View) Parts List Parts ID Commment RF IN L2 L1 V DD C2 C3 L3 L4 R1 C1 RF OUT L1 to L4 C1 to C3 R1 TAIYO-YUDEN HK05 Series MURATA GRM15 Series 05 Size PCB (FR-4): t=0.2mm MICROSTRIP LINE WIDTH =0.4mm (Z 0 =50 ) PCB SIZE =17.0mm 17.0mm C2 L2 Terminal3 L3 L1 Terminal4 R1 Terminal1 Ground plane PRECAUTION: [1] For good performance, the terminal1, 3 and 4 should not be coupled though floating-capacitance which exists between RF transmission lines. [2] In order not to couple with terminal 1, 3 and 4, please layout ground pattern under the IC. [3] C2 should be placed to the side of L3, and C3 should be placed the side of L4. They should be connect between L3 and L4, should not be directly connected L3 and L

9 TEST CIRCUITS Test Circuits 1 to 3 define the test conditions used in the product electrical characteristics table. VDD=2.85V RF Input DUT RF Output Port1 Port2 Network Analyzer Test Circuit 1. S-Parameter VDD=2.85V RF Input DUT RF Output Noise Source Output Input NF Analyzer Test Circuit 2. NF Signal Generator Signal Generator Isolator Power Comb. VDD=2.85V RF Input RF Output Spectrum DUT Analyzer ATT: db ATT: db Isolator Test Circuit 3. Third order output intercept point - 9 -

10 NJG1130KA1 PACKAGE OUTLINE (FLP-A1) UNIT: mm Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. Do NOT eat or put into mouth. Do NOT dispose in fire or break up this product. Do NOT chemically make gas or powder with this product. To waste this product, please obey the relating law of your country. [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle with care to avoid these damages. - -