MGA Low Noise Amplifier with switchable Bypass/Shutdown Mode in Low Profile Package. Features. Applications. VBias
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1 MGA-4 Low Noise Amplifier with switchable Bypass/Shutdown Mode in Low Profile Package Data Sheet Description Avago Technologies MGA-4 is an economical, easy-to-use GaAs MMIC Low Noise Amplifier (LNA) with Bypass/ Shutdown mode. The LNA has low noise and high linearity achieved through the use of Avago Technologies proprietary.5 m GaAs Enhancement-mode phemt process. The Bypass/Shutdown mode enables the LNA to be bypassed during high input signal power and reduce current consumption. It is housed in a low profile. x 1.3 x.5mm 3 -pin Ultra Thin Package. The compact footprint and low profile coupled with low noise, high linearity make the MGA-4 an ideal choice as a low noise amplifier for mobile receiver in the WiMAX, WLAN(8.11b/g), WiBro and DMB applications. Component Image. x 1.3 x.5 mm 3 -lead Ultra Thin Package 4X Pin Configuration Pin 1 (Vbias) Pin (RFin) Pin 3 (Gnd) GND TOP VIEW Note: Package marking provides orientation and identification 4 = Product Code X = Month Code Pin (Vsd) Pin 5 (RFOut) Pin 4 (Vdd) Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = V ESD Human Body Model = 3 V Refer to Avago Application Note A4R: Electrostatic Discharge, Damage and Control. Features Low current consumption Adjustable bias current 1.5 GHz 3 GHz operating range Low Noise Figure Low current consumption in Bypass Mode, <1 A Fully matched to 5 ohm in Bypass Mode High Linearity (LNA and Bypass Mode) Low profile package Typical Performance.4 GHz; 3V, 7mA (Typ): 15.3 db Gain.95 db Noise Figure +5. dbm Input IP3-3. dbm Input Power at 1 db gain compression 3.8 db Insertion Loss in Bypass Mode 1 dbm IIP3 in Bypass Mode (Pin = - dbm) <1 A current consumption in Bypass mode Applications Low noise amplifier for GPS, WiMAX, WLAN, WiBro and DMB applications. Other ultra low noise applications in the GHz band. Simplified Schematic VBias RF IN R 1 Bias / Control VSD L LNA L 3 4 C 5 L R RF OUT Vdd C
2 Absolute Maximum Rating [1] T A = Symbol Parameter Units Absolute Maximum V dd Device Voltage, RF Output to Ground V 5 Vbias Control Voltage V (Vdd-.3) P in,max CW RF Input Power dbm +1 P diss Total Power Dissipation mw 94 T j Junction Temperature C 15 T STG Storage Temperature C -5 to 15 Thermal Resistance Thermal Resistance [,3] (V dd = 3. V, Id = 7 ma), jc = C/W Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage.. Thermal resistance measured using Infra-Red Measurement Technique. 3. Board temperature (T b ) is. For T b >14 C, derate the device power at 14 mw per C rise in Board (pakcage belly) temperature. Product Consistency Distribution charts [1] LSL USL USL Figure 1. GHz,Vdd 3 V; Vbias 1.8 V LSL = 14.3 db, Nominal = 15.3 db, USL = 1.7 db Figure. NF@.4 GHz,Vdd 3 V; Vbias 1.8 V Nominal =.95 db, USL = 1. db USL Figure 3. GHz, Vdd 3 V; Vbias 1.8 V Nominal = 7. ma,usl = 1. ma Note: 1. Distribution data sample size is 3 samples taken from 3 different wafers and 3 different lots. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits.
3 Electrical Specifications [1] T A =, Vdd = 3 V, Vbias = 1.8 V, RF measurement at.4 GHz Typical Performance. See Fig 4 and Fig for demo board and schematic. Symbol Parameter and Test Condition Units Min. Typ. Max. LNA Mode performance ( Vdd = 3 V,Vbias = 1.8 V & VSD = V) Idd Bias Current ma 7 11 Gain Gain db NF Noise Figure db IIP3 Input Third Order Intercept Point dbm +5. IP1dB Input Power at 1 db Gain Compression dbm -3. S11 Input Return Loss, 5 source db -11 S Output Return Loss, 5 load db -1 S1 Reverse Isolation db -3 BYPASS Mode performance ( Vdd = 3 V,Vbias = V & VSD = V) S1 BYPASS Bypass Mode Insertion Loss db 3.8 IIP3 BYPASS Bypass Mode IIP3 (Tested at - dbm input Power) dbm 1 Idd BYPASS Bypass Mode Current A 5 Shutdown Mode performance ( Vdd = 3 V,Vbias = V & VSD = 3 V) S1 SHUTDOWN Shutdown Mode Isolation db 1 Idd SHUTDOWN Shutdown Mode Current A 1 Note: 1..4 GHz IIP3 test condition: F RF1 =.395 GHz, F RF =.4 GHz with input power of -3 dbm per tone. Table 1. LNA Switch Truth Table Vbias (V) / Vsd (V) Vdd (V) Mode 1.8 / [1] 3 LNA / [] 3 BYPASS / 3 [3] 3 SHUTDOWN Notes: 1. Device operation in LNA mode if Vbias > 1.5 V and VSD <.5 V. Bias current of LNA can be varied with different values of Vbias for Vbias > 1.5 V. See Fig 5 below.. Device operation in BYPASS mode if Vbias <.3 V and VSD <.5 V. 3. Device is shutdown if Vsd >. V. In SHUTDOWN mode, LNA and internal Bypass switch is turned OFF. SHUTDOWN mode overrides Vbias voltage setting. Pin (Vsd) is a Pull-Down logic function pin and recommend to ground it if shutdown function is not used in application. 3
4 Demo Board Layout GND Vbias Vsd GND Vdd GND 5 GND OCT 1 Avago Technologies Vbias GND Vsd Vdd GND MIMOSA v RF Input R RF Output OUT L L3 L1 IN R1 C1 C Figure 4. Demo Board Layout Diagram Application Notes 1. Performance in a specified frequency band can be optimized by changing component values in the demo board above to suit the application at that frequency. The schematic on page 5 and 11 show two sets of components used to demonstrate performance at the (.3.4) GHz Wibro band and (.5.7) GHz WiMAX/DMB band.. Pin1 (Vbias pin) voltage in LNA mode can be varied to enable the LNA bias current to be adjusted, refer to next graph: Id (ma) Vbias (V) Figure 5. Id vs Vbias (Vdd = 3 V; Vsd = V). Vbias is varies in this plot. 4
5 Demo Board Schematic for.3.4 GHz Application RF IN (Pin ) 5-Ohms TL V Bias (Pin 1) R L1 1 Bias / Control 5 3 LNA 4 VSD (Pin ) L L3 C1 5-Ohms TL R1 C RF OUT (Pin 5) Vdd (Pin 4) Gnd (Pin 3) Figure. Demo Board Schematic Diagram Table Typical Components Used For Demo Board In Fig 4 And Schematic Shown In Fig. R is adjusted for desired current. Component Vendor Size Value L1 Taiyo Yuden 4.7 nh L Taiyo Yuden nh L3 Taiyo Yuden 4.4 nh C1 Taiyo Yuden 4 1 pf C Murata 4.1 F R1 ROHM 4 1 ohm R ROHM 4.7 Kohm MGA-4 Typical Performance (.4 GHz match) T A = +, V dd = 3 V, I ds = 7 ma (Vbias = 1.8 V), RF measurement at.4 GHz, Input Signal = CW unless stated otherwise. db Input Return Loss Output Return Loss Gain Isolation Figure 7. LNA Mode Gain, Input Return Loss, Output Return Loss, Isolation vs Frequency 5
6 LNA Mode Plots (.4 GHz match); Vdd = 3 V, Vbias = 1.8 V, Vsd = V Gain (db) Figure 8. LNA Mode Gain vs Frequency vs Id 4 ma 7 ma 9 ma NF (db) ma.5 7 ma 9 ma Figure 9. LNA Mode Noise Figure vs Frequency vs Id Gain (db) Id (ma) Figure 1. LNA Mode Gain vs Id vs Temperature NF (db) C Id (ma) Figure 11. LNA Noise Figure vs Id vs Temperature C 7 5 IP1dB (dbm) Id (ma) Figure 1. LNA Mode IP1dB vs Id vs Temperature IIP3 (dbm) C Id (ma) Figure 13. LNA Mode IIP3 vs Id vs Temperature
7 LNA Mode Plots (.4 GHz match); Vdd = 3 V, Vbias = 1.8 V, Vsd = V Figure 14. Edwards-Sinsky Output Stability Factor(Mu) at Vdd = 3 V Figure 15. Edwards-Sinsky Input Stability Factor(Mu ) at Vdd = 3 V Bypass Mode Plots (.4 GHz match); Vdd = 3 V, Vbias = V, Vsd = V db Input Return Loss Output Return Loss Gain Isolation Figure 1. Bypass Mode Gain, Input Return Loss, Output Return Loss, Isolation vs Frequency Bypass Insertion Loss (db) Figure 17. Bypass Mode Insertion Loss vs Frequency vs Temperature -4 C IIP3 (dbm) Figure 18. Bypass Mode IIP3 vs Frequency vs Temperature -4 C IIP3 (dbm) Pin (dbm) Figure 19. Bypass Mode IIP3 vs Input Power 7
8 Shutdown Mode Plots (.4 GHz match); Vdd = 3 V, Vbias = V, Vsd = 3 V db Input Return Loss Output Return Loss Gain Isolation Figure. Shutdown Mode Gain, Input Return Loss, Output Return Loss, Isolation vs Frequency Shutdown Isolation (db) Figure 1. Shutdown Mode Isolation vs Frequency vs Temperature -4 C Demo Board Schematic for.5.7 GHz Application RF IN (Pin ) V Bias (Pin 1) 5-Ohms TL R L1 1 Bias / Control 5 3 LNA 4 VSD (Pin ) L L3 C1 5-Ohms TL R1 C RF OUT (Pin 5) Vdd (Pin 4) Gnd (Pin 3) Figure. Demo Board Schematic Diagram Table 3 Typical Components Used For Demo Board In Fig 4 And Schematic Shown In Fig. Component Vendor Size Value L1 Taiyo Yuden nh L Taiyo Yuden nh L3 Taiyo Yuden nh C1 Taiyo Yuden 4 1 pf C Murata 4.1 F R1 ROHM 4 1 ohm R ROHM 4.7 Kohm 8 MGA-4 Typical Performance (. GHz match) T A = +, V dd = 3 V, I ds = 7 ma (Vbias = 1.8 V), RF measurement at. GHz, Input Signal=CW unless stated otherwise. db Input Return Loss Output Return Loss Gain Isolation Figure 3. LNA Mode Gain, Input Return Loss, Output Return Loss, Isolation vs Frequency
9 LNA Mode Plots (. GHz match); Vdd = 3 V, Vbias = 1.8 V, Vsd = V Gain (db) ma 7 ma 9 ma Figure 4. LNA Mode Gain vs Frequency vs Id NF (db) Figure 5. LNA Mode Noise Figure vs Frequency vs Id 4 ma 7 ma 9 ma Gain (db) Id (ma) Figure. LNA Mode Gain vs Id vs Temperature -4 C NF (db) Figure 7. LNA Mode Noise Figure vs Id vs Temperature -4 C Id (ma) C 7 5 IP1dB (dbm) Id (ma) Figure 8. LNA Mode IP1dB vs Id vs Temperature IIP3 (dbm) C Id (ma) Figure 9. LNA Mode IIP3 vs Id vs Temperature 9
10 LNA Mode Plots (. GHz match); Vdd = 3 V, Vbias = 1.8 V, Vsd = V Figure 3. Edwards-Sinsky Output Stability Factor (Mu) at Vdd = 3 V Figure 31. Edwards-Sinsky Input Stability Factor (Mu ) at Vdd = 3 V Bypass Mode Plots (. GHz match); Vdd = 3 V, Vbias = V, Vsd = V db Input Return Loss Output Return Loss Gain Isolation Figure 3. Bypass Mode Gain, Input Return Loss, Output Return Loss, Isolation vs Frequency Bypass Insertion Loss (db) C Figure 33. Bypass Mode Insertion Loss vs Frequency vs Temperature IIP3 (dbm) Figure 34. Bypass Mode IIP3 vs Frequency vs Temperature -4 C IIP3 (dbm) Pin (dbm) Figure 35. Bypass Mode IIP3 vs Input Power 1
11 Shutdown Mode Plots (. GHz match); Vdd = 3 V, Vbias = V, Vsd = 3 V db Input Return Loss Output Return Loss Gain Isolation Figure 3. Shutdown Mode Gain, Input Return Loss, Output Return Loss, Isolation vs Frequency Shutdown Isolation (db) Figure 37. Shutdown Mode Isolation vs Frequency vs Temperature -4 C Test Circuit For S- and Noise parameter measurement [1] (.4 GHz match) Reference plane MGA-4 V Bias R 1 (Pin 1) Bias / Control VSD (Pin ) RF IN (Pin ) 5 RF OUT (Pin 5) LNA 3 4 L3 R1 Vdd (Pin 4) C1 C Gnd (Pin 3) Note: 1. The measurement is calibrated up to the input (RFin) and output (RFout) pin of the package. Component Vendor Size Value L3 Taiyo Yuden 4.4 nh C1 Taiyo Yuden 4 1 pf C Murata 4.1 F R1 ROHM 4 1 ohm Figure 38. S-parameter and Noise parameter test circuit on demo board 11
12 MGA-4 LNA Mode typical scattering parameters at, Vdd = 3 V; Vbias = 1.8 V; Vsd = V Frequency S11 S1 S1 S (GHz) Mag Angle db Mag Angle db Mag Angle Mag Angle
13 MGA-4 Bypass Mode typical scattering parameters at, Vdd = 3 V; Vbias = V; Vsd = V Frequency S11 S1 S1 S (GHz) Mag Angle db Mag Angle db Mag Angle Mag Angle
14 MGA-4 LNA Mode typical noise parameters at, Vdd = 3 V; Vbias = 1.8 V; Vsd = V Freq. (GHz) Fmin (db) opt Mag opt Ang Rn/ Test Circuit For S- and Noise parameter measurement [1] (. GHz match) Reference plane MGA-4 V Bias R 1 (Pin 1) Bias / Control VSD (Pin ) RF IN (Pin ) 5 RF OUT (Pin 5) LNA 3 4 L3 R1 Vdd (Pin 4) C1 C Gnd (Pin 3) Note: 1. The measurement is calibrated up to the input (RFin) and output (RFout) pin of the package Component Vendor Size Value L3 Taiyo Yuden nh C1 Taiyo Yuden 4 1 pf C Murata 4.1 F R1 ROHM 4 1 ohm Figure 39. S-parameter and Noise parameter test circuit on demo board 14
15 MGA-4 LNA Mode typical scattering parameters at, Vdd = 3 V; Vbias = 1.8 V; Vsd = V Frequency S11 S1 S1 S (GHz) Mag Angle db Mag Angle db Mag Angle Mag Angle
16 MGA-4 Bypass Mode typical scattering parameters at, Vdd = 3 V; Vbias = V; Vsd = V Frequency S11 S1 S1 S (GHz) Mag Angle db Mag Angle db Mag Angle Mag Angle
17 MGA-4 LNA Mode typical noise parameters at, Vdd = 3 V; Vbias = 1.8 V; Vsd = V Freq. (GHz) Fmin (db) opt Mag opt Ang Rn/
18 Package Dimensions Pin#1 DOT by Marking Pin#1 Indicator R.1. ±.5.5 ± ±.5 4X TOP VIEW SIDE VIEW BOTTOM VIEW Notes: 1. All dimensions are in milimeters.. Dimensions are inclusive of plating. 3. Dimensions are exclusive of mold flash and metal burr. PCB Land Patterns and Stencil Design sq..8 sq sq R LAND PATTERN WITH VIA STENCIL OPENING Top Metal Solder Mask Opening sq.. sq..5 Notes: 1. All dimension are in mm.. Recommend to use standard 4 mils Stencil thickness COMBINED LAND PATTERN & STENCIL OPENING 18
19 Device Orientation REEL USER FEED DIRECTION CARRIER TAPE 4X 4X 4X USER FEED DIRECTION COVER TAPE TOP VIEW END VIEW Tape Dimensions (all dimensions in mm) 4. ±.1. ±.5 Ø 1.5 ± ± ±.5 4. ±.1 Ø ± MAX. 45 MAX..17 ±.5.73 ± ±.5 Ao Ko Bo Part Number Ordering Information Part # Qty Container MGA-4-BLKG 1 Antistatic Bag MGA-4-TR1G 3 7 Reel MGA-4-TRG 1 13 Reel 19
20 Reel Dimensions For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 5-11 Avago Technologies. All rights reserved. AV-888EN - November 15, 11
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GHz V Low Current GaAs MMIC LNA Technical Data MGA-876 Features Ultra-Miniature Package.6 db Min. Noise Figure at. GHz. db Gain at. GHz Single + V or V Supply,. ma Current Applications LNA or Gain Stage
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