MGA-645T6 Data Sheet Description Features Component Image Typical Performance 4FYM Pin Configuration GND Top View Applications Simplified Schematic

Transcription

1 MGA-5T Low Noise Amplifier with Bypass/Shutdown Mode in Low Profile Package Data Sheet Description Avago Technologies MGA-5T is an economical, easy-to-use GaAs MMIC Low Noise Amplifier (LNA) with Bypass/ Shutdown mode. The LNA has low noise and high linearity achieved through the use of Avago Technologies proprietary.5um GaAs Enhancement-mode phemt process. The Bypass/Shutdown mode enables the LNA to be bypassed during high input signal power and reduce current consumption. It is housed in a low profile x.3 x.mm -pin Ultra Thin Package. The compact footprint and low profile coupled with low noise, high linearity make the MGA-5T an ideal choice as a low noise amplifier for mobile receiver in the WiMax, WLAN(.b/g), WiBro and DMB applications. Component Image Pin Configuration Pin (Vbypass) Pin (RF_IN). FYM Pin 3 (GND) Simplified Schematic Vbypass RFin L 3 GND Top View Note: Package marking provides orientation and identification F = Product Code Y = Year of manufacture M = Month of manufacture MGA-5T bias/control Pin (Not Used) Pin 5 (RF_OUT) Pin (VDD) 5 L3 L C C RFout Vdd Features. x.3 x. mm 3 -lead Ultra Thin Package Low bias current Simple matching network.5 GHz 3 GHz operating range Adjustable bias current Low Noise Figure Bypass/Shutdown Mode using a single pin Low current consumption in Bypass Mode, <ua Fully matched to 5 ohm in Bypass Mode High Linearity (LNA and Bypass Mode) Low profile package Typical Performance. GHz; 3V, 7mA (typ): 5 db Gain. db Noise Figure with 9dB Input Return Loss +7 dbm Input IP3-5 dbm Input Power at db gain compression.5 db Insertion Loss in Bypass Mode dbm IIP3 in Bypass Mode (Pin = -dbm) <ua current consumption in Bypass & Shutdown Mode Applications Low noise amplifier for GPS, WiMax, WLAN, WiBro and DMB applications. Other ultra low noise applications in the.5 3 GHz band Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = V ESD Human Body Model = V Refer to Avago Application Note AR: Electrostatic Discharge, Damage and Control.

2 Absolute Maximum Rating [] TA=5 C Symbol Parameter Units Absolute Max. Vdd Device Voltage V V bypass Control Voltage V (Vdd-.3) P in,max CW RF Input Power dbm +5 P diss Total Power Dissipation [3] mw T j Junction Temperature C 5 T STG Storage Temperature C -5 to 5 Thermal Resistance [,3] (Vdd = 3.V, Id=7mA), θjc = C/W Notes:. Operation of this device in excess of any of these limits may cause permanent damage.. Thermal resistance measured using Infra- Red Measurement Technique. 3. Board temperature T B is 5 C, for T B > C derate the device power at mw per C rise in Board (package belly) temperature. Product Consistency Distribution Charts [] Figure. GHz, Vd 3V; Vbypass. V, LSL=3.5, Nominal=5., USL=.5 Figure. GHz, Vd 3V; Vbypass. V, Nominal=., USL=.5 Figure 3. GHz, Vd 3V; Vbypass. V, Nominal=7., USL=3. Notes:. Distribution data sample size are 5 samples taken from 3 different wafers and 3 different lots. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits. Electrical Specifications [5,7] T A = 5 C, Vdd =3V, Vbypass =.V, RF measurement at. GHz, measured on demo board (see Fig. ) unless otherwise specified. Symbol Parameter and Test Condition Units Min. Typ. Max. Id Bias Current ma Gain Gain db NF Noise Figure (Typ.Vbypass=.V) db -..5 IIP3 [] Input Third Order Intercept Point dbm OPdB Output Power at db Gain Compression dbm S Input Return Loss, 5Ω source db S Output Return Loss, 5Ω load db S Reverse Isolation db S BYPASS Bypass Mode Loss (Vbypass = ) db IIP3 BYPASS Bypass Mode IIP3 (tested at -dbm input Power) dbm - - Id BYPASS Bypass Mode current ua - - Notes: 5. Measurements at.ghz obtained using demo board described in Figure, with component values on Figure (.3. GHz)..GHz I IP3 test condition: F RF =.395 GHz, F RF =. GHz with input power of -3dBm per tone. 7. Use proper bias, heatsink and derating to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and application note for more details.

3 Demo Board Layout *Application Notes: - VBYPASS VDD J L3 L C J C. Performance in a specified frequency band can be optimized by changing component values in the demoboard above to suit the application at that frequency. The schematic on page and 7 show two sets of components used to demonstrate performance at the (.3 -.) GHz Wibro band and (.5 -.7) GHz Wimax/DMB band.. Operational Logic of Bypass/Shutdown pin (Pin ) - Normal LNA operation : [. to (Vdd-.3)] Volt, - Bypass/Shutdown mode : Volt or Open Pin voltage in LNA mode can be varied to enable the LNA bias current to be adjusted, refer to next graph: GROUND L Copper foil Figure. Demo Board Layout Diagram * Vsd,V Figure 5. Id vs Vbypass (Vdd=3V) 3

4 Demo Board Schematic for.3. GHz tuning Vbypass MGA-5T bias/control Part Size Value P/N L.7nH LL5FHN7B (TOKO) L 3.9nH LL5FH3N9C (TOKO) RFin 5 L3 RFout L3.7nH LL5FHN7C (TOKO) C pf MCH55AJK(ROHM) L 3 L Vdd C.uF CM5X7RKAHF J,J [] ohm RK73ZE (KOA) Figure. Demo Board Schematic Diagram C C Notes. Jumpers indicated in the demo board drawing are not needed in actual application board; this is because generic demo boards were used for development. MGA-5T Typical Performance (.3. GHz match) TA = +5 C, Vdd = 3V, Ids = 7mA (Vbypass =.V), RF measurement at. GHz, Input Signal=CW unless stated otherwise. Gain - Output Return Loss Input Return Loss db - -3 Isolation Figure 7. LNA Mode S,S,S, S vs Frequency freq, GHz

5 LNA Mode Plots (.3. GHz match) ; Vdd = 3V NF,dB Freq,GHz Figure. LNA Mode Noise Figure vs Frequency vs Id ma 7mA ma Gain,dB Freq,GHz Figure 9. LNA Mode Gain vs Frequency vs Id ma 7mA ma Gain,dB Figure. LNA Mode Gain vs Id vs Temperature - DegC 5 DegC 5 DegC NF,dB Figure. LNA Noise Figure vs Id vs Temperature - DegC 5 DegC 5 DegC IPdB,dBm - - DegC 5 DegC - 5 DegC Figure. LNA Mode IPdB vs Id vs Temperature IIP3,dBm Figure 3. LNA Mode IIP3 vs Id vs Temperature - DegC 5 DegC 5 DegC 5

6 Bypass Mode Plots (.3. GHz match) (Vdd = 3V ; Vbypass = V) -5 Input Return Loss db Output Return Loss Isolation Gain freq, GHz Figure. Bypass Mode S, S, S, S vs Frequency Loss,dB Freq,GHz Figure 5. Bypass Mode Loss vs Frequency vs Temperature - DegC 5 DegC 5 DegC IIP3,dBm - DegC 5 DegC 5 DegC Freq,GHz Figure. Bypass Mode IIP3 vs Frequency vs Temperature IIP3,dBm Pin,dBm Figure 7. Bypass Mode IIP3 vs Input Power

7 Demo Board Schematic for.5.7 GHz tuning Vbypass RFin L 3 MGA-5T bias/control 5 L3 L C C RFout Vdd Part Size Value P/N L.nH LL5FHNB (TOKO) L 3.9nH LL5FH3N9C (TOKO) L3 3.9nH LL5FH3N9C (TOKO) C pf MCH55AJK(ROHM) C.uF CM5X7RKAHF J,J [9] ohm RK73ZE (KOA) Notes: 9. Jumpers indicated in the demo board drawing are not needed in actual application board; this is because generic demo boards were used for development. Figure. Demo Board Schematic Diagram MGA-5T Typical Performance (.5 GHz.7 GHz match) TA = +5 C, Vdd = 3V, Ids = 7mA (Vbypass =.V), RF measurement at. GHz, Input Signal=CW unless stated otherwise. Gain Output Return Loss db Input Return Loss Isolation freq, GHz Figure 9. LNA Mode S,S,S, S vs Frequency 7

8 LNA Mode Plots (.5.7 GHz match) ; Vdd = 3V NF,dB ma 7mA ma Freq,GHz Gain,dB ma 7mA ma Freq,GHz Figure. LNA Mode Noise Figure vs Frequency vs Id Figure. LNA Mode Gain vs Frequency vs Id Gain,dB Figure. LNA Mode Gain vs Id vs Temperature - DegC 5 DegC 5 DegC NF,dB DegC 5 degc. 5 degc Figure 3. LNA Mode Noise Figure vs Id vs Temperature IPdB,dBm DegC 5 DegC 5 DegC IIP3,dBm DegC 5 degc 5 DegC Figure. LNA Mode IPdB vs Id vs Temperature Figure 5. LNA Mode IIP3 vs Id vs Temperature

9 Bypass Mode Plots (.5.7 GHz match) (Vdd=3V; Vbypass = V) Input Return Loss -5 - Isolation db -5 Gain - Output Return Loss freq, GHz Figure. Bypass Mode S, S, S, S vs Frequency Loss,dB DegC 5 DegC 5 DegC Freq,GHz IIP3,dBm - DegC 5 DegC 5 DegC Freq,GHz Figure 7. Bypass Mode Loss vs Frequency vs Temperature Figure. Bypass Mode IIP3 vs Frequency vs Temperature IIP3,dBm Pin,dBm Figure 9. Bypass Mode IIP3 vs Input Power 9

10 Test Circuit For S and Noise parameter measurement [] Reference plane Vbypass MGA-5T bias/control Part Size Value P/N L 3.9nH LL5FH3N9C (TOKO) C pf MCH55AJK(ROHM) RFin 3 5 L RFout Vdd C.uF CM5X7RKAHF Note:. The measurement is calibrated up to the input (RFin) and output (RFout) pin of the package C C Figure 3. S parameter and Noise parameter test circuit in an automated measurement system MGA-5T LNA Mode typical scattering parameters at 5C, Vdd = 3V ; Id = 7mA Freq. S S S S (GHz) Mag Ang (db) Mag Ang (db) Mag Ang Mag Ang

11 MGA-5T LNA Mode typical noise parameters at 5 C, Vdd = 3V ; Id = 7mA Freq.(GHz) Fmin (db) opt Mag opt Ang Rn/

12 MGA-5T Bypass Mode typical scattering parameters at 5 C, Vdd = 3V ; Vbypass = V Freq. S S S S (GHz) Mag Ang (db) Mag Ang (db) Mag Ang Mag Ang

13 Package Dimensions PIN # DOT BY MARKING. ±.5. ±.5..5 PIN # INDICATOR R..3 ±.5 FYM.5... PCB Land Pattern R. Top Metal Solder Mask Opening Land Pattern With Via Stencil Outline Drawing and Combined Land Pattern & Stencil Layout Stencil Opening Notes:. All dimension are in MM. Via hole is optional. 3. Recommend to use standard mils Stencil thickness.3 Combined Land Pattern & Stencil Opening 3

14 Device Orientation REEL USER FEED DIRECTION CARRIER TAPE FYM FYM FYM USER FEED DIRECTION COVER TAPE TOP VIEW END VIEW Tape Dimensions. ±..5 ±.. ±.. ±.5.75 ±.. +.3/ ±.5.. ±.5 5 MAX. 5 MAX..73 ±.5 7±5 7±5 Part Number Ordering Information Part # Qty Container MGA-5T-BLKG Antistatic Bag MGA-5T-TRG 3 7 Reel MGA-5T-TRG 3 Reel

15 Reel Dimensions - 7 Inch SEE DETAIL "X".5mm EMBOSSED LETTERS LETTERING THICKNESS:.mm SLOT HOLE "a" Ø7.±.5 SLOT HOLE "b" FRONT BACK PS SLOT HOLE(x) APART. PS RECYCLE LOGO FRONT VIEW SLOT HOLE "a": 3.±.5mm(x) SLOT HOLE "b":.5±.5mm(x) R5. Slot hole 'b' R ** +.5*. -. FRONT BACK.5 MIN. +.5 Ø3. -. Ø. MIN. DETAIL "X" Ø55.±.5 Ø7.±. 3.5 DETAIL "Y" (Slot Hole). EMBOSSED RIBS RAISED:.5mm, WIDTH:.5mm BACK VIEW Slot hole 'a' Ø5.±.3.* MAX. 5

16 Reel Dimensions - 3 Inch x mm DATE CODE MM EMBOSSED LETTERING.mm HEIGHT x MIN..mm THICK. Ø39.±. HUB Ø.±.5 PS CPN MPN EMBOSSED LETTERING 7.5mm HEIGHT EMBOSSED LINE (x) 9.mm LENGTH LINES 7.mm AWAY FROM CENTER POINT PS RECYCLE LOGO SEE DETAIL "X" ESD LOGO Ø. FRONT VIEW.9-5.**. +.* -. EMBOSSED LETTERING 7.5mm HEIGHT Detail "X" +.5 Ø3. -..(MIN.).5(MIN.) PS Ø.±.5 Ø39.±. BACK VIEW R9.±.5 Ø.3±.5(3x) SLOT 5.±.5(3x). MAX.* For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 5-9 Avago Technologies. All rights reserved. AV-EN - November, 9