MGA-634P8 Ultra Low Noise, High Linearity Low Noise Amplifier. Features. Specifications. Applications. RFin

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1 MGA-3P8 Ultra Low Noise, High Linearity Low Noise Amplifier Data Sheet Description Avago Technologies MGA-3P8 is an economical, easyto-use GaAs MMIC Low Noise Amplifier (LNA). The LNA has low noise and high linearity achieved through the use of Avago Technologies proprietary.5um GaAs Enhancement-mode phemt process. It is housed in a miniature. x. x.75mm 3 8-pin Quad-Flat-Non-Lead (QFN) package. It is designed for optimum use from 1.5 GHz up to.3 GHz. The compact footprint and low profile coupled with low noise, high gain and high linearity make the MGA-3P8 an ideal choice as a low noise amplifier for cellular infrastructure for GSM and CDMA. For optimum performance at lower frequency from 5MHz up to 1.5GHz, MGA-33P8 is recommended. For optimum performance at higher frequency from.3ghz up to GHz, MGA-35P8 is recommended. All these 3 products, MGA- 33P8, MGA-3P8 and MGA-35P8 share the same package and pinout configuration. Pin Configuration and Package Marking. x. x.75 mm 3 8-lead QFN [1] [] [3] [] 3X Top View [8] [7] [] [5] [8] [7] [] [5] Bottom View Pin 1 Vbias Pin 5 Not Used Pin RFinput Pin Not Used Pin 3 Not Used Pin 7 RFoutput/Vdd Pin Not Used Pin 8 Not Used Centre tab - Ground [1] [] [3] [] Note: Package marking provides orientation and identification 3 = Device Code, where X is the month code. Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 7 V (Class A) ESD Human Body Model = 5 V (Class 1B) Refer to Avago Application Note AR: Electrostatic Discharge, Damage and Control. Features Ultra Low noise Figure High linearity performance GaAs E-pHEMT Technology [1] Low cost small package size:.x.x.75 mm 3 Excellent uniformity in product specifications Tape-and-Reel packaging option available Specifications 1.9 GHz; 5V, 8mA 17. db Gain. db Noise Figure 15.5 db Input Return Loss 3 dbm Output IP3 1 dbm Output Power at 1dB gain compression Applications Low noise amplifier for cellular infrastructure for GSM TDS-CDMA, and CDMA. Other ultra low noise application. Simplified Schematic RFin C5 C3 C1 L1 R1 Rbias [1] [] [3] [] bias Notes: The schematic is shown with the assumption that similar PCB is used for all MGA-33P8, MGA-3P8 and MGA-35P8. Detail of the components needed for this product is shown in Table 1. Enhancement mode technology employs positive gate voltage, thereby eliminating the need of negative gate voltage associated with conventional depletion mode devices. Good RF practice requires all unused pins to be earthed. R [8] [7] [] [5] Vdd L C C C RFout

2 Absolute Maximum Rating [1] T A = Symbol Parameter Units Absolute Maximum V dd Device Voltage, V 5.5 RF output to ground V bias Gate Voltage V.7 P in,max CW RF Input Power (V dd = 5.V, I d = 5 ma) dbm + P diss Total Power Dissipation [] W.5 T j Junction Temperature C 15 T stg Storage Temperature C -5 to 15 Thermal Resistance Thermal Resistance [3] (V dd = 5.V, I dd = 5mA) jc = C/W Notes: 1. Operation of this device in excess of any of these limits may cause permanent damage.. Power dissipation with device turned on. Board temperature T B is. Derate at 1mW/ C for T B >119 C. 3. Thermal resistance measured using Infra-Red Measurement Technique Electrical Specifications [1], [] RF performance at T A =, V dd = 5V, R bias = 5. kohm, 1.9 GHz, measured on demo board in Figure 1 with component listed in Table 1 for 1.9 GHz matching. Symbol Parameter and Test Condition Units Min. Typ. Max. I dd Drain Current ma Gain Gain db OIP3 [] Output Third Order Intercept Point dbm 33 3 NF [3] Noise Figure db..9 OP1dB Output Power at 1dB Gain Compression dbm 1 IRL Input Return Loss, 5 source db 15.5 ORL Output Return Loss, 5 load db 13 REV ISOL Reverse Isolation db 3 Notes: 1. Measurements at 1.9 GHz obtained using demo board described in Figure 1.. OIP3 test condition: F RF1 = 1.9 GHz, F RF = 1.91 GHz with input power of -1dBm per tone. 3. For NF data, board losses of the input have not been de-embedded.. Use proper bias, heatsink and derating to ensure maximum device temperature is not exceeded. See absolute maximum ratings and application note for more details.

3 Product Consistency Distribution Charts [1, ] LSL Idd Max: 1 Min: 37 Mean: 8 USL Noise Figure Max:.9 Mean:. USL Figure GHz, 5V, 8mA Mean = 8 Figure. Noise 5V, 8mA Mean =. LSL OIP3 Min: 33 Mean: 3 LSL Gain Max: 19.1 Min: 1.1 Mean: 17. USL Figure GHz, 5V, 8mA Mean = 3 Figure. 5V, 8mA Mean = 17. Notes: 1. Distribution data samples are 5 samples taken from 3 different wafers. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits.. Circuit Losses have not been de-embedded from the actual measurements. 3

4 Demo Board Layout Demo Board Schematic C5 (.7uF) Rbias (5.kOhm) Vdd C (.7uF) C3 (1pF) R1 (9.9 Ohm) R ( Ohm) C (1pF) L1 (8.nH) L (8.nH) RFin [1] [] bias [8] [7] C1 (1pF) [3] [] [] [5] C (1pF) Figure 5. Demo Board Layout Diagram Recommended PCB material is 1 mils Rogers RO35. Suggested component values may vary according to layout and PCB material. Figure. Demo Board Schematic Diagram Table 1. Component list for 1.9 GHz matching Part Size Value Detail Part Number C1, C 1pF (Murata) GRM155R71H1KA1E L1 8.nH (CoilCraft) CS-8NXGLU L 8.nH (Toko) LLP15-FH8NC C3, C 1pF (Murata) GRM1555C1H1JZ1E C5, C 85.7uF (Murata) GRM1BRJ75KA11L R1 9.9 Ohm (Rohm) MCR1 MZS F 9R9 R Ohm (Kamaya) RMC1/1S-JPTH Rbias 5. kohm (Rohm) MCR1 MZS J 5 Note: C1, C are DC Blocking capacitors L1 input match for NF L output match for OIP3 C3, C, C5, C are bypass capacitors R1 is stabilizing resistor Rbias is the biasing resistor

5 MGA-3P8 Typical Performance RF performance at T A =, Vdd = 5V, Id = 5mA, measured using 5ohm input and output board, unless otherwise stated. OIP3 test condition: F RF1 = 1.9 GHz, F RF = 1.91 GHz with input power of -1dBm per tone. Fmin (db) Idd (ma) Fmin (db) Idd (ma) Figure 7. Fmin vs Idd at 5V at 1.9GHz. Figure 8. Fmin vs Idd at 5V at GHz. Gain(dB) Idd(mA) Gain(dB) Idd(mA) Figure 9. Gain vs Idd at 5V Tuned for Optimum OIP3 and Fmin at 1.9GHz. Figure 1. Gain vs Idd at 5V Tuned for Optimum OIP3 and Fmin at GHz OIP3(dBm) 5 15 OIP3(dBm) Idd(mA) Idd(mA) Figure 11. OIP3 vs Idd at 5V Tuned for Optimum OIP3 and Fmin at 1.9GHz. Figure 1. OIP3 vs Idd at 5V Tuned for Optimum OIP3 and Fmin at GHz. 5

6 OP1dB (dbm) Idd (ma) Figure 13. OP1dB vs Idd at 5V Tuned for Optimum OIP3 and Fmin at 1.9GHz OP1dB (dbm) Idd (ma) Figure 1. OP1dB vs Idd at 5V Tuned for Optimum OIP3 and Fmin at GHz. Fmin (db) Figure 15. Fmin vs Frequency and Idd at 5V ma 5mA 8mA OIP3(dBm) C Figure 1. OIP3 vs Frequency and Temperature for Optimum OIP3 and Fmin at 5V 5mA Gain (db) C Figure 17. Gain vs Frequency and Temperature for Optimum OIP3 and Fmin at 5V 5mA Fmin (db) C Figure. Fmin vs Frequency and Temperature for Optimum OIP3 and Fmin at 5V 5mA

7 OP1dB(dBm) C Figure 19. OP1dB vs Frequency and Temperature for Optimum OIP3 and Fmin at 5V 5mA Below is the table showing the MGA-3P8 Reflection Coefficient Parameters tuned for maximum OIP3, Vdd = 5V, Idd = 5mA Gamma Load position Magnitude Angle OIP3 (dbm) OP1dB (dbm) RFinput Reference Plane [1] [] [3] [] bias [8] [7] [] [5] RFoutput Reference Plane Notes: 1. The maximum OIP3 values are calculated based on Load pull measurements on approximately 13 different impedances using Focus Load Pull test system.. Measurements are conducted on.1 inch think ROGER 35. The input reference plane is at the end of the RFin pin and the output reference plane is at the end of the RFout pin as shown in Figure. 3. Gamma Load for maximum OIP3 with biasing of 5V ma, 5V 5mA, 5V 7mA and 5V 8mA from 1.5GHz to.5ghz are available upon request. Figure 7

8 MGA-3P8 Typical Performance in Demoboard RF performance at T A =, Vdd = 5V, Rbias = 5. kohm, measured on demo board in Figure. 5 with component list in Table 1 for 1.9 GHz matching, unless or otherwise stated. NF (db) Figure 1. NF vs Frequency vs Temperature - C Gain (db) Frequency (MHz) Figure. Gain vs Frequency vs Temperature - C OIP3 (dbm) Figure 3. OIP3 vs Frequency vs Temperature - C OP1dB (dbm) Figure. OP1dB vs Frequency vs Temperature - C IRL, ORL, Gain, Rev Iso (db) IRL Gain Rev Iso ORL Figure 5. S-Parameter performance with DUT on demoboard shown in Figure 1. K-factor Figure. K-factor vs Frequency vs Temperature - C 8

9 Idd (ma) Rbias (KΩ) Figure 7. Idd vs Rbias Gain (db) Figure 8. Gain vs Frequency vs Idd ma 5mA 7mA NF (db) Figure 9. NF vs Frequency vs Idd 7mA ma 5mA OP1dB (dbm) Figure 3. OP1dB vs Frequency vs Idd 7mA ma 5mA OIP3 (dbm) mA ma 5mA Figure 31. OIP3 vs Frequency vs Idd 9

10 MGA-3P8 Typical Scattering Parameters, Vdd = 5V, Idd = 5mA Freq S11 S1 S1 S GHz Mag. Ang. db Mag. Ang. Mag. Ang. Mag. Ang RFinput Reference Plane [1] [] [3] bias [8] [7] [] RFoutput Reference Plane [] [5] Figure 3. 1

11 Typical Noise Parameters, Vdd = 5V, Idd = 5mA Freq GHz Fmin db opt Mag. opt Ang. R n/ Notes: 1. The Fmin values are based on noise figure measurements at 1 different impedances using Focus source pull test system. From these measurements a true Fmin is calculated.. Scattering and noise parameters are measured on coplanar waveguide made on.1 inch thick ROGER 35. The input reference plane is at the end of the RFinput pin and the output reference plane is at the end of the RFoutput pin as shown in figure SP file with scattering and noise parameters for biasing 5V ma, 5V 5mA, 5V 7mA and 5V 8mA are available upon request. Part Number Ordering Information Part Number No. of Devices Container MGA-3P8-BLKG 1 Antistatic Bag MGA-3P8-TR1G 3 7 inch Reel SLPX Package PIN 1 DOT BY MARKING.±.5.3 Ref..±.5 3X..5.75±.5 Top View Side View.±.5 Exp. DAP PIN #1 IDENTIFICATION R.1.35±.5.5±.5 Bottom View.5 Bsc 1.±.5 Exp. DAP 1.5 Ref. Notes: 1. All dimensions are in millimeters.. Dimensions are inclusive of plating. 3. Dimensions are exclusive of mold flash and metal burr. 11

12 Recommended PCB Land Pattern and Stencil Design R.15.3 Land Pattern.5 (all SM gaps) Stencil Opening Metal surface Soldermask Open R Note: 1. Recommended Land Pattern and Stencil Opening. Stencil thickness is.1mm ( mils) 3. All dimension are in mm unless otherwise specified Combination of Land Pattern and Stencil Opening 1

13 Device Orientation REEL mm CARRIER TAPE 8 mm 3X 3X 3X 3X USER FEED DIRECTION COVER TAPE Tape Dimensions D P P O P E W F + + D 1 t 1 T t 1 MAX K O 1 MAX A O B O CAVITY PERFORATION CARRIER TAPE COVER TAPE DISTANCE DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES) LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER A B K P D 1.3 ±.5.3 ±.5 1. ±.5. ± ±..9 ±..7 ±..157 ± DIAMETER PITCH POSITION WIDTH THICKNESS WIDTH TAPE THICKNESS CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION) D P E W 1.5 ±.1. ± ±.1.1 ±..157 ±..9 ±..315 ± ±..1 ±.8 t 1 8. ±.1.5 ±. 8. ±.3 C 5. ±.1.5 ±. T t. ±.1.5 ±. F 3.5 ± ±. P. ±.5.79 ±. 13

14 Reel Dimensions 7 inch SEE DETAIL "X".5mm EMBOSSED LETTERS LETTERING THICKNESS: 1.mm SLOT HOLE "a" Ø178.±.5 SLOT HOLE "b" FRONT BACK PS SLOT HOLE(x) APART. PS RECYCLE LOGO FRONT VIEW SLOT HOLE "a": 3.±.5mm(1x) SLOT HOLE "b":.5±.5mm(1x) R ** +1.5* MIN. +.5 Ø Ø. MIN. 1 R5. FRONT BACK DETAIL "X" SLOT HOLE b Ø55.±.5 Ø178.± DETAIL "Y" (Slot Hole) 1. SLOT HOLE a EMBOSSED RIBS RAISED:.5mm, WIDTH: 1.5mm BACK VIEW Ø51.±.3 SEE DETAIL "Y" 1. * MAX. For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright 5-1 Avago Technologies. All rights reserved. AV-5EN - May 5, 1