Data Sheet VMMK to 18 GHz Low Noise E-PHEMT in a Wafer Scale Package. Features. Description. Specifications.

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1 VMMK to 18 GHz Low Noise E-PHEMT in a Wafer Scale Package Data Sheet Description Avago Technologies has combined it s industry leading E-pHEMT technology with a revolutionary chip scale package. The VMMK-1218 can produce an LNA with high dynamic range, high gain and low noise figure that generates off of a single position DC power supply. The GaAsCap wafer scale sub-miniature leadless package is small and ultra thin, yet can be handled and placed with standard 42 pick and place assembly. The use of.25 micron gates allow a ultra low noise figure (below 1dB from 5 MHz to 12 GHz) with respectable associated gain. With a flat transconductance over bias and frequency the VMMK-1218 provides excellent linearity of over 3 dbm and power over 15 dbm at one db compression. This product is easy to use since it requires only positive DC voltages for bias and low matching coefficients for simple impedance matching to 5 Ω systems. The VMMK-1218 is intended for any 5MHz to 18GHz application including 82.11abgn WLAN, WiMax, BWA & 82.2 and military applications. WLP 42, 1mm x.5mm x.25 mm BYY Gate BYY Pin Connections (Top View) Top view package marking provides orientation Drain Features Sub-miniature 42 (1mm x.5mm) Surface Mount Leadless Package Low height (.25mm) Frequency Range.5 to 18 GHz Enhancement Mode [1].25 micron gate width Tape and Reel packaging option available Point MTTF > 3 years at 12 o C channel temperature Specifications.7 db Fmin 9. db Ga +22 dbm output 3 rd order intercept +12 dbm output power Applications Low Noise and Driver for Cellular/PCS and WCDMA Base Stations 2.4 GHz, 3.5GHz, 5-6GHz WLAN and WiMax notebook computer, access point and mobile wireless applications DBS 1 to 13 GHz receivers VSAT and SATCOM 13 to 18 GHz systems & 82.2 BWA systems WLL and MMDS Transceivers General purpose discrete E-pHEMT for other ultra low noise applications 1. The Avago enhancement mode phemt devices do not require a negative gate bias voltage as they are normally off. They can help simplify the design and reduce the cost of receivers and transmitters in many applications from 5 MHz to 18 GHz gate source drain b = Device Code YY = Year Code Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 2 V (class A) ESD Human Body Model = 1 V (Class ) Refer to Avago Application Note A4R: Electrostatic Discharge, Damage and Control.

2 VMMK-1218 Absolute Maximum Ratings Sym Parameters/Condition Unit Max Vds Drain-Source Voltage [2] V 5 Vgs Gate-Source Voltage [2] V -5 to 1 Vgd Gate-Drain Voltage [2] V -5 to 1 Ids Drain Current [2] ma 1 Igs Gate Current ma 1.6 Pdn Total Power Dissipation [3] mw 3 Pin RF CW Input Power Max dbm 1 Tch Max channel temperature C +15 θjc Thermal Resistance [4] C/W 2 lds (ma) V DS (V) Figure 1. Typical I-V Curves. (VGS=.1 V per step).7 V.6 V.5 V.4 V.3 V Operation in excess of any of these conditions may results in permanent damage to this device. 2. Assumes DC quiescent conditions 3. Ambient operational temperature T A =25 C unless noted. 4. Thermal resistance measured using 15 C Liquid Crystal Measurement Method 5. The device can handle + 1dBm RF input power provided lgs is limited to 1ma VMMK-1218 RF Specifications (on board) [6,7] T A = 25 C, Freq = 1 GHz, Vds = 3V, Ids = 2mA, Zo = 5 Ω (unless otherwise specified) Sym Parameters/Condition Units Min Typ. Max Vgs Gate Voltage V Igs Gate Current ua.4 Gm Transconductance ms 2 Ga Associated Gain db NF Noise Figure db Fmin Noise Figure min db.71 P-1dB 1dB Compressed Output Power dbm +12 OIP3 Output 3 rd Order Intercept Point dbm Specifications are derived from measurements in a test circuit. 7. All tested parameters guaranteed with measurement accuracy ±.5dB for gain. 2

3 Product Consistency Distribution Charts [1] Figure 2. Gate Vds = 3V & Ids = 2mA, LSL=.48, Nominal=.58, USL=.68, CPK=2.2 Figure 3. 1 GHz, LSL=6.7, Nominal=9., USL=1.2, CPK=1.1 Figure 4. 1 GHz, Nominal=.81, USL=1.5, CPK=1.8 Note: 1. Distribution data based at least 5 part sample size from two wafers during initial characterization of this product. Future wafers allocated to this product may have nominal values anywhere between upper and lower limits. VMMK-1218 Typical Performance Curve S21 (db) FREQUENCY (GHz) OIP3 (dbm) V 2V 3V 4V Ids (ma) Figure 5. S21 vs. Frequency at 2V, 2mA Figure 6. OIP3 vs. Ids at 1 GHz (Zi = Zo = 5Ω) Fmin (db) P1dB (dbm) 8 1.5V 2V 4 3V 4V FREQUENCY (GHz) Ids (ma) Figure 7. Fmin vs. Frequency at 2V, 2mA Figure 8. P1dB vs. Ids at 1 GHz (Zi = Zo = 5Ω) 3

4 VMMK-1218 Typical Performance Curve S21 (db) 8 1.5V 4 2V 3V 4V Ids (ma) OIP3 (dbm) C 25C 85C Id (ma) Figure 9. Gain vs. Ids at 1 GHz Figure 1. OIP3 vs. Ids at 2V over temperature at 1 GHz 3 25 OIP3 (dbm) C 25C 85C Id (ma) Figure 11. OIP3 vs. Ids at 3V over temperature at 1 GHz 4

5 VMMK-1218 Typical Scattering Parameters and Noise Parameters, T A =25 C, Vds=2V, Ids=2mA [1] Freq S11 S21 S12 S22 MSG/MAG GHz Mag. Ang. db Mag. Ang. Mag. Ang. Mag. Ang. db Typical Noise Parameters Freq Fmin Г opt Г opt Rn/5 Ga GHz db Mag. Ang. db Note: 1. S-parameters are measured in 5 Ohm test environment. MSG/MAG and S21 (db) FREQUENCY GHz Figure 12. MSG/MAG and S21 vs. Frequency at 2V 2 ma MSG/MAG S21 5

6 VMMK-1218 Typical Scattering Parameters and Noise Parameters, T A =25 C, Vds=1.5V, Ids=2mA [1] Freq S11 S21 S12 S22 MSG/MAG GHz Mag. Ang. db Mag. Ang. Mag. Ang. Mag. Ang. db Typical Noise Parameters Freq Fmin Г opt Г opt Rn/5 Ga GHz db Mag. Ang. db Note: 1. S-parameters are measured in 5 Ohm test environment. MSG/MAG and S21 (db) FREQUENCY GHz Figure 13. MSG/MAG and S21 vs. Frequency at 1.5V 2 ma MSG/MAG S21 6

7 VMMK-1218 Typical Scattering Parameters and Noise Parameters, T A =25 C, Vds=3V, Ids=2mA [1] Freq S11 S21 S12 S22 MSG/MAG GHz Mag. Ang. db Mag. Ang. Mag. Ang. Mag. Ang. db Typical Noise Parameters Freq Fmin Г opt Г opt Rn/5 Ga GHz db Mag. Ang. db Note: 1. S-parameters are measured in 5 Ohm test environment. MSG/MAG and S21 (db) FREQUENCY GHz Figure 14. MSG/MAG and S21 vs. Frequency at 3V 2 ma MSG/MAG S21 7

8 Small Signal Model Parameters Parameter Value Parameter Value Parameter Value Parameter Value Vd (V) 1.5 Vd (V) 1.5 Vd (V) 1.5 Vd (V) 1.5 Id (ma) 5 Id (ma) 1 Id (ma) 15 Id (ma) 2 Gm.1162 Gm.219 Gm.2374 Gm.3249 tau.188 tau.2388 tau.272 tau.271 Cgs.5131 Cgs.6732 Cgs.877 Cgs.929 Rgs.2126 Rgs.2638 Rgs.269 Rgs.34 Cgd.6932 Cgd.6226 Cgd.777 Cgd.7133 Cds.1587 Cds.1574 Cds.166 Cds.1597 Rds Rds Rds Rds Parameter Value Parameter Value Parameter Value Parameter Value Vd (V) 2 Vd (V) 2 Vd (V) 2 Vd (V) 2 Id (ma) 5 Id (ma) 1 Id (ma) 15 Id (ma) 2 Gm.1159 Gm.1992 Gm.1992 Gm.3199 tau.2146 tau.2394 tau.2394 tau.257 Cgs.5661 Cgs.7445 Cgs.7445 Cgs Rgs.2293 Rgs.1936 Rgs.1936 Rgs.1756 Cgd.7976 Cgd.726 Cgd.726 Cgd.66 Cds.1631 Cds.1678 Cds.1678 Cds.167 Rds Rds 222. Rds 222. Rds Parameter Value Parameter Value Parameter Value Parameter Value Vd (V) 3 Vd (V) 3 Vd (V) 3 Vd (V) 3 Id (ma) 5 Id (ma) 1 Id (ma) 15 Id (ma) 2 Gm.1112 Gm.193 Gm.258 Gm.3119 tau.249 tau.25 tau.252 tau.2487 Cgs.6365 Cgs.8786 Cgs Cgs 1.26 Rgs.7447 Rgs.1353 Rgs.1 Rgs.271 Cgd.6521 Cgd.582 Cgd.53 Cgd.4772 Cds.163 Cds.1595 Cds.161 Cds.1595 Rds Rds 26.6 Rds 29.1 Rds Parameter Value Parameter Value Parameter Value Parameter Value Vd (V) 4 Vd (V) 4 Vd (V) 4 Vd (V) 4 Id (ma) 5 Id (ma) 1 Id (ma) 15 Id (ma) 2 Gm.188 Gm.199 Gm.259 Gm.353 tau.264 tau.2635 tau.2613 tau.261 Cgs.6765 Cgs.9774 Cgs 1.23 Cgs Rgs.818 Rgs.1478 Rgs.1263 Rgs.2727 Cgd.5762 Cgd.565 Cgd.463 Cgd.4153 Cds.1565 Cds.1573 Cds.1574 Cds.1579 Rds Rds Rds Rds 2.3 8

9 S Parameter Measurements The S-parameters are measured on a.16 inch thick RO43 printed circuit test board, using G-S-G (ground signal ground) probes. Coplanar waveguide is used to provide a smooth transition from the probes to the device under test. The presence of the ground plane on top of the test board results in excellent grounding at the device under test. A combination of SOLT (Short - Open - Load - Thru) and TRL (Thru - Reflect - Line) calibration techniques are used to correct for the effects of the test board, resulting in accurate device S-parameters. The reference plane for the S Parameters is at the edge of the package. VMMK-1218 ADS Model CAP ID=C6 C=Cpgd pf PORT P=1 Z=5 Ohm IND ID=L1 L=Lg nh RES ID=R3 R=Rg Ohm CAP ID=C4 C=Cgd pf 1 3 RES ID=R2 R=Rd Ohm IND ID=L2 L=Ld nh PORT P=2 Z=5 Ohm CAP ID=C3 C=Cpgs pf CAP ID=C1 C=Cgs pf RES ID=R1 R=Rgs Ohm 2 4 VCCS ID=U1 M=Gm S A= Deg R1=1e1 Ohm R2=Rds Ohm F= GHz T=tau ns CAP ID=C2 C=Cds pf CAP ID=C5 C=Cpds pf RES ID=R4 R=Rs Ohm IND ID=L3 L=Ls nh Rg Value Rg PORT P=3 Z=5 Ohm Rd RsG C pgs.475 C pds.318 C pgd.417 Ls.559 Lg Ld.262 9

10 Outline Drawing Top and Side View.5 mm Bottom View.2 mm.5 mm 1. indicates pin 1 2. Dimensions are in millimeters 3. Pad Material is minimum 5. um thick Au Suggested PCB Material and Land Pattern.1 (.4).5 (.2) Part of Input Circuit.3 mm.7 mm.8 mm BYY 1. mm.25 mm 1.2 (.48).2 (.8).2 (.8).4 (.16).1 (.4).5 (.2) Part of Output Circuit.7 (.28) Recommended SMT Attachment The VMMK Packaged Devices are compatible with high volume surface mount PCB assembly processes. Manual Assembly for Prototypes 1. Follow ESD precautions while handling packages. 2. Handling should be along the edges with tweezers or from topside if using a vacuum collet. 3. Recommended attachment is solder paste. Please see Figure 8 for recommended solder reflow profile. Conductive epoxy is not recommended. Hand soldering is not recommended. 4. Apply solder paste using either a stencil printer or dot placement. The volume of solder paste will be dependent on PCB and component layout and should be controlled to ensure consistent mechanical and electrical performance. Excessive solder will degrade RF performance. 5. Follow solder paste and vendor s recommendations when developing a solder reflow profile. A standard profile will have a steady ramp up from room temperature to the pre-heat temp to avoid damage due to thermal shock. 6. Packages have been qualified to withstand a peak temperature of 26ºC for 2 to 4 sec. Verify that the profile will not expose device beyond these limits. 7. Clean off flux per vendor s recommendations. 8. Clean the module with Acetone. Rinse with alcohol. Allow the module to dry before testing. TEMPERATURE - C Ramp 1 Preheat Ramp 2 Reflow Peak = 25 ± 5 C Melting point = 218 C Cooling SECONDS.76 max (.3) 2pl - see discussion.381 (.15) 2pl 1..1 Rogers RO dia PTH (.1) 4pl Solder Mask.4 dia (.16) 4pl Figure 15. Suggested Lead-Free Reflow Profile for SnAgCu Solder Paste Part Number Ordering Information Part Number No. of Devices Container VMMK-1218-BLKG 1 antistatic bag VMMK-1218-TR1G 5 7 Reel 1

11 Package Dimension Outline D E Symbol Min (mm) Max (mm) D E A A All dimensions are in mm Device Orientation REEL USER FEED DIRECTION 4 mm BYY BYY BYY BYY 8 mm USER FEED DIRECTION CARRIER TAPE TOP VIEW B = Device Code YY = Month Code END VIEW 11

12 Tape Dimensions Bo Note: 2 P2 Do Note: 1 Po B 5º <Max> Bo E F Note: 2 W A A Ao P1 D1 B Scale 5:1 B-B Section RO.1 5º <Max> Ko Scale 5:1 A-A Section Ao =.73±.5 mm Bc = 1.26±.5 mm +.5 Ko =.35 + mm 1. 1 sprocket hole pitch cumulative tolerance is ±.1 mm 2. Pocket position relative to sprocket hole measured as true position of pocket not pocket hole 3. Ao & Bo measured on a place.3mm above the bottom of the pocket to top surface of the carrier 4. Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier 5. Carrier camber shall be not than 1mm per 1mm through a length of 25mm Symbol Parameter and Test Condition K1 - Po 4. ±.1 P1 4. ±.1 P2 2. ±.5 Do 1.55 ±.5 D1.5±.5 E 1.75 ±.1 F 3.5 ±.5 1Po 4. ±.1 W 8. ±.2 T.2 ±.2 Unit: mm For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright Avago Technologies. All rights reserved. AV2-181EN - February 2, 212