SP3T SWITCH GaAs MMIC

Transcription

1 SP3T SWITCH GaAs MMIC NJG188K94 GENERAL DESCRIPTION PACKAGE OUTLINE The NJG188K94 is a low power SP3T switch controlled by two bits signals. The low loss performance and high Isolation makes the switch MMIC ideal choice for receiving application. The NJG188K94 SP3T switch is provided in a ultra small 9-pin QFN9-94 package with integrated DC blocking capacitor at PC port. NJG188K94 APPLICATIONS LTE,3G and 2G Multi-mode applications Pre PA switching, reception bands and LTE diversity antenna switching applications General purpose switching applications FEATURES Low voltage logic control =1.35 to 4.5 Low insertion loss.35db P IN =dbm.4db P IN =dbm.4db P IN =dbm High isolation 29dB P IN =dbm 26dB P IN =dbm 24dB P IN =dbm P -.2dB 22dBm Ultra small & thin package QFN9-94 (Package size: 1.1 x 1.1 x.425mm typ.) RoHS compliant and Halogen Free, MSL1 PIN CONFIGURATION (TOP IEW) Pin connection A1. CTL1 A2. CTL2 A3. B1. P3 B2. NC(GND) B3. GND C1. P1 C2. PC C3. P2 TRUTH TABLE H =, L = CTL(L) CTL1 CTL2 PATH H L PC-P1 L H PC-P2 H H PC-P3 NOTE: Please note that any information on this datasheet will be subject to change. er

2 NJG188K94 ABSOLUTE MAXIMUM RATINGS (T a =+25 C, Z s =Z l =5 ) PARAMETER SYMBOL CONDITIONS RATINGS UNITS RF Input Power P IN = dbm Supply oltage terminal 5. Control oltage CTL CTL1,CTL2 5. Power Dissipation Operating Temperature P D Four-layer FR4 PCB (114.3x76.2mm, without through-hole) Tj=15 C 31 mw T opr -4 to +15 C Storage Temperature T stg 5 to +15 C - 2 -

3 NJG188K94 ELECTRICAL CHARACTERISTICS1 (DC CHARACTERISTICS) (General conditions: T a =+25 C, =2.7, CTL(L) =, =1.8, with application circuit) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS Supply oltage terminal Operating Current I A Control oltage (LOW) CTL(L) CTL1,CTL Control oltage (HIGH) CTL1,CTL Control Current I CTL = A ELECTRICAL CHARACTERISTICS2 (RF CHARACTERISTICS) (General conditions: T a =+25 C, Z s =Z l =5, =2.7, CTL(L) =, =1.8, with application circuit) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS Insertion Loss 1 LOSS1 f=.7ghz, P IN =dbm db Insertion Loss 2 LOSS2 f=1.ghz, P IN =dbm db Insertion Loss 3 LOSS3 f=2.ghz, P IN =dbm db Insertion Loss 4 LOSS4 f=2.7ghz, P IN =dbm db Isolation 1 Isolation 2 Isolation 3 Isolation 4 Input power at.2db Compression Point ISL1 ISL2 ISL3 ISL4 PC-P1, P2, P3 f=.7ghz, P IN =dbm PC-P1, P2, P3 f=1.ghz, P IN =dbm PC-P1, P2, P3 f=2.ghz, P IN =dbm PC-P1, P2, P3 f=2.7ghz, P IN =dbm db db db db P -.2dB f=2.ghz dbm SWR SWR f=2.ghz, On port Switching time T SW 5% CTL to 1/9% RF s - 3 -

4 NJG188K94 TERMINAL INFORMATION No. SYMBOL DESCRIPTION A1 A2 A3 B1 B2 B3 C1 C2 C3 CTL1 CTL2 P3 NC(GND) GND P1 PC P2 Control signal input terminal. This terminal is set to High-Level (+1.35 to +4.5) or Low-Level ( to +.45). Control signal input terminal. This terminal is set to High-Level (+1.35 to +4.5) or Low-Level ( to +.45). Positive voltage supply terminal. The positive voltage (+1.5 to +4.5) has to be supplied. Please connect a bypass capacitor with GND terminal for excellent RF performance. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. No connected terminal. This terminal is not connected with internal circuit. Please connect to the PCB ground plane. Ground terminal. Please connect this terminal with ground plane as close as possible for excellent RF performance. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit. RF input/output port. No DC blocking capacitor is required for this port because of internal capacitor. RF input / output port. External capacitor is required to block the DC bias voltage of internal circuit

5 SWR SWR PC-P3 Insertion Loss (db) Isolation (db) SWR Isolation (db) PC-P2 Insertion Loss (db) Isolation (db) NJG188K94 ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) LOSS, ISL vs Frequency (PC-P1 ON, =2.7, CTL(L) =, =1.8) PC-P1 LOSS PC-P2 ISL PC-P3 ISL Frequency (GHz) LOSS, ISL vs Frequency (PC-P2 ON, =2.7, CTL(L) =, =1.8) PC-P1 ISL PC-P3 ISL PC-P2 LOSS Frequency (GHz) LOSS, ISL vs Frequency (PC-P3 ON, =2.7, CTL(L) =, =1.8) 2. SWR vs Frequency (PC-P1 ON, =2.7, CTL(L) =, =1.8) PC-P3 LOSS P1 Port PC Port PC-P1 ISL PC-P2 ISL Frequency (GHz) Frequency (GHz) 2. SWR vs Frequency (PC-P2 ON, =2.7, CTL(L) =, =1.8) 2. SWR vs Frequency (PC-P3 ON, =2.7, CTL(L) =, =1.8) P2 Port PC Port P3 Port PC Port Frequency (GHz) Frequency (GHz) - 5 -

6 Output Power (dbm) Operating Current I ( A) Output Power (dbm) Operating Current I ( A) Output Power (dbm) Operating Current I ( A) Output Power (dbm) Operating Current I ( A) NJG188K94 ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) Output Power, I vs Input Power Output Power, I vs Input Power 28 (PC-P1 ON, CTL(L) =, =1.8, f=.7ghz) 6 28 (PC-P1 ON, CTL(L) =, =1.8, f=1.ghz) =1.5 =2. =1.8_P OUT =2.7_P OUT =2.7 =3._P OUT =4._P OUT =3.5 =5._P OUT = =1.5 =2. =1.8_P OUT =2.7_P OUT =2.7 =3._P OUT =4._P OUT =3.5 =5._P OUT = Output Power, I vs Input Power (PC-P1 ON, =, =1.8, f=2.ghz) CTL(L) =1.5 =2. =1.8_P OUT =2.7_P OUT =2.7 =3._P OUT =4._P OUT =3.5 =5._P OUT = Output Power, I vs Input Power (PC-P1 ON, =, =1.8, f=2.7ghz) CTL(L) =1.5 =2. =1.8_P OUT =2.7_P OUT =2.7 =3._P OUT =4._P OUT =3.5 =5._P OUT = Loss, ISL vs Input Power (PC-P1 ON, CTL(L) =, =1.8, f=.7ghz). Loss, ISL vs Input Power (PC-P1 ON, CTL(L) =, =1.8, f=1.ghz) =1.5 =2. =1.8_Loss =2.7_Loss =2.7 =3._Loss =3.5 =4._Loss =5._Loss = =1.5 =2. =1.8_Loss =2.7_Loss =2.7 =3._Loss =4._Loss =3.5 =5._Loss =

7 Arb. Unit NJG188K94 ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded). Loss, ISL vs Input Power (PC-P1 ON, CTL(L) =, =1.8, f=2.ghz). Loss, ISL vs Input Power (PC-P1 ON, CTL(L) =, =1.8, f=2.7ghz) =1.8_Loss =1.5 =2.7_Loss =2. =3._Loss =4._Loss =2.7 =5._Loss =3.5 = =1.8_Loss =1.5 =2.7_Loss =3._Loss =2. =4._Loss =2.7 =5._Loss =3.5 = Switching Time (PC-P1/P2 path, =2.7, CTL(L) =, =1.8) CTL1 1.6 s.13μs P1 Port Time (1 s/div) - 7 -

8 PC Port SWR P1 Port SWR NJG188K94 ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) Loss, ISL vs Temperature (PC-P1 ON, =, =1.8, f=.7ghz, P =dbm) CTL(L) IN. Loss, ISL vs Temperature (PC-P1 ON, =, =1.8, f=1.ghz, P =dbm) CTL(L) IN =1.5 =1.8_L =2.7_L =2. =3._L =2.7 =4._L =5._L =3.5 = =1.5 =1.8_L =2. =2.7_L =2.7 =3._L =4._L =3.5 =5._L = Loss, ISL vs Temperature (PC-P1 ON, =, =1.8, f=2.ghz, P =dbm) CTL(L) IN. Loss, ISL vs Temperature (PC-P1 ON, =, =1.8, f=2.7ghz, P =dbm) CTL(L) IN =1.5 =1.8_L =2. =2.7_L =3._L =2.7 =4._L =5._L =3.5 = =1.5 =2. =1.8_L =2.7 =2.7_L =3._L =3.5 =4._L =5._L = SWR vs Temperature (PC-P1 ON, PC Port, =, =1.8, f=2.ghz, P CTL(L) IN =dbm) =1.5 =2. =2.7 =3.5 = SWR vs Temperature (PC-P1 ON, P1 Port, =, =1.8, f=2.ghz, P CTL(L) IN =dbm) =1.5 =2. =2.7 =3.5 =

9 Operating Current ( A) P -.2dB (db) Switching Time ( s) NJG188K94 ELECTRICAL CHARACTERISTICS (With Application circuit, Loss of external circuit are excluded) P -.2dB vs Temperature (PC-P1 ON, CTL(L) =, =1.8, f=2.ghz) Absolute maximum rating: 28dBm Switching Time(rise) vs Temperature (PC-P1/P2 path, P1 port, =, =1.8) CTL(L) 8 =1.5 7 =2. 6 =2.7 =3.5 5 = =1.5 =2. 8 =2.7 4 =3.5 = Operating Current vs Temperature (PC-P1 ON, =, =1.8) CTL(L) 5 45 =1.5 4 =2. = =3.5 3 =

10 NJG188K94 APPLICATION CIRCUIT <Top iew> NOTE: [1] The DC blocking capacitor is not necessary at PC Port because of the integrated DC blocking capacitor. [2] The DC current at RF ports must be equal to zero, which can be achieved with DC blocking capacitors (C1, C2, and C3). *However, in case there is no possibility that DC current flows, the DC blocking capacitors are unnecessary, i.e. the RF signals are fed by SAW filters that block DC current by nature, etc. PARTS LIST Part ID alue Notes C1 to C3 56pF MURATA (GRM15) C4 1pF MURATA (GRM15) - 1 -

11 CTL1 CTL2 NJG188K94 RECOMMENDED PCB DESIGN (TOP IEW) P3 P1 C3 C4 C1 C2 P2 PCB: FR-4, t=.2mm Capacitor Size: 15(1.x.5mm) Strip Line Width:.38mm PCB Size: 25.8mmx25.8mm Through Hole Diameter:.2mm Loss of PCB capacitors and connectors Frequency(GHz) Loss(dB) PC PCB LAYOUT GUIDELINA (QFN9-94) (TOP IEW) PCB A1 A2 A3 B1 B2 B3 C1 C2 C3 PKG Terminal PKG Outline GND ia Hole Diameter =.2mm PRECAUTIONS For good isolation, the GND terminals must be connected to the PCB ground plane of substrate, and the through-holes connecting the backside ground plane should be placed near by the pin connection

12 NJG188K94 RECOMMENDED FOOTPRINT PATTERN (QFN9-94 Package 1.1x1.1mm) <Reference> Package: 1.1mm x 1.1mm Pin pitch:.4mm : Land : Mask (Open area) *Metal mask thickness: 1 m : Resist (Open area)

13 NJG188K94 PACKAGE OUTLINE (QFN9-94) TOP IEW SIDE IEW BOTTOM IEW Unit : mm Board : Copper Terminal Treat : Ni/Pd/Au Molding Material : Epoxy resin Weight : 1.5mg Cautions on using this product This product contains Gallium-Arsenide (GaAs) which is a harmful material. Do NOT eat or put into mouth. Do NOT dispose in fire or break up this product. Do NOT chemically make gas or powder with this product. To waste this product, please obey the relating law of your country. This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle with care to avoid these damages. [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights