HMC639ST89 / 639ST89E

Transcription

1 Typical Applications The HMC39ST9(E) is ideal for: Cellular / PCS / 3G WiMAX, WiBro, & Fixed Wireless CATV & Cable Modem Microwave Radio IF and RF Sections Functional Diagram Electrical Specifications, Vs= 5V, T A = +25 C Features Low Noise Figure: 2.3 db High P1dB Output Power: +22 dbm High Output IP3: +3 dbm Gain: 13 db 5 Ohm I/O s - No External Matching Industry Standard SOT9 Package General Description The HMC39ST9(E) is a GaAs PHEMT, High Linearity, Low Noise, Wideband Gain Block Amplifi er covering.2 to 4. GHz. Packaged in an industry standard SOT9, the amplifi er can be used as either a cascadable 5 Ohm gain stage, a PA Pre-Driver, a Low Noise Amplifi er, or a Gain Block with up to +22 dbm output power. This versatile Gain Block Amplifi er is powered from a single +5V supply and requires no external matching components. The internally mat-ched topology permits this amplifi er to be readily ported between virtually any printed circuit board material, regardless of its dielectric constant, thickness, or composition. Parameter Min Typ. Max Min. Typ. Max. Units Frequency Range GHz Gain 13 db Gain Variation Over Temperature db/ C Input Return Loss db Output Return Loss db Reverse Isolation dbm Output Power for 1 db Compression (P1dB) db Output Third Order Intercept (IP3) dbm Noise Figure db Supply Current (Icq) ma Note: Data taken with broadband bias tee on device output. - 34

2 Broadband Gain & Return Loss Gain vs. Temperature 1 RESPONSE (db) S21 S11 S Input Return Loss vs. Temperature RETURN LOSS (db) Reverse Isolation vs. Temperature -4C GAIN (db) Output Return Loss vs. Temperature RETURN LOSS (db) C Noise Figure vs. Temperature -4C REVERSE ISOLATION (db) C NOISE FIGURE (db) 4 2-4C

3 P1dB vs. Temperature 3 Psat vs. Temperature 3 P1dB (dbm) Power 5 MHz Pout (dbm), GAIN (db), PAE (%) Output IP3 vs. Input Tone Power IP3 (dbm) Pout Gain PAE -4C INPUT POWER (dbm) dbm 5 dbm dbm Psat (dbm) Power 2 MHz Pout (dbm), GAIN (db), PAE (%) Pout Gain PAE -4C INPUT POWER (dbm) Gain, Power, Output IP3 & Supply Current vs. Supply 5 MHz GAIN (db), P1dB (dbm), Psat (dbm), IP3 (dbm) Gain P1dB Psat IP Vs (V) Is Is (ma) - 342

4 Absolute Maximum Ratings Collector Bias Voltage (Vcc) +5.5 Volts RF Input Power (RFIN)(Vcc = +5 Vdc) +15 dbm Channel Temperature 15 C Continuous Pdiss (T = 5 C) (derate 13.3 mw/ C above 5 C). W Thermal Resistance (Channel to lead) 75. C/W Storage Temperature to +15 C Operating Temperature -4 to +5 C ESD Sensitivity (HBM) Class 1A Outline Drawing ELECTROSTATIC SENSITIVE DEVICE OBSERVE HANDLING PRECAUTIONS NOTES: 1. LEADFRAME MATERIAL: COPPER ALLOY 2. DIMENSIONS ARE IN INCHES [MILLIMETERS]. 3. DIMENSION DOES NOT INCLUDE MOLDFLASH OF.15mm PER SIDE. 4. DIMENSION DOES NOT INCLUDE MOLDFLASH OF.25mm PER SIDE. 5. ALL GROUND LEADS MUST BE SOLDERED TO PCB RF GROUND. Package Information Part Number Package Body Material Lead Finish MSL Rating Package Marking [3] [1] H39 HMC39ST9 Low Stress Injection Molded Plastic Sn/Pb Solder MSL1 XXXX [2] H39 HMC39ST9E RoHS-compliant Low Stress Injection Molded Plastic % matte Sn MSL1 XXXX [1] Max peak refl ow temperature of 235 C [2] Max peak refl ow temperature of C [3] 4-Digit lot number XXXX - 343

5 Pin Descriptions Pin Number Function Description Interface Schematic 1 RFIN This pin is DC coupled. An off-chip DC blocking capacitor is required. 3 RFOUT 2, 4 GND Application Circuit RF Output and DC BIAS for the amplifi er. See Application Circuit for off-chip components. These pins and package bottom must be connected to RF/DC ground

6 Evaluation PCB List of Materials for Evaluation PCB [1] Item Description J1 - J2 PCB Mount SMA Connector J3 - J4 DC Pin C1 - C3 pf Capacitor, 42 Pkg. C4 pf Capacitor, 3 Pkg. C5 2.2 μf Capacitor, Tantalum L1 47 nh Inductor, 3 Pkg. U1 HMC39ST9(E) PCB [2] Evaluation PCB [1] Reference this number when ordering complete evaluation PCB [2] Circuit Board Material: FR4 The circuit board used in the fi nal application should use RF circuit design techniques. Signal lines should have 5 ohm impedance while the package ground leads and package bottom should be connected directly to the ground plane similar to that shown. A sufficient number of via holes should be used to connect the top and bottom ground planes. The evaluation board should be mounted to an appropriate heat sink. The evaluation circuit board shown is available from Hittite upon request