Fast Characterization of PBTI and NBTI Induced Frequency Shifts under a Realistic Recovery Bias Using a Ring Oscillator Based Circuit

Transcription

1 Fast Characterization of PBTI and NBTI Induced Frequency Shifts under a Realistic Recovery Bias Using a Ring Oscillator Based Circuit 1,2 Xiaofei Wang, 1 Seung-hwan Song, 1 Ayan Paul and 1 Chris H. Kim 1 University of Minnesota, Minneapolis, MN 2 Now at Intel Corporation xiaofei.wang@intel.com

2 Purpose Separately characterize impact of PBTI and NBTI on frequency under DC and AC Design an on-chip monitor to support realistic recovery condition and precise and fast measurement 2/21

3 Outline NBTI and PBTI Monitoring in HKMG Process and Prior Arts NBTI and PBTI Aging Monitor Design Results from HKMG Test Chip Summary 3/21

4 PBTI and NBTI in HKMG NBTI and PBTI have different magnitude and behavior due to different mechanism and trap location The difference between NBTI and PBTI is highly dependent on the technology NBTI and PBTI need to be characterized separately 4/21

5 Previous Work on PBTI/NBTI Monitoring J. Kim, et al., ICICDT, 2008 J. Kim, et al., VLSI, 2011 For both designs: In stress:v gs =-V DD, V ds =0 In recovery: V gs =0, V ds =0 During operation, most transistor recovery with V ds =V DD Easy to apply stress bias, but hard to turn the transistor off while keeping V ds at V STR 5/21

6 Proposed Ring Oscillator in Stress Mode NBTI Stress Mode PBTI Stress Mode AC Stress ON ON OFF OFF V Str / 0 0 / V Str V Str / V Str -V T V Str / 0 V Str / 0 0 / V T 0 / V Str AC Stress OFF OFF ON ON 0 / V Str : NBTI : PBTI Stress / Recovery V Str : V_Stress Use pass gate and tri-state inverter to isolate stress During NBTI stress mode, NMOS source and gate are shorted Realistic AC stress (i.e. V ds ~V DD ) can be provided 6/21

7 Proposed Ring Oscillator in Meas. Mode Additional inverters and pass gates are all turned off, and the loop is closed to initiate the oscillation The impact of additional load of the auxiliary circuits on main path delay can be calibrated out 7/21

8 Calibration to Plain ROSC Degradation Schematic Measurable Relationship β R h R f R p R x R n C 1 ( Δf f ) Δf PBTI, ( f ) NBTI Δf Δf f = β f C 2 C 3 R p C 1 Δf f R n C L [( ) Δf PBTI + ( f ) NBTI ] 1 [(R (R h +R f )(C 2 +C 3 ) h +R f )(C 1 +C 2 +C 3 ) + (R h +R p +R f +R n )(C 2 +C 3 )+R g C 3 ] Frequency shift (%) C, 1.8V, 200MHz AC stress Δf f Δf Δf = β [( ) f PBTI + ( ) f NBTI ] PBTI NBTI Plain Stress time (s) The delay induced by the additional switches are not dependent on aging, proven by simulation Test results can be calibrated using one point calibration 8/21

9 Comparison on PBTI/NBTI Monitoring ICICDT 2008 VLSI 2011 This work ROSC Stage Diagram (NBTI Stress Mode Shown) V STR GND GND V STR V STR GND V STR V DD -VN V DD GND V DD GND V DD GND V STR GND V STR GND V STR GND Stress Capability DC No AC data DC Unrealistic AC (i.e. V ds =0) DC Realistic AC (i.e. V ds =~V STR ) Meas. Scheme Simple counter Simple counter Beat frequency scheme with phase alignment *Meas. Time for 0.01% Resolution 10,000 ROSC periods 10,000 ROSC periods 100 ROSC periods (<1μs) Neither of the previous designs can provide realistic recovery bias (i.e. V ds =V DD ) Simple counter based scheme results in unwanted recovery 9/21

10 Silicon Odometer Beat Frequency Scheme T. Kim, et al., JSSC, 2008 Beat frequency of two free running ROSCs measured by DFF and edge detector Benefits of beat frequency detection system Achieve ps resolution with μs measurement interrupt Insensitive to common mode noise such as temperature drifts Fully digital, scan based interface, easy to implement 10/21

11 Use Beat Frequency to Detect Aging Stressed ROSC Reference ROSC A B Phase Comp. Beat Frequency Counter f str : 0.99GHz A B f ref : 1.00GHz Phase comparator is used to generate the beat frequency At time zero the stressed ROSC is trimmed to be slightly slower than the reference ROSC 11/21

12 Use Beat Frequency to Detect Aging Stressed ROSC Reference ROSC A B Phase Comp. C PC_OUT (f beat = f ref - f stress ) Beat Frequency Counter Couter: N=100 B C A Phase comparator output: f beat = f ref -f stress The counter counts the number of reference cycle in one period of the beat signal N = [(f str -f ref )/f ref ] 12/21

13 Use Beat Frequency to Detect Aging f Stress (GHz): 0.99 Stressed ROSC Reference ROSC f ref : 1.00GHz A B Phase Comp. C PC_OUT (f beat = f ref - f stress ) Beat Frequency Counter Counter: N= N=50 1% frequency difference before stress N=100 2% frequency difference after stress N=50 Δf or ΔT sensing resolution is 0.01% 13/21

14 HKMG Test Chip Die Photo and Features 14/21

15 DC Stress Results for PBTI and NBTI Both NBTI and PBTI induced frequency shift show power law dependence with stress time Magnitude of PBTI is 5X to 10X larger than that of NBTI Time exponent n is lower than reported value 15/21

16 Impact of Measurement Interruption Time Frequency shift (%) Meas. Time / n 25 C, 1.4V, DC stress 400ns / µs / µs / µs / µs / µs / Longer measurement interrupt Stress time (s) Time exponent n C, 1.4V, DC stress Due to unwanted recovery during measurement 400ns meas. interrupt Measurement time (s) Degradation decreases with longer measurement time Time exponent n increases with longer measurement interruption due to the recovery effect during measurement 16/21

17 Impact of Realistic Recovery Bias STR HfO 2 HfO 2 SiO 2 p-si SiO 2 p-si V ds bias gives stronger recovery rate when the transistor is off compared to zero V ds The de-trapping process is accelerated due to the reduced potential barrier 17/21

18 DC and AC Stress at 25 C and 110 C Frequency shift (%) PBTI NBTI 1.4V, DC stress n=0.12 n=0.09 n=0.14 n=0.22 : 25 C : 110 C PBTI 1.4V, 200MHz AC stress n=0.10 n=0.05 NBTI n=0.14 n= Stress time (s) NBTI is more sensitive to the temperature compared to PBTI The time slope dependence is more significant for AC stress 18/21

19 Long-Term Recovery Results versus Stress Voltage Frequency shift (%) C for 1000s 25 C, 0V PBTI V stress : : 1.8V : 1.4V 0.6 NBTI ln(t) ln(t) ln(t) ln(t) Frequency shift (%) Recovery time (s) Recovery time (s) Both PBTI and NBTI recovery follows a -log(t) dependency The magnitude and the log slope increases with stress voltage before recovery 19/21

20 Temperature Dependence of Recovery Frequency shift (%) PBTI -0.02ln(x) ln(x) V for 1000s 0V : 110 C : C ln(x) ln(x) Recovery time (s) Recovery time (s) Recovery magnitude and time slope show small difference at high temp. versus low temp. Both PBTI and NBTI recovery shows a weak dependence on temperature Frequency shift (%) NBTI 20/21

21 Summary A ring oscillator based circuit separately monitor PBTI and NBTI impact on frequency >0.01% resolution with measurement time down to >400ns Supports realistic recovery bias condition Realistic power law time exponent measured using fast measurements Experimental data confirms that realistic recovery bias (i.e. V ds ~V DD ) indeed accelerates recovery compared to power down situation (i.e. V ds =0V) 21/21