Phase-locked Loop Based on Integrating Scanning Conversion

Transcription

1 Aca Polyechnica Hungarica Vol. 14, No. 8, 217 Phase-locked Loop Based on Inegraing canning Conversion Maksim Dudkin, Aleksandr Neserov, Aleksandr hishkov Deparmen of Elecric Drives, ouh Ural ae Universiy (naional research universiy); prospek Lenina 76, 4548, Chelyabinsk, Russia; Absrac: A new principle for developing a phase-locked loop (PLL) based on inegraing scan conversion is proposed. The PLL is a nonlinear pulse sysem based on he closed srucure of an inegraing scanning converer (IC) operaing in he mode of exernal synchronizaion wih circui volage frequency. The block diagrams, he waveform diagram and frequency synchronizaion condiions for inegraing scanning converer swich by ouer signals bipolar recangle and harmonic, are provided. The recommendaions for choosing he frequency raio of self-oscillaions of he scanning converer and circui volage frequency were esed. I is shown ha he inegraing PLL fully adaps o ampliude insabiliy and circui volage frequency wihin he range of 5% and higher. Unlike he exising PLLs, he proposed sysem is a firs-order adapive filer, whose bandwidh is auomaically uned o he ampliude and frequency of circui volage. This propery of he inegraing PLL allows suppressing higher harmonics in he supply circui wih frequency insabiliy wihin he range of 5% and higher. The sysem s high noise immuniy o commuaion disorions of circui volage is also shown. These resuls show he pracicabiliy of using i in semiconducor converer conrol sysems, which receive power from an independen low-power supply sysem, for example, diesel or wind power generaing plans. The limis of he dynamic parameers of his sysem for gradual change of ampliude and circui volage frequency have been deermined. A hree-phase reverse hyrisor recifier is used as an example of a crossed synchronizaion flow-char. The recommendaions on choosing he parameers of he inegraing PLL and also he resuls of he pracical applicaion of he synchronizing uni as a par of semiconducor converer conrol sysems are provided. Keywords: conrol sysem; inegraor; scanning converer; semiconducor converer; phase-locked loop 1 Inroducion Modern elecric energy sysems performed on a saionary basis (and on an auonomous basis as well) are characerized by a high level of disorion wih parameers which are difficul o predic, and which ofen go beyond disorion 127

2 M. Dudkin e al. Phase-locked Loop Based on Inegraing canning Conversion sandards and which ac as desabilizing facors in he performance of no only he semiconducor inverers, bu he conrol sysem in general [1-3]. This is why developmen of a semiconducor converer (C) conrol sysem ha is capable of full adapaion o changes in circui parameers (ampliude, frequency, higher harmonics, commuaion and impulse disorions) in addiion o high noise immuniy is an imporan issue direced owards improving he performance reliabiliy of he enire elecro-echnical equipmen complexes of indusrial plans. Creaing such a sysem is imporan for applicaion no only o developmen in he C area, bu o working equipmen, in need of overhaul, as well. The mos imporan elemen of any C conrol sysem is he synchronizing unis (U) since he accuracy of he conrol sysem s synchronizaion wih he supply circui depends on is operaion. In he majoriy of cases, he U is ou of he closed conrol loop of he C conrol sysem, and herefore any desabilizing effec of circui volage leads o a deviaion of is oupu characerisics. If he supply power is high (minimum disorion and sable circui parameers), i is usually possible o obain a sable undisored synchronizaion signal wihou any problems. However, in he case of low-power supply, i is quie a challenge o obain an undisored synchronizaion signal since i mus exacly mach he phase of he firs harmonic of circui volage. The firs synchronizing unis were designed in accordance wih he open circui principle and were represened by cascade connecion of he smoohing filer (for example, aperiodic firs-order and relay elemen wih swiching hresholds which have a relaive asymmery level of zero) [4]. The disadvanage of his ype of Us is apparen he defined angle of synchronizaion fundamenally changes as he ampliude is alernaed [5], which affecs he C characerisics in general, and can lead o emergency shudown. The applicaion of band-pass filers [6], which deec he useful componen of he frequency of zero-phase shif circui volage, can be useful when he C operaes in a low-power circui. However, he main disadvanage of hese devices is ha hey generae noncharacerisic harmonics, which cause problems of harmonic insabiliy. Therefore, we had o discard he use of band-pass filers in he C conrol sysems. The developmen of synchronizing circuiry in view of he above-menioned disadvanages conribued o he design of closed synchronizing unis based on he principle of a phase-locked loop [7-9]. The simples PLL sysem consiss of an error deecor based on a muliplier, a low-pass filer (LPF), a proporional-inegral conroller (PI), and a volage conrolled oscillaor (VCO) (Fig. 1a) [7]. In his PLL, he error signal u ERR in phase and frequency is generaed as a resul of muliplying he synchronizing volage X () = sin(ω 1 + θ 1 ) and he feedback signal cos(ω 2 + θ 2 ) and is equal o 128

3 Aca Polyechnica Hungarica Vol. 14, No. 8, 217 u ERR =,5 sin[(ω 1 ω 2 ) + (θ 1 θ 2 )] +,5 sin[(ω 1 + ω 2 ) + (θ 1 + θ 2 )] (1) The seady-sae synchronizing volage X () is equal o he feedback signal. In his case, ω 1 = ω 2 and θ 1 = θ 2, herefore he firs erm in expression (1) equals zero. The second seady-sae erm represens an unconrolled componen wih he frequency 2ω. To deec he error signal of he consan volage u F and o eliminae he unconrolled variable componen, a low-pass filer (LPF) wih a ransfer funcion W(p) = 1 (T F p + 1) is used. The oupu signal of he PIconroller ω Δ and he iniial frequency are used o modulae he frequency and phase of he roaion angle θ, as well as he formaion of sin(ω) and cos(ω) a he oupu of he sinusoidal oscillaor (O). The disadvanage of he convenional PLL is ha i does no provide precise synchronizaion wih he synchronizing signal X () when is frequency varies wihin a wide frequency range, for example, when he frequency deviaes from he seady-sae value wihin he range of 5% and higher. This is explained by he fac ha he LPF cuoff frequency and he PI-conroller parameers have fixed values and are uned o he iniial frequency ω. X () u ERR VCO LPF PI I u F 1 1 T p+1 F O a) u a u b u c PI VCO I O u Q LPF u F b) Figure 1 PLL block diagram: convenional (a); based on he p-q heory (b) The PLL sysem based on he p-q heory (Fig. 1b) eliminaes his disadvanage [8-9]. The sysem funcions on he basis of he well-known propery of he Park- Gorev ransform [1], which convers a hree-phase coordinae sysem abc ino a recangular synchronous dq one. Thus, an error signal u ERR = u Q, corresponding o he difference in frequency and phase beween he supply circui volage and he feedback signals sin(ω) and cos(ω), is generaed a he oupu of he coordinae conversion uni. In oher respecs, he composiion of blocks and he operaion principle of he PLL circui (Fig. 1b) compleely coincide wih hose of he convenional PLL (Fig. 1a). 129

4 M. Dudkin e al. Phase-locked Loop Based on Inegraing canning Conversion The main difference beween he convenional PLL and he PLL based on he p-q heory is ha here is a higher 2 nd harmonic in he error signal u ERR of he convenional PLL and he closed loop mus allow for an LPF under normal operaing condiions. A he same ime, he PLL error signal u Q (Fig. 1b) lacks such componen of alernaing volage, so an LPF is no required. However, if he power bus volage conains higher harmonics, for example, he 3 rd one, hen he error signal u Q will conain he 2 nd volage harmonic. In order o suppress i, an LPF (Fig. 1b) has o be inegraed ino he PLL sysem based on he p-q heory. And if he supply circui frequency is unsable wihin he wide frequency range ( 5% and higher), i will be necessary o reconfigure he LPF and he PI-conroller so ha he PLL can achieve high synchronizing accuracy and sabiliy of is closed loop. The above-menioned problem is solved in he PLL based on inegraing scan conversion [11]. Hereinafer, his sysem will be simply referred o as inegraing PLL. The original conribuion of he aricle is ha i proposes a new principle for developing a PLL on he basis of inegraing scan conversion, which differs from he exising PLL srucures by he abiliy o suppress higher harmonics in he power supply circui wih frequency insabiliy being wihin he range of 5% and above. Numerous sudies conduced by he auhors showed ha applying he mehods of inegraing scanning conversion for designing boh synchronizing unis and semiconducor inverer conrol sysems on he whole is one of he mos effecive ways of improving heir noise immuniy, he saic and dynamic accuracy [12-16]. The nex secions describe an inegraing phase-locked loop [11], which combines high noise immuniy o circui disorions (higher harmonics and commuaion noches) and an abiliy o adap o he oscillaion of ampliude and power volage frequency in a wide range. 2 aic and Dynamic Characerisics of he Inegraing PLL In he core of he inegraing PLL lies a coninuous srucure of an inegraing scanning converer wih pulse-frequency-widh modulaion (PFWM) [13, 16], which consiss of adders 1 2, an inegraor I and a relay elemen (RE) wih a hyseresis loop (fig. 1a) of zero relaive symmery and which works in ouer synchronizaion wih he supply-line volage mode [13]. A synchronizaion signal X () (a supply-line volage), which has a sine wave form (Fig. 2b) or a recangle of bipolar impulses wih an average value of zero, 13

5 Aca Polyechnica Hungarica Vol. 14, No. 8, 217 needs o be supplied o he inegraing scanning converer (IC) inpu for conversion of IC from he PFWM mode o he forced swich mode, when he pulse-widh modulaion is being implemened. As a resul, he alernaing impulses Y() wih he supply-line volage frequency of (T ) 1 = (T ) 1, which are shifed by he relaively X () signal o he angle of synchronizaion α (Fig. 2b, c), reach a seady sae on he IC oupu. The oupu inegraor signal is proximal by form o he harmonic signal X (). wiching of RE is being execued in achieving a swiching hreshold ±b EL by an evolven of inegraor Y I () (Fig. 2c). а) IC X () Inpu FCB 1 I 1 1 Y I() T p I Y () A 2 RE АМ Y() Oupu PU Y () H NPG Δb Y T() X =b 3 +A b) -A +A Y() c) +b -b -A d) e) α T Y () H Y () A T +b X () α =-9 el.deg Δb Δb +Δb Δb Y () I -Δb Y () T Figure 2 Block diagram of he inegraing PLL (a) and waveform diagrams of is signals (b-e) Condiions for IC synchronizaion by recangle bipolar pulses and harmonic signal are described by he following inequaliies: A T 1 (2) A,5π T 1 (3) In hese inequaliies A = A A is he scaled ampliude of he A synchronizaion signal (degree of synchronizaion); T = T T is he scaled value of he IC self-auo-oscillaion T = 4b T I, when A =, in relaion o T he period of he synchronizaion signal X (); b = b A is he scaled value of he swiching hreshold of he RE; ±A is he ampliude of RE oupu pulses; T I is he IC ime consan. 131

6 M. Dudkin e al. Phase-locked Loop Based on Inegraing canning Conversion Analysis of equaions (2), (3) leads o he following conclusions: while T 1,, he deph of IC synchronizaion by recangle pulses should be chosen considering he A 1, consrain, and A π 2 for he harmonic signal. Oherwise, IC swiches o he self-oscillaion mode wih he frequency f = (1 A 2 )/4b T I ; while T > 1,, he level of A, required for IC synchronizaion by recangle pulses, as well as by harmonic signal, rises seeply. I is explained by he fac ha in order o synchronize he IC of low undamped frequency (T ) 1 by high frequency synchronizaion signal wih he frequency of (T ) 1, A needs o be increased in such a way ha he equaion for second-vol area module ( = A T ) > ( = A T ) is exacly saisfied. Oherwise, he pulse frequency (T ) 1 on he IC oupu is less han he frequency(t ) 1 of X () synchronizaion signal; while T = 1,, he A is approaching zero, which is why choosing he selfoscillaion frequency (T ) 1 of IC equal o he frequency (T ) 1 of synchronizaion influence X () is appropriae. The phase shif, beween he synchronizaion influence X () and inpu impulse Y() (Fig. 2b, c), depends on he scaled value of self-oscillaion period T = T T and he deph of synchronizaion A α = 9el. deg. 1 + T 1. (4) A Equaion (4) shows ha while T = 1,, he IC self-oscillaion frequency (T ) 1 = 1 4b T I equals he signal frequency (T ) 1 of synchronizaion X () and A has any value, he synchronizaion angle always says consan and equals 9 el. deg. This gives he inegraing PLL he properies for adapaion o insabiliy of circui volage ampliude wihin he range of 5 % and higher, which provides he basis of he space of saic sae α = f( A, A ) (Fig. 3a) derived from MaLab+imulink simulaion of he inegraing PLL wih he change in synchronizaion deph wihin he range,25 A 1,. In his equaion α = (α α ) 1 is he scaled error of synchronizaion angle α in relaion o he anerior synchronizaion angle as he ouer disorion is absen, and which possesses a value of -9 el. deg; A = (A A.N ) 1, f = (f f.n ) 1 are he scaled errors of ampliude A and frequency f of supply-line volage X () in relaion o heir scaled values A.N and f.n respecively. As he frequency f and he synchronizaion signal degree A change, he area α = f( f, A ) akes on subsanially non-linear paern (Fig. 3b). Thus, wih he increase of f, he error α increases due o he violaion of he equaliy beween he IC self-oscillaion frequency (T ) 1 and he supply-line volage frequency (T ) 1 and according o (4), he synchronizaion angle α deviaes from he scaled value equal o -9 el.deg. This is one of he disadvanages of he inegraing PLL. 132

7 Aca Polyechnica Hungarica Vol. 14, No. 8, 217 Δα.3 T =1,.2.1 a) ΔA A Δα.3.2 T =1,.1 b) wih FCB wihou FCB Δf A Figure 3 The space of saic sae α = f( A, A ) (a) and α = f( f, A ) (b) of he inegraing PLL for ouer synchronizaion by harmonic signal For eliminaion of he described disadvanage, a frequency correcion block (FCB) is included in he PLL circui (Fig. 2a). I consiss of an ampliude modulaor (AM), an adder 3, a volage supply X = b, a phase-o-volage converer (PVC) and a narrow-pulse generaor NPG, which sars a he rising and railing impulse flanks of he IC oupu. A he scaled circui volage frequency he signal on he PVC oupu Y T () equals he ER swiching hreshold b (Fig. 2d) in absolue value. This is why Y A () equals zero on he AM oupu (Fig. 2e). As he circui volage frequency X () oscillaes from he scaled value (Fig. 1b), he signal Y T () increases o (b + b) level on he PVC oupu (Fig. 2d). An alernaing signal Y A () wih an ampliude b and period ha equals period T of he ER oupu signals, is formed on he AM oupu (Fig. 2 c, e). This changes he ER swiching hreshold b by b, saisfying he equaion T = T = 4b T I (Fig. 2 c). As a resul, in a seady-sae mode, he synchronizaion angle α (beween he supply-line volage X () and he IC oupu pulse) says -9 el.deg. (Fig. 2 b, c). Tha is why he synchronizaion angle error α equals zero. This proves he saic sae area (Fig. 3 b). In hese circumsances, when he frequency 133

8 M. Dudkin e al. Phase-locked Loop Based on Inegraing canning Conversion correcion block is added o he PLL circui, he circui volage frequency range of moion significanly expands from -.9 o 3. (or from 5 o 2 Hz in absolue numbers a he scaled circui volage frequency f.n = 5Hz) as he synchronizaion signal level is,25 A 1,. To deermine he degree of dependence of he IC dynamic characerisics on he parameers of he synchronizing signal X (), we applied MaLab + imulink sofware o make he Bode magniude plo k = f(f ) of he inegraing PLL sysem synchronized by boh recangular and harmonic signals wih differen values of synchronizaion deph (Fig. 4). An alernaing harmonic signal X A () = A A sin(2πf A ) wih a consan ampliude A A = A A A =,1 and frequency f A was applied o he IC inpu ha was also exposed o he synchronizing effec X (). The cenral componen Y of he IC oupu pulses was isolaed using a digial filer ha implemens he algorihm Y = A ( 2 1 )/T. Here, 1, 2, T are he ime inervals and period of he IC oupu pulses (Fig. 2c), and А is is ampliude. In his case, he inpu signal level X A () and he average value Y of he IC oupu pulses ge uniquely conneced only afer he repeiion period T of he pulses Y() ends. Fig. 4 uses he following noaions: k = Y.m /A A is he IC ransmission coefficien; F = f A /f is he scaled frequency of he harmonic signal X A () wih respec o he frequency f of he synchronizing effec X () A =,1; T = 1, A synchronized by recangular signal synchronized by harmonic signal A = 1, A = 6, A = 4, A = 2, Figure 4 Bode magniude plo of he inegraing PLL wih differen values of synchronizaion deph Analysis of he Bode magniude plo (Fig. 4) allows us o conclude [17] ha he inegraing PLL s dynamic properies are close o ones of he firs-order aperiodic link W(p) = 1 (T E p + 1) wih he ime consans equivalen T E,25A T (5) for synchronizaion by recangle pulses and T E (π A T ) 16 (6) for synchronizaion by harmonic signal. However, i needs o be considered ha his linearizaion is valid for only he F = f A /f,5 area of inpu frequency impac, which is derived from he Koelnikov heorem [18]. If he frequency is higher, he scanning converer, being 134

9 Aca Polyechnica Hungarica Vol. 14, No. 8, 217 a pulse sysem, swiches o he slow sampling of dynamic inpu signal mode [13, 19]. he inegraing PLL is an adapive filer whose parameers readjus ino he funcions of he ampliude A and he frequency T 1 of he synchronizaion signal (of circui volage). As a resul, he inegraing PLL synchronizes wih he circui volage wih high accuracy (he synchronizaion angle error α ends o zero) even if here are higher harmonics in he supply volage and frequency insabiliy of he synchronizing signal wihin he range of 5% and higher. This is confirmed by he resuls of he inegraing PLL simulaion when he synchronizing signal X () has he hird lowes-frequency volage harmonic wih he ampliude A (3) = A (3) /A (1) ha is equal o 3% of he main componen ampliude A (1) of he circui volage wih wo frequency values f = 5 Hz (Fig. 5a) and f = 1 Hz (Fig. 5b) of he supply volage. +A (1) X (1) () X () A = 2, -A (1) +A -A a) α Y() Y () I +A (1) X () (1) X () A = 2, -A (1) +A Y() -A b) α Y () I Figure 5 Waveform diagrams of he inegraing PLL wih he hird harmonic in he synchronizing signal and he change in he supply volage frequency: f = 5 Hz (a) and f = 1 Hz (b) Fig. 5 shows ha he 3 rd harmonic is compleely suppressed by he inegraing PLL, and he synchronizaion angle is equal o minus 9 el. deg. I is noeworhy ha, oher hings being equal, a synchronizaion error occurs in he exising PLL sysems (Fig. 1) because of he fixed values of he low-pass filer 135

10 M. Dudkin e al. Phase-locked Loop Based on Inegraing canning Conversion bandpass and he PI-conroller parameers ha are uned o he nominal frequency of he synchronizing volage; represenaion of he inegraing PLL in he form of a firs-order aperiodic filer indicaes is high noise immuniy o commuaion and pulse disorions of circui volage. This is confirmed by he resuls of he inegraing PLL sysem simulaion when here are commuaion noches in circui volage ha reach he level of γ C = 25 el. deg. (Fig. 6a). The noches were creaed by a hree-phase bridge hyrisor recifier of curren when i operaed for a low-power circui. In his case, he synchronizaion angle error was α = (α = 9 el. deg.), since commuaion noches 1 and 2, 3 and 4 muually compensaed each oher in he ime inervals 1 and 2, or areas 1, 1 and 2, 2 in subinervals 1, 1 and 2, 2 equal each oher (Fig. 6b). +A a) -A A = 2, +A b) -A Figure 6 Waveform diagrams of he inegraing PLL a commuaion noches in circui volage (γ C = 25 el. deg.) In a real indusrial environmen he over-volage ampliude and he circui volage frequency dips, generally, appear no insanly, bu afer a cerain ime inerval, which depends on he loading condiions and he ype of load included in he circui. This is he reason why he analysis of he inegraing PLL operaion in he condiions of he smooh change in ampliude (Fig. 7a) and he frequency (Fig. 7b) of he circui volage appears o be of ineres. In Fig. 7 he following noaions have been inroduced: A is he scaled error of an acual circui volage ampliude A in relaion o is raed value A.N ; U = A A.N is he scaled velociy of change in ampliude A in one period T of circui volage in relaion o is raed ampliude A.N ; = (T ) 1 (T.N ) 1 is he absolue velociy of change in he circui volage frequency (T ) 1 in he se ime inerval 3 equal o 1 second. The resuls of he inegraing PLL research have shown ha in he dynamic operaions he allowed velociy of change in ampliude U in one circui volage period and he frequency f makes 11 % and 9 Hz/s in 1 second in he condiions when he maximum synchronizaion angle inclinaion α does no 1sec 136

11 Aca Polyechnica Hungarica Vol. 14, No. 8, 217 ranscend 2 el.deg., and he deph of synchronizaion is chosen ou of he range π 2 A 8, (Fig. 8). 1,5 1,,5 A.N T.N -ΔA ΔA =,5 ΔA = -,5 a) -,5-1, -1,5 of increase of decrease 1, A.N = 1s 3 of decrease b) -1, T.N T Figure 7 Tes impac for analysis of he dynamic characerisics of he inegraing PLL a he smooh changes of ampliude (a) and frequency (b) of he circui volage Δα, el.deg U a) Δα, el.deg 4 b) 2, Hz/sec f π/ Figure 8 Graphs of dependencies of he absolue synchronizaion angle error α = f( U) (a) and α = f( f ) (b) for inegraing PLL a differen deph of synchronizaion A The opimal level A is considered o mee he range of π 2 A 4,, when he speed of response and he immuniy o noise are compromised. 137

12 M. Dudkin e al. Phase-locked Loop Based on Inegraing canning Conversion The above resuls sugges he efficiency of using he inegraing PLL in he conrol sysems driven by C and supplied by auonomous low-power supply sysems wih a high-level of disorion (higher harmonics and commuaion noches) and unsable circui volage parameers as well. Occurrence of he phase shif α (equal o -9 el.deg) beween he synchronizaion signal X () and he oupu pulses Y() (Fig. 2b, c) of he inegraing PLL (Fig. 2a) involves an unradiional se-up of he synchronizaion circui of he C conrol sysem (C). One of he se-up opions, for example, is he mehod of C channel cross synchronizaion ha can be applied in a hree-phase hyrisor recifier wih a synchronous mulichannel conrol sysem (Fig. 9a). Here he PLL-A oupu sync-pulse (wih he duraion of 18 el.deg.) ouruns phase A by 9 el.deg. (Fig. 9b). Herein he rising flank of his pulse coincides wih he naural commuaion poin of phase C. As a resul, he synchronizaion of he phase C conrol channel can be done by he PLL-A oupu sync-pulse. The synchronizaion of oher C conrol channels can be done he same way (Fig. 9a). In order o ge he sync-pulses o coincide wih he momenum of phase volages going hrough he zero poin, PLL-A, PLL-B and PLL-C should be synchronized from linear volages AB, BC and CA, which ourun he phase ones А, В, С by 3 el.deg. The inegraing PLL (Fig. 2a) can be used in he conrol sysems for acive volage (curren) recifiers, acive power filers, marix frequency converers and oher C. These engineering soluions are considered in more deail in he paper [2]. А B C PLL-A C-A PLL-B C-B PB a) PLL-C C-C A B C A B C A B C b) α (A) α (C) α (B) U-A U-B U-C Figure 9 Block diagram (a) and he signal waveform diagram (b) of cross synchronizaion sysem of he semiconducor inverer (PLL-A, PLL-B, PLL-C PLL of phase channels A, B, C; C-A, C-B, C-C conrol sysem for phase channels A, B, C; PB power semiconducor block) 138

13 Aca Polyechnica Hungarica Vol. 14, No. 8, 217 Fig. 1 shows he waveform char of he circui volage and he oupu signal of he inegraing PLL sysem, which funcions in he cross-srapping mode (Fig. 9a) in he reverse hyrisor recifier for an elecric drive of a direc curren conrol sysem. The experimen ook place on he diesel-generaor plan of a drilling rig of he VI group. The oal load of he plan was abou 9%. Trouble-free performance of an enire echnological complex was provided, despie he abnormally high-level of he circui volage disorion. This is achieved due o he IC closed srucure and an inegraor in is direc conrol channel. Wih respec o he synchronizing effec, he sysem represens a firs-order aperiodic filer wih an equivalen ime consan, which readjuss depending on he circui volage parameers. upply line volage PLL Oupu Figure 1 Waveform char of he circui volage and he PLL sysem oupu signal in co-operaion of several hyrisor recifiers for a low-power supply sysem The PLL diagram, showed in Fig. 2a, was also esed on 84 AC hyrisor regulaors for he sof sar of asynchronous elecric drives [21] a he JC Chelyabinsk Tube-Rolling Plan, and showed high noise immuniy and operaional reliabiliy. Conclusions An analysis of he saic and dynamic characerisics of he inegraing PLL, based on he inegraing scanning conversion has been made. The PLL is a nonlinear impulse sysem based on he locked srucure of an inegraing scanning converer (C) operaing in he mode of exernal synchronizaion wih circui volage frequency. I has been deermined ha for he C he frequency of self-oscillaion should be chosen equal o he scaled synchronizaion signal frequency. I excludes he drop ou of ouer synchronizaion mode of he device in he face of significan circui volage failures. A he frequency deviaion of he supply volage he equaion lised above is saisfied due o he inclusion of he frequency correcion block in he PLL sysem. I has been shown ha he inegraing PLL sysem fully adaps o he insabiliy of he ampliude and frequency of he circui volage wihin he range 5% and 139

14 M. Dudkin e al. Phase-locked Loop Based on Inegraing canning Conversion higher. Unlike he exising PLL sysems, he proposed sysem is a firs-order aperiodic filer W(p) = 1 (T E p + 1) wih he equivalen ime consan T E (π A T ) 16 and T E,25A T for he harmonic synchronizaion signal and he recangular one) ha auomaically adjuss depending on he ampliude and frequency of he circui volage. This propery of he inegraing PLL sysem allows suppressing higher harmonics in he power supply sysem, while frequency insabiliy is wihin 5% and higher. Moreover, he proposed PLL sysem has high noise immuniy o commuaion disorions of he circui volage. This is achieved due o he closed C srucure and he presence of an inegraor in is direc conrol channel. Basing on he sudies, we have formulaed he recommendaions on he choice of he inegraing PLL sysem parameers. The opimal level of synchronizaion deph A is he range π 2 A 4, where speed and noise immuniy are compromised. In dynamic operaing modes, he permissible change rae of he ampliude in one circui volage period is 11%, and ha of he frequency per one second is 9 Hz/s, provided ha he maximum deviaion synchronizaion angle does no exceed 2 el. deg, and he synchronizaion deph is seleced according o he condiion π 2 A 8,. We have proposed a cross mehod for synchronizing he channels of C conrol sysems based on he inegraing PLL. We have provided he resuls of he pracical operaion of he cross-srapping synchronizaion being a par of conrol sysems of he reverse hyrisor recifier for a direc curren elecric drive and hyrisor volage regulaor for sof sar of asynchronous elecric moors, which proved is high noise immuniy and operaion reliabiliy. Thus, we recommend ha he proposed inegraing PLL be used in C conrol sysems ha are supplied by an auonomous low-power supply sysem wih a high-level of disorions (higher harmonics and commuaion noches) and unsable circui volage parameers. Acknowledgemen The work was suppored by Ac 211 Governmen of he Russian Federaion, conrac 2.A References [1] Laszlo Tihanyi: Elecromagneic Compaibiliy in Power Elecronics, Newnes, New York, 1995, 43 p. [2] GOT Elecric energy. Elecromagneic compaibiliy of echnical means. The qualiy norm of elecric energy in general-purpose power supply sysems, 213 [3] Henry W. O: Noise reducion echniques in elecronic sysems, John Wiley & ons, New York, 1988, 872 p. 14

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