Rajeev J. Ram. powersof10.com

Transcription

1 Rajeev J. Ram Director, Communications Technology Roadmap Head, Physical Optics and Electronics Electrical Engineering and Computer Science Massachusetts Institute of Technology powersof10.com Outline A Powers of Ten Look at Network Components Opto-electronic Integration and the Network Processor Overview of Materials Constructing a Technology Roadmap Technology Barriers for Integration

2 Optical Network UUNET

3 WDM Ring Network Architecture

4 Submarine Network Seattle Metro WDM Ring San Francisco Core Boston CO/POP CO/POP CO/POP Metro CO/POP ADM CO/POP ADM Access ADM CO/POP Local Loop ADM Chicago CO/POP CO/POP Metro 1,2,3,4,4,5,5,6,6 2,3,4,5,6,6 3,5,6 1,2,3 1,1,2,3,4,5 1,1,2,2,3,4,4,5,6 Rx Tx Rx Tx Rx Tx Rx Tx Rx:1,2,3,4,4,5,5,6,6 Rx:1,2,2,3,3,4,5,6,6 Rx:1,1,2,3,3,4,5,5,6 Rx:1,1,2,2,3,4,4,5,6 Node A Node B Node C Node D Interconnect table Logical mesh Rx Tx A B C D A B C D OADM Node configuration amplifiers amplifiers 6 transmitter wavelengths required for 4 nodes. Rx Rx Rx Tx Tx Tx

5 Putting It All Together: OADM Node Traffic WDM Pre-amp East Control Channel Power amp West WDM Traffic Gain block EDFA Pump lasers Detectors 980/1550 MUX Isolators Gain equalizers WDM Power amp East DEMUX MUX Rtp RtpR-Tp TpTpTp Tp Pre-amp West Transmit & Receive Transponders Client IP,ATM,SDH/SONET,PDH WDM MUX R-TpV Multiplexers AWG Thermoelectrics Attenuators Transceivers EA modulator +DFB Thermoelectrics Isolators Detectors Laser Driver Receiver Amps

6 Electronics and Photonics Rx/Tx Analog and Mixed Signal IC s and Modules Digital CMOS IC s O P DRIVER MUX... T I CDR FRAMERS AND MAPPERS LAYER 2 NPU SWITCH FABRIC C S TZA AGC DMUX... Optics EOI (PMD) EOI (PHY) Protocol Processors Fabric Network Processors Defined, basic functions, standards Differentiation: hardware Flexible, complex Differentiation: software

7 Electronics and Photonics Rx/Tx Transmitter: 16 input electrical channels at 622Mbps Gbps laser laser control and monitoring single-mode optical fiber pigtail Intel Receiver: photodiode receiver power monitor transimpedance amplifier clock data recovery decision circuit electrical DeMUX 4.0'' L x 3.5'' W x 0.53'' H Cisco OC-192 Linecard: ~10-30M gates ~2Gbits of memory 256 MB of route table memory 256 MB of packet buffer memory for receive and transmit ~ Watts of power dissipation ~2 square feet >$10k cost

8 Semiconductor Laser Package

9 Materials & Components in Transceiver Network control TRANSPONDER TEC controller Laser Driver TRANSMITTER Silicon PIN TEC Laser. 1 Mod ISO l-lock Other Mux Modulator Driver power conditioning EPROM Microcontroller InP/GaAs Demux CDR PIN/APD LIMITING AMPLIFIER PM/CDCM TIA RECEIVER Intel

10 Planar Lightwave Module: Fiber-to-Chip

11 Opto-Electronic Integrated Circuits (OEICS) Communications Technology Roadmap (CTR) Objective: To provide technology development targets for the long-term evolution of planar opto-electronic integration in the optical communications industry. PASSIVE DEVICES AWGs VOAs Dispersion Element Isolator/Circulator ACTIVE DEVICES diode laser SOAs modulators photodetectors TE cooler ELECTRONICS CMOS memory Flip-flops/MUX Transimpedance amps Bias circuitry

12 The SEMATECH Roadmap Improvements in CMOS speed are made largely from progress in lithographic dimensions making devices smaller in order to switch faster Fiber-optic analog IC Evolution OC-48 (1980 s) GaAs MESFET, Si BJT OC-192 (2001) GaAs, SiGe 0.5 µm Si CMOS Si CMOS OC-768 InP 1µm, SiGe? SiGe BiCMOS Mitsubishi 70 nm cobalt silicide gate (f t =114G, f m =135 G, 11 db gain at 40 G)

13 Materials Overview Substrate Size Material Size EP Defect Density Stepper Technology Silicon nm Silicon nm GaAs GaAs GaAs InP x10 3 cm -2 (Freiberger) 3-7x10 3 cm -2 (Sumitomo) Not available (Freiberger 02) 2-5x10 3 cm -2 (AXT) 365 nm 193 nm 157 nm 365 nm Drafting Effect InP nm InP 6 3x10 3 cm nm (AXT VGF 02) Drafting Effect means scaling isn t just number of devices but also tool set, feature size, performance

14 Advanced Lithography for Ultracompact Components 1x4 WDM (silicon nitride Rings) 1 Kimerling, MIT Maki, MIT LL LambdaCrossing (OFC 2002) Thermo-optic switched microring 6 db insertion loss 6 Si process FSR of 80x50GHz Power -- same scale (au) 1 0 Thru-port Port1 Port2 Port3 Port4 Thru Wavelength (nm) 0

15 The Complexity Barrier TRANSPONDER Framer MUX TRANSMITTER PIN Laser. 1 ISO MOD SOA l-lock Laser Driver Modulator Driver Laser: Single E / O device Detector: Single O / E device Modulation Driver: ~100 Transistors Transimpedance Amp+LA: ~ Transistors DEMUX Mux/DeMux: 1,000-10,000 Transistors Framers, and Mappers: 1,000,000 gates Framer CDR LIMITING AMPLIFIER RECEIVER PIN/APD TIA InP HBT 3000 transistors InP HEMT 100 transistors (e-beam lith) SiGe/Si 10,000,000 transistors

16 Microcontroller Modulator Driver PIN Laser. 1 PIN/APD TIA EPROM power conditioning TEC controller Laser Driver Silicon Control InP/GaAs RF/Opto Other opto materials LIMITING AMPLIFIER Demux Mod Lithium niobate InP e-o/e-a/e-refr. CDR PM/CDCM Mux Silicon Signal ISO l-lock YIG thin film waveguides Thin film filters waveguide lockers CDCM PMDCM Fiber Bragg gratings organics / photonic crystals

17 Roadmap Fundamentals "A 'roadmap' is an extended look at the future of a chosen field of inquiry composed from the collective knowledge and imagination of the brightest drivers of change in that field. -- Robert Galvin, former Chairman, Motorola Why Develop a Roadmap? Reduce financial risk Guide allocation of resources Improved alignment of organizational decision making Key Elements of a Technology Roadmap: Identify drivers, barriers, actions and a timeline for development Developed by consensus Not forecasting but creating a vision for the future Not a single snapshot in time Technology Policy Industry

18 CTR Project Overview CTR Industry Workshop at MIT Microphotonics Industry Communications Technology Microphotonics Industry Consortium Conference Apr 2002Roadmap Conference Nov 2002Consortium Conference May 2003 Industry Perspective of Optical Network Evolution Assessment of Current Technologies - DWDM Database of functional performance metrics Fundamental material properties TWG: Opto-Electronic Integration in Silicon TWG: Photonic Integration in III-V TWG: Applications for Organics in OEICs Technology Evolution Industry Interviews Process equipment, components, equipment, carriers, etc.. [21 organizations, >55 interviews] TWG: Hybrid Integration Bottom-Up Analysis: Manufacturing Cost Drivers Process-Based Cost Analysis Model for Integrated Photonic Circuits Roadmapping Methodology Assessment of Current Technologies Optical Access Jan 2002 Sept 2002 Jan 2003 Sept 2003

19 CTR Technology Working Groups (TWGs) TECHNOLOGY WORKING GROUPS TWGs Gather together thought leaders, from both industry and academia, in particular areas of expertise to discuss technology evolution. Development of a Hybrid Platform for Photonic Integration WG Chair: Dominic Goodwill, Nortel Photonic Integration in InP WG Chair: Rajeev Ram, MIT Opto-Electronics Convergence in Silicon WG Chair: Lionel Kimerling, MIT Applications for Organics in Integrated Photonic Circuits WG Chair: Vladimir Bulovic, MIT

20 CTR TWG - A FRAMEWORK FOR DISCUSSION Silicon Summary of drivers, barriers and actions for photonic integration: DRIVERS BARRIERS ACTIONS Mature electronics applications and industry Low power dissipation CMOS Lower operating cost reduce footprint and increase power efficiency Ease of use - interface management for customer Immature processes for photonics Vastly different manufacturing for different circuits (DSP v. DRAM v. Analog) Materials limitations emission of light Lack of accurate simulation tools for anything except digital Resistance to incorporate new functions 3-D Integration of materials Simulation tools for OEICs Maturity of applications optical clock distribution

21 Si Optoelectronics Ge SiO 2 Integrated Mux and VOA mm >90% quantum efficiency Bookham Responsivity (ma/w) V p + Si -V Ge 330 ma/w with 1 µm Ge 550 ma/w with 4 µm Ge 770 ma/w with AR Coating Bias Voltage (V) Kimerling Group, MIT n + Ge

22 CTR TWG - A FRAMEWORK FOR DISCUSSION Summary of drivers, barriers and actions for photonic integration: III-V DRIVERS BARRIERS ACTIONS Lower manufacturing costs reduce packaging costs Lower operating cost reduce footprint and increase power efficiency Ease of use - interface management for customer Sacrificing customization and performance Lower device yields Lack of industry standards Thermal management Lack of simulation tools Breadth of resources under one roof Design for integration Develop standards that include telecom and datacom Simulation tools for OEICs Layer of Abstraction at subsystem level Tools for localized thermal management

23 InP Optoelectronics Opto Speed's receiver IC contains an InGaAs pin photodiode monolithically integrated with an InP HBT-based TIA 6 section DBR Laser Agility

24 CTR TWG - A FRAMEWORK FOR DISCUSSION Organic Summary of drivers, barriers and actions for photonic integration: DRIVERS BARRIERS ACTIONS Lower manufacturing costs no epitaxy, no processes (ie inkjet printing) Large format roll-to-roll manufacturing Unique materials properties - large thermo-optic coefficient, electrooptic coefficient, dielectric constant Industry perception of organics Materials compatibility different organic materials optimized for each function. Material stability index drifts with time Thermal management Improvements to packaging technology plastic packaging Process development planar deposition Improve material stability new materials and processes (i.e. improve cross-linking) Limited electronic functions 100kHz transistors, no n-channel logic Immature process technology Packaging complexity hermetic sealing

25 Polymer Optoelectronics 16x16 Digital Optical Switch Design Elements 480 1x2 Switches 740 S-Bends 227 Crossings 8 Switching Stages 1920 Bond Pads for per Heater Actuation 514 Bond Pads by Serializing 4 Stages Chip Size Old 4x10.4 cm 2 (1/6 wfr) New 4x6 cm 2 (6/6 wfr) 256 Switching States 128 Heaters Actuated for 16 Paths N 2N 4N 8N 8N 4N 2N N 2N(N-1) 1x2 s x2 s Normalized Optical Power [db] x2 "OFF" (Exp.) Three 1x2 "ON" (Sim.) 16x16 (Sim.) 16x16 (Exp.) Applied Electrical Power [W] L. Eldada et al., Telephotonics Performance Characteristics Insertion Loss: 4 db Extinction: -30 db Power Consumption: 4.5 W (35 mw/dos) PDL: 0.1 db

26 OEIC Roadmap for III-V Integration Current Stage 1 Near Term Stage 3 Mid Term Stage 4 Long Term Driver Amp Laser + Mod Laser + SOA + Mod Driver + TxRx TX-RX PIN + TIA SOA + PIN + TIA Multi Wave TxRx Optical MUX Technology Policy Industry

27 Summary Developing high performance, low-cost network elements requires integrating diverse optical and electronic functions A broad industry-wide effort is underway to construct a roadmap for optoelectronic integration Unexpected challenges Customer perceptions about technology Networks differentiated by hardware Technology bias & insufficient standards definitions Diverse manufacturing lines even for same material Analog and digital (DSP) lines in Silicon Photonics and electronics lines in InP