32K x 8 Power Switched and Reprogrammable PROM

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1 1 CY7C271 32K x Power Switched and Reprogrammable PROM Features CMOS for optimum speed/power Windowed for reprogrammability High speed 30 ns (Commercial) 3 ns (Military) Low power 660 mw (commercial) 71 mw (military) Super low standby power Less than 16 mw when deselected EPROM technology 0% programmable Slim 300-mil package (7C271) Direct replacement for bipolar PROMs Capable of withstanding >2001V static discharge Functional Description The CY7C271 and are high-performance 32,76-word by -bit CMOS PROMs. When disabled (CE HIGH), the 7C271/7C274 automatically powers down into a low-power stand-by mode. The CY7C271 is packaged in the 300-mil slim package. The is packaged in the industry standard 600-mil package. Both the CY7C271 and are available in a cerdip package equipped with an erasure window to provide for reprogrammability. When exposed to UV light, the PROM is erased and can be reprogrammed. The memory cells utilize proven EPROM floating gate technology and byte-wide intelligent programming algorithms. The CY7C271 and offer the advantage of lower power, superior performance, and programming yield. The EPROM cell requires only.v for the super voltage, and low current requirements allow for gang programming. The EPROM cells allow each memory location to be tested 0% because each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that after customer programming, the product will meet DC and AC specification limits. Reading the 7C271 is accomplished by placing active LOW signals on CS 1 and CE, and an active HIGH on CS 2. Reading the 7C274 is accomplished by placing active LOW signals on OE and CE. The contents of the memory location addressed by the address lines ( 4 ) will become available on the output lines (O 0 O 7 ). Logic Block Diagram Pin Configurations DIP/Flatpack DIP/Flatpack O 7 A 1 2 V A PP A 2 27 A A A X ADDRESS O A 26 x 24 1 PROGRAMABLE x 1 OF A 24 3 A 24 A ARRAY MULTIPLEXER A 6 7C C A 7 22 O CS OE 21 CS 2 21 A A 20 CE 20 CE A 7 1 O O 7 1 O 7 4 O 0 1 O 6 O 0 1 O 6 A O 1 17 O O 1 17 O O 2 A 16 O 4 O 2 16 O 4 4 O O O 3 Y ADDRESS LCC/PLCC (Opaque Only) LCC/PLCC (Opaque Only) O 2 A7 A A A A A7 A V PP A14 A CE (7C271) CS 1 (7C271) CS 2 (7C274) OE POWER-DOWN O 1 O 0 A O C O 1 O 2 O 3 O 4 O CS 1 CS 2 CE O 7 O 6 A O A 6 7C274 2 A OE 24 A 23 CE 22 O O 6 O 1 O 2 O 3 O 4 O Cypress Semiconductor Corporation 301 North First Street San Jose CA Document #: Rev. *B Revised December 27, 2002

2 Selection Guide 7C C C C C C271- Unit Maximum Access Time ns Maximum Operating Current Com l ma Military ma Standby Current Com l ma Military ma Maximum Ratings [1] (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature... 6 C to +10 C Ambient Temperature with Power Applied... C to + C Supply Voltage to Ground Potential... 0.V to +7.0V DC Voltage Applied to Outputs in High Z State... 0.V to +7.0V DC Input Voltage V to +7.0V DC Program Voltage....0V Static Discharge Voltage... >2001V (per MIL-STD-3, Method 301) Latch-Up Current... >200 ma UV Exposure Wsec/cm 2 Operating Range Range Ambient Temperature Commercial 0 C to +70 C V ±% Military [2] C to + C V ±% 7C271-3, 4, 7C274-30, 3, 4, Parameter Description Test Conditions Min. Max. Unit V OH Output HIGH Voltage = Min., I OH = 2.0 m.4 V V OL Output LOW Voltage = Min., I OL =.0 ma [4] 0.4 V V IH Input HIGH Level Guaranteed Input Logical HIGH Voltage for All 2.0 V Inputs V IL Input LOW Level Guaranteed Input Logical LOW Voltage for All 0. V Inputs I IX Input Current < V IN < + µa I OZ Output Leakage Current < V OUT <, Output Disabled µa I OS Output Short Circuit Current [] = Max., V OUT = 20 0 ma Commercial 0 ma I CC Power Supply Current = Max., V IN = 2.0V, I OUT = 0 ma, CE=V IL Military 0 I SB Standby Supply Current = Max., CE = V IH, Commercial 30 ma I OUT = 0 ma Military 40 V PP Programming Supply Voltage V I PP Programming Supply Current 0 ma V IHP Input HIGH Programming 3.0 V Voltage V ILP Input LOW Programming Voltage 0.4 V Notes: 1. The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. T A is the instant on case temperature. 3. See the last page of this specification for Group A subgroup testing information ma military. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. Document #: Rev. *B Page 2 of

3 Capacitance [6] Parameter Description Test Conditions Max. Unit C IN Input Capacitance T A = 2 C, f = 1 MHz, pf C OUT Output Capacitance =.0V pf AC Test Loads and Waveforms [6] V OUTPUT R1 00Ω 6Ω MIL R2 333Ω 30 pf (403Ω MIL) ILUDING JIG AND SCOPE (a) Normal Load R1 00Ω 6Ω MIL V ALL INPUT PULSES 3.0V 0% 0% % R2 333Ω % pf (403Ω MIL) ns ns ILUDING JIG AND SCOPE OUTPUT (b) HighZ Load Equivalent to: THÉ VENIN EQUIVALENT OUTPUT 200Ω 2.00V COMMERCIAL OUTPUT 20Ω 1.0V MILITARY Switching Characteristics Over the Operating Range [3,6] 7C C C C C C271- Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Unit t AA Address to Output Valid ns t HZCS Chip Select Inactive to High Z (CS 1 and CS 2, 7C271 Only) t ACS Chip Select Active to Output Valid (CS 1 and CS 2, 7C271 Only) t HZOE t OE Output Enable Inactive to High Z (OE, 7C274 Only) Output Enable Active to Output Valid (OE, 7C274 Only) ns ns ns ns t HZCE Chip Enable Inactive to High Z (CE Only) ns t ACE Chip Enable Active to Output Valid (CE Only) ns t PU Chip Enable Active to Power Up ns t PD Chip Enable Inactive to Power Down ns t OH Output Hold from Address Change ns Note: 6. See Introduction to CMOS PROMs for general information on testing. Document #: Rev. *B Page 3 of

4 Switching Waveform SUPPLY CURRENT t PD t PU 0% 0% POWER-DOWN CONTROLLED BY CE 4 ADDRESS CS 2 OE,CE,CS [7] 1 t OH t AA (t HZOE ) (t OE ) t HZCS(E) t ACS(E) O 0 - O 7 PREVIOUS DATA VALID DATA VALID HIGH Z Note: 7. CS 2 and CS 1 are used on the 7C271 only. OE is used on the 7C274 only. Erasure Characteristics Wavelengths of light less than 4000 angstroms begin to erase the CY7C271 and in the windowed package. For this reason, an opaque label should be placed over the window if the PROM is exposed to sunlight or fluorescent lighting for extended periods of time. The recommended dose of ultraviolet light for erasure is a wavelength of 237 angstroms for a minimum dose (UV intensity exposure time) of 2 Wsec/cm 2. For an ultraviolet lamp with a mw/cm 2 power rating, the exposure time would be approximately 3 minutes. The CY7C271 or needs to be within 1 Table 1. CY7C271 Mode Selection inch of the lamp during erasure. Permanent damage may result if the PROM is exposed to high-intensity UV light for an extended period of time. 72 Wsec/cm 2 is the recommended maximum dosage. Programming Modes Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. Pin Function [] Read or Output Disable 4 CE CS 2 CS 1 O 7 O 0 Mode Other 4 VFY PGM V PP D 7 D 0 Read 4 V IL V IH V IL O 7 O 0 Power Down 4 V IH X X High Z Output Disable 4 X V IL X High Z Output Disable 4 X X V IH High Z Program 4 V IHP V ILP V PP D 7 D 0 Program Verify 4 V ILP V IHP /V ILP V PP O 7 O 0 Program Inhibit 4 V IHP V IHP V PP High Z Blank Check 4 V ILP V IHP /V ILP V PP O 7 O 0 Document #: Rev. *B Page 4 of

5 Table 2. Mode Selection Pin Function [] Read or Output Disable 4 OE CE V PP O 7 O 0 Mode Other 4 VFY PGM V PP D 7 D 0 Read 4 V IL V IL Note O 7 O 0 Output Disable 4 V IH X X High Z Power Down 4 X V IH X High Z Program 4 V IHP V ILP V PP D 7 D 0 Program Verify 4 V ILP V IHP /V ILP V PP O 7 O 0 Program Inhibit 4 V IHP V IHP V PP High Z Blank Check 4 V ILP V IHP /V ILP V PP O 7 O 0 Note:. X can be V IL (V ILP ) or V IH (V IHP).. V PP should be tied to ±% in read mode. DIP Top View LCC Top View A A A 7 A D 0 D 1 D C A V PP PGM VFY D 7 D 6 D D 4 D 3 A D 0 A7 A A A A C V PP 24 PGM 23 VFY 22 D 7 21 D D 2 D 1 D 3 D 4 D DIP Top View LCC Top View V PP 2 A 7 A D 0 D 1 D C A A 1 VFY A PGM D 7 D 6 D D 4 D 3 A D 0 A7 A V PP A14 A A 6 2 A 7 7C VFY 24 A 23 PGM 22 D 7 21 D D 2 D 1 D 3 D 4 D Figure 1. Programming Pinouts Document #: Rev. *B Page of

6 Typical DC and AC Characteristics CC NORMALIZED I NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE T A =2 C f= f MAX SUPPLYVOLTAGE (V) NORMALIZED I CC NORMALIZED SUPPLY CURRENT vs. AMBIENTTEMPERATURE AMBIENT TEMPERATURE ( C) NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE T A =2 C SUPPLYVOLTAGE (V) NORMALIZED ACCESS TIME NORMALIZED ACCESS TIME vs. TEMPERATURE AMBIENT TEMPERATURE ( C) OUTPUT SOURCE CURRENT (ma) OUTPUT SOURCE CURRENT vs. VOLTAGE OUTPUT VOLTAGE (V) DELTA t AA (ns) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING =4.V T A =2 C CAPACITAE (pf) OUTPUT SINK CURRENT (ma) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 7 =.0V 0 T A =2 C OUTPUT VOLTAGE (V) 4.0 NORMALIZED I CC NORMALIZED SUPPLY CURRENT vs. CYCLE PERIOD CYCLE PERIOD (ns) C Document #: Rev. *B Page 6 of

7 Ordering Information Speed (ns) Ordering Code Package Name Package Type Operating Range 30-30WC W16 2-Lead (600-Mil) Windowed CerDIP Commercial 3 CY7C271-3WMB W22 2-Lead (300-Mil) Windowed CerDIP Military -3QMB Q 32-Pin Windowed Rectangular Leadless Chip Carrier 4 CY7C271-4QMB Q 32-Pin Windowed Rectangular Leadless Chip Carrier CY7C271-4WMB W22 2-Lead (300-Mil) Windowed CerDIP -4JC J6 32-Lead Plastic Leaded Chip Carrier Commercial -4WMB W16 2-Lead (600-Mil) Windowed CerDIP Military CY7C271-WMB W22 2-Lead (300-Mil) Windowed CerDIP CY7C271-QMB Q 32-Pin Windowed Rectangular Leadless Chip Carrier MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter V OH 1, 2, 3 V OL 1, 2, 3 V IH 1, 2, 3 V IL 1, 2, 3 I IX 1, 2, 3 I OZ 1, 2, 3 I CC 1, 2, 3 I SB 1, 2, 3 Subgroups Switching Characteristics Parameter t AA 7,,,, t ACS [] 7,,,, t OE [] 7,,,, t ACE 7,,,, Note:. 7C271 only (CS 1 and CS 2 ).. 7C274 only. SMD Cross Reference SMD Number Suffix Subgroups Cypress Number ZX CY7C271-QMB XX CY7C271-4WMB ZX CY7C271-4QMB Document #: Rev. *B Page 7 of

8 Package Diagrams 2-Lead (300-Mil) Molded DIP P *B 32-Pin Windowed Rectangular Leadless Chip Carrier Q MIL-STD- C *A Document #: Rev. *B Page of

9 Package Diagrams (continued) 2-Lead (600-Mil) Windowed CerDIP W16 MIL-STD- D- Config. A ** Document #: Rev. *B Page of

10 Package Diagrams (continued) 2-Lead (300-Mil) Windowed CerDIP W22 MIL-STD- D-1 Config. A ** All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: Rev. *B Page of Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

11 Document History Page Document Title: CY7C271 32K x Power Switched and Reprogrammable PROM Document Number: REV. ECN NO. Issue Date Orig. of Change Description of Change ** 364 3//02 DSG Change from Spec number: to A* //02 GBI Updating Ordering Information *B 224 /27/02 RBI Add power up requirements to Operating Conditions information Document #: Rev. *B Page of

32K x 8 Power Switched and Reprogrammable PROM

32K x 8 Power Switched and Reprogrammable PROM 1CY7C271A CY7C271A Features CMOS for optimum speed/power Windowed for reprogrammability High speed 25 ns (Commercial) Low power 275 mw (Commercial) Super low standby power Less than 85 mw when deselected