28C256T. 256K EEPROM (32K x 8-Bit) Memory DESCRIPTION: FEATURES: Logic Diagram 28C256T. RAD-PAK radiation-hardened against natural space radiation

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256K EEPROM (32K x 8-Bit) Logic Diagram FEATURES: RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - > 1 Krad (Si), dependent upon space mission Excellent Single Event

1 256K EEPROM (32K x 8-Bit) Logic Diagram FEATURES: RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - > 1 Krad (Si), dependent upon space mission Excellent Single Event 25C: - SEL TH LET: (Device)> 12MeV cm 2/ mg - SEU TH LET ( Cells): > 9 MeV cm 2/ mg - SEU TH LET (Write mode): > 18 MeV cm 2/ mg - SEU TH LET (Read mode): > 4 MeV cm 2/ mg Package: - 28 pin RAD-PAK flat pack - 28 pin RAD-PAK DIP - JEDEC approved byte wide pinout High Speed: - 12, 15, and 2 maximum access times available High endurance: - 1, erase/write (in Page Mode), 1-year data retention Page Write Mode: - 1 to 64 bytes Low power dissipation: - 15mA active current (cycle = 1 µs) - 2µA standby current (CE = V CC ) DESCRIPTION: Maxwell Technologies high deity 256k-bit EEPROM microcircuit features a greater than 1 krad (Si) total dose tolerance, depending upon space mission. The is capable of in-system electrical byte and page programmability. It has a 64-Byte page programming function to make its erase and write operatio faster. It also features data polling to indicate the completion of erase and programming operatio. Maxwell Technologies' patented RAD-PAK packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 1 krad (Si) radiation dose tolerance. This product is available with screening up to Maxwells Class S Rev 6 1 (858) Fax: (858) Maxwell Technologies

2 TABLE 1. PINOUT DESCRIPTION PIN SYMBOL DESCRIPTION *1-3, 25, 24, A-A14 Address 21, 23, 2, 26, , I/O-I/O7 Input/Output 22 OE Output Enable 2 CE Chip Enable 27 WE Write Enable 28 V CC Power Supply 14 V SS Ground *Refer to diagram on Page 1 for pin relatiohip. TABLE 2. ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN MAX UNITS Supply Voltage (Relative to V SS ) V CC V Input Voltage (Relative to V SS ) V IN V Operating Temperature Range 2 T OPR C Storage Temperature Range T STG C 1. V IN = -3. V for pulse width > Including electrical characteristics and data retention. TABLE 3. DELTA LIMITS PARAMETER VARIATION I CC 1 ±1% I CC 2 ±1% I CC 3A ±1% I CC 3B ±1% Rev Maxwell Technologies

3 TABLE 4. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN MAX UNITS Supply Voltage V CC V Input Voltage V IL V IH V H V CC V CC +.3 V CC +1 V V V Thermal Impedance Flat Package JC.87 C/W Thermal Impedance DIP Package JC.86 C/W Operating Temperature Range T OPR C 1. V IL min= -1.V for pulse width < 5. TABLE 5. CAPACITANCE (T A = 25 C, f = 1 MHz) PARAMETER SYMBOL MIN MAX UNITS Input Capacitance: V IN = V 1 C IN 6 pf Output Capacitance: V OUT = V 1 C OUT 12 pf 1. Guaranteed by design. TABLE 6. DC ELECTRICAL CHARACTERISTICS (V CC =5. V ± 1%, T A = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER CONDITIONS SYMBOL MIN MAX UNITS Input Leakage Current V CC = 5.5 V, V IN = 5.5 V I LI 2 ua Output Leakage Current V CC =5.5 V, V OUT =5.5 V/.4 V I LO 2 ua Standby V CC Current CE = V CC I CC1 2 ua CE = V IH I CC2 1 ma Operating V CC Current I OUT = ma Duty = 1% V CC =5.5V Cycle = 1 us I OUT = ma Duty = 1% V CC = 5.5 V Cycle = 15 I CC3 15 ma 5 Input Low Voltage V IL.8 V Input High Voltage V IH 2.2 V V H V CC -.5 V Output Low Voltage I LO = 2.1 ma V OL.4 V Output High Voltage I OH = -4 ua V OH 2.4 V Rev Maxwell Technologies

4 TABLE 7. AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1 (V CC = 5.V ±1%, T A = -55 TO 125 C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL MIN MAX UNITS Address Access Time CE = OE = V IL, WE = V IH t ACC CE to Output Delay OE = V IL, WE = V IH t CE Output Enable Access Time CE = V IL, WE = V IH t OE Output Hold from Address CE = OE = V IL, WE = V IH Output Disable to High-Z CE = V IL, WE = V IH t OH t DF Test conditio: Input pulse levels - V to 3V; input rise and fall times < 2 ; output load - 1 TTL gate + 1 pf (including scope and jig); reference levels for measuring timing -.8V/1.8V. 2. t DF and t DFR are defined as the time at which the output becomes an open circuit and data is no longer driven. TABLE 8. AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND WRITE OPERATIONS (V CC = 5.V ±1%, T A = -55 TO 125 C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL MIN 1 TYP MAX UNITS Address Setup Time t AS CE to Write Setup Time t CS 2 Chip Enable to Write Setup Time (WE Controlled) t WS Rev Maxwell Technologies

5 TABLE 8. AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND WRITE OPERATIONS (V CC = 5.V ±1%, T A = -55 TO 125 C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL MIN 1 TYP MAX UNITS WE Hold Time t WH 3 WE Pulse Width CE Pulse Width t WP 2 t CW Address Hold Time Data Setup Time t AH t DS Data Hold Time t DH Chip Enable Hold Time t CH Output Enable to Write Setup Time t OES Output Enable Hold Time t OEH Data Latch Time t DL Write Cycle Time t WC ms Rev Maxwell Technologies

6 TABLE 8. AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND WRITE OPERATIONS (V CC = 5.V ±1%, T A = -55 TO 125 C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL MIN 1 TYP MAX UNITS Byte Load Window t BL us Byte Load Cycle t BLC us Write Start Time t DW Use this device in a longer cycle than this value. 2. WE controlled operation. 3. CE controlled operation. 4. Not tested. TABLE 9. MODE SELECTION 1 MODE CE OE WE I/O Write V IL V IL V IH D OUT Standby V 2 H X X HIGH-Z Write V IL V IH V IL D IN Deselect V IL V IH V IH HIGH-Z Write Inhibit X X V IH X V IL X Data\ Polling V IL V IL V IH DATA-OUT (I/O7) Program X X X HIGH-Z 1. X = Does not matter. 2. V H = Vcc Rev Maxwell Technologies

7 FIGURE 1. READ TIMING WAVEFORM FIGURE 2. BYTE WRITE TIMING WAVEFORM (1) (WE CONTROLLED) Rev Maxwell Technologies

8 FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) FIGURE 4. PAGE WRITE TIMING WAVEFORM (1) (WE CONTROLLED) Rev Maxwell Technologies

9 FIGURE 5. PAGE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) FIGURE 6. DATA POLLING TIMING WAVEFORM Rev Maxwell Technologies

10 EEPROM APPLICATION NOTES This application note describes the programming procedures for the EEPROM modules and the details of various techniques to preserve data protection. Automatic Page Write Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write cycle, and allows the undefined data within 64 bytes to be written corresponding to the undefined address (A to A5). Loading the first byte of data, the data load window ope 3 µs for the second byte. In the same manner each additional byte of data can be loaded within 3 µs. When CE and WE are kept high for 15us after data input, EEPROM enters erase and write mode automatically and only the input data are written into the EEPROM. WE CE Pin Operation During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE. Data Polling Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation. Data Protection To protect the data during operation and power on/off, the EEPROM has the internal functio described below. 1. Data Protection agait Noise of Control Pi (CE, OE, WE) during Operation. During readout or standby, noise on the control pi may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 2 or less in programming mode. Be careful not to allow noise of a width of more than 2 on the control pi Rev Maxwell Technologies

11 256K EEPROM (32K x 8-Bit) EEPROM 28 PIN RAD-PAK FLAT PACKAGE SYMBOL DIMENSION MIN NOM MAX A b c D E E1.44 E E e.5 BSC L Q S N 28 F28-3 Note: All dimeio in inches Rev Maxwell Technologies

12 256K EEPROM (32K x 8-Bit) EEPROM 28 PIN RAD-PAK DUAL IN LINE PACKAGE SYMBOL DIMENSION MIN NOM MAX A b b c D E ea.6 BSC ea/2.3 BSC e.1 BSC L Q S S2.5 N 28 Note: All dimeio in inches Rev Maxwell Technologies

13 256K EEPROM (32K x 8-Bit) EEPROM Important Notice: These data sheets are created using the chip manufacturer s published specificatio. Maxwell Technologies verifies functionality by testing key parameters either by 1% testing, sample testing or characterization. The specificatio presented within these data sheets represent the latest and most accurate information available to date. However, these specificatio are subject to change without notice and Maxwell Technologies assumes no respoibility for the use of this information. Maxwell Technologies products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim agait Maxwell Technologies must be made within 9 days from the date of shipment from Maxwell Technologies. Maxwell Technologies liability shall be limited to replacement of defective parts Rev Maxwell Technologies

14 Product Ordering Optio Model Number XX X X -XX Feature Access Time Option Details 12 = = 15 2 = 2 Screening Flow Monolithic S = Maxwell Class S B = Maxwell Class B E = Engineering +25 C) I = Industrial -55 C, +25 C, +125 C) Package D = Dual In-line Package (DIP) F = Flat Pack Radiation Feature RP = RAD-PAK package RT1 = Guaranteed to 1 krad at die level RT2 = Guaranteed to 25 krad at die level RT4 = Guaranteed to 4 krad at die level Base Product Nomenclature 256K EEPROM (32K x 8-Bit) Low Voltage EEPROM Rev Maxwell Technologies

28LV Megabit (128K x 8-Bit) EEPROM. Memory DESCRIPTION: FEATURES: 28LV011A. Logic Diagram

28LV Megabit (128K x 8-Bit) EEPROM. Memory DESCRIPTION: FEATURES: 28LV011A. Logic Diagram 28LV11 1 Megabit (128K x 8-Bit) EEPROM V CC V SS High Voltage Generator I/O I/O7 RDY/Busy RES OE I/O Buffer and Input Latch CE WE RES Control Logic Timing 28LV11A A A6 Y Decoder Y Gating A7 Address Buffer