28LV Megabit (128K x 8-Bit) EEPROM. Memory DESCRIPTION: FEATURES: 28LV011A. Logic Diagram

Size: px
Start display at page:

Download "28LV Megabit (128K x 8-Bit) EEPROM. Memory DESCRIPTION: FEATURES: 28LV011A. Logic Diagram"

Transcription

1 28LV11 1 Megabit (128K x 8-Bit) EEPROM V CC V SS High Voltage Generator I/O I/O7 RDY/Busy RES OE I/O Buffer and Input Latch CE WE RES Control Logic Timing 28LV11A A A6 Y Decoder Y Gating A7 Address Buffer and Latch X Decoder Memory Array A16 Data Latch FEATURES: DESCRIPTION: Logic Diagram Memory 3.3V Low Voltage Operation, 128k x 8-bit EEPROM RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - > 1 krad (Si), depending upon space mission Excellent Single event 25 C - SEL > 12 MeV cm 2 /mg (Device) - SEU > 85 MeV cm 2 /mg(memory Cells) - SEU > 18 MeV cm 2 /mg (Write Mode) - SET > 4 MeV cm 2 /mg (Read Mode) Package: - 32-pin RAD-PAK flat package - JEDEC-approved byte-wide pinout High speed: - 2 and 25 maximum access times available High endurance: - 1, erase/write (in Page Mode), - 1 year data retention Page write mode: - 1 to 128 bytes Low power dissipation - 2 mw/mhz active (typical) - 11 µw standby (maximum) Maxwell Technologies 28LV11 high-deity 1 Megabit (128K x 8-Bit) EEPROM microcircuit features a greater than 1 krad (Si) total dose tolerance, depending upon space mission. The 28LV11 is capable of in-system electrical byte and page programmability. It has a 128-byte page programming function to make its erase and write operatio faster. It also features data polling and a Ready/Busy signal to indicate the completion of erase and programming operatio. In the 28LV11, hardware data protection is provided with the RES, in addition to noise protection on the WE signal and write inhibit on power on and off. Software data protection is implemented using the JEDEC optional standard algorithm. Maxwell Technologies' patented RAD-PAK packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 1 krad (Si) radiation dose tolerance. This product is available with screening up to Maxwell Technologies self-defined Class S Rev 4 1 (858) Fax: (858) Maxwell Technologies

2 1 Megabit (128K x 8-Bit) EEPROM 28LV11 TABLE 1. 28LV11 PINOUT DESCRIPTION PIN SYMBOL DESCRIPTION 12-5, 27, 26, 23, 25, 4, 28, 3, 31, 2 A-A16 Address 24 OE Output Enable 22 CE Chip Enable 29 WE Write Enable 32 V CC Power Supply 16 V SS Ground 1 RDY/BUSY Ready/Busy 3 RES Reset TABLE 2. 28LV11 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN MAX UNITS Supply Voltage (Relative to V SS ) V CC V Input Voltage (Relative to V SS ) V IN V Operating Temperature Range T OPR C Storage Temperature Range T STG C Memory 1. V IN min = -3.V for pulse width < 5. TABLE 3. DELTA LIMITS PARAMETER VARIATION I CC 1 ±1% I CC 2 ±1% I CC 3A ±1% I CC 3B ±1% TABLE 4. 28LV11 RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL MIN MAX UNITS Supply Voltage V CC V Input Voltage V IL V V IH 2.2 V CC +.3 RES_PIN V H V CC -.5 V CC +1 Operating Temperature Range T OPR C 1. V IL min = -1.V for pulse width < Rev Maxwell Technologies

3 1 Megabit (128K x 8-Bit) EEPROM 28LV11 TABLE 5. 28LV11 CAPACITANCE (T A = 25 C, f = 1 MHZ) PARAMETER SYMBOL MIN MAX UNITS Input Capacitance: V IN = V 1 C IN 6 pf Output Capacitance: V OUT = V 1 C OUT 12 pf 1. Guaranteed by design. TABLE 6. 28LV11 DC ELECTRICAL CHARACTERISTICS (V CC =3.35V ± 1%, T A = -55 TO +125 C, UNLESS OTHERWISE SPECIFIED) PARAMETER TEST CONDITION SUBGROUPS SYMBOL MIN MAX UNITS Input Leakage Current V CC = 3.6V, V IN = 3.6V 1, 2, 3 I IL 2 1 µa Output Leakage Current V CC = 3.6V, V OUT = 3.6V/.4V 1, 2, 3 I LO 2 µa Standby V CC Current CE = V CC 1, 2, 3 I CC1 2 µa CE = V IH I CC2 1 ma Operating V CC Current I OUT = ma, Duty = 1%, Cycle = 1, 2, 3 I CC3 6 ma 1µs at V CC = 3.3V I OUT = ma, Duty = 1%, Cycle = 1, 2, at V CC = 3.3V Input Voltage 1, 2, 3 V IL.8 V V IH 2. RES_PIN V H V CC -.5 Output Voltage I OL = 2.1 ma 1, 2, 3 V OL.4 V I OH = -.4 ma V OH 2.4 I OH = -.1mA V OH V CC -.3V Memory 1. I LI on RES = 1 ua max. TABLE 7. 28LV11 AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1 (V CC = 3.3V + 1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN MAX UNITS Address Access Time CE = OE = V IL, WE = V IH -25 t ACC 2 25 Chip Enable Access Time OE = V IL, WE = V IH -25 t CE Rev Maxwell Technologies

4 1 Megabit (128K x 8-Bit) EEPROM 28LV11 TABLE 7. 28LV11 AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1 (V CC = 3.3V + 1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN MAX UNITS Output Enable Access Time CE = V IL, WE = V IH -25 t OE Output Hold to Address Change CE = OE = V IL, WE = V IH -25 t OH Output Disable to High-Z 2 CE = V IL, WE = V IH -15 CE = OE = V IL, WE = V IH -25 t DF t DFR RES to Output Delay 3 CE = OE = V IL, WE = V IH -25 t RR Memory 1. Test conditio: Input pulse levels -.4V to 2.4V; input rise and fall times < 2; output load - 1 TTL gate + 1pF (including scope and jig); reference levels for measuring timing -.8V/1.8V. 2. t DF and t DFR are defined as the time at which the output becomes an open circuit and data is no longer driven. 3. Guaranteed by design. TABLE 8. 28LV11 AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE OPERATIONS (V CC = 3.3V + 1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN 1 MAX UNITS Address Setup Time -25 t AS Chip Enable to Write Setup Time (WE controlled) -25 t CS Rev Maxwell Technologies

5 1 Megabit (128K x 8-Bit) EEPROM 28LV11 TABLE 8. 28LV11 AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE OPERATIONS (V CC = 3.3V + 1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN 1 MAX UNITS Write Pulse Width CE controlled -15 WE controlled -15 t CW t WP Address Hold Time -25 t AH Data Setup Time -25 t DS 1 1 Data Hold Time -15 Chip Enable Hold Time (WE controlled) -25 t DH t CH 1 1 Memory Write Enable to Write Setup Time (CE controlled) -25 t WS Write Enable Hold Time (CE controlled) -15 t WH Output Enable to Write Setup Time -25 t OES Output Enable Hold Time -25 t OEH Write Cycle Time 2-15 t WC ms Data Latch Time -25 t DL 7 75 Byte Load Window -25 t BL 1 1 µs Rev Maxwell Technologies

6 1 Megabit (128K x 8-Bit) EEPROM 28LV11 TABLE 8. 28LV11 AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND BYTE WRITE OPERATIONS (V CC = 3.3V + 1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN 1 MAX UNITS Byte Load Cycle -25 Time to Device Busy -25 Write Start Time 3-15 RES to Write Setup Time -15 V CC to RES Setup Time 4-25 t BLC t DB t DW t RP t RES 1. Use this device in a longer cycle than this value. 2. t WC must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the internal write operation within this value. 3. Next read or write operation can be initiated after t DW if polling techniques or RDY/BUSY are used. 4. Gauranteed by design µs µs µs Memory 1. X = Don t care. TABLE 9. 28LV11 MODE SELECTION 1 PARAMETER CE OE WE I/O RES RDY/BUSY Read V IL V IL V IH D OUT V H High-Z Standby V IH X X High-Z X High-Z Write V IL V IH V IL D IN V H High-Z > V OL Deselect V IL V IH V IH High-Z V H High-Z Write Inhibit X X V IH X X V IL X X Data Polling V IL V IL V IH Data Out (I/O7) V H V OL Program X X X High-Z V IL High-Z Rev Maxwell Technologies

7 1 Megabit (128K x 8-Bit) EEPROM 28LV11 FIGURE 1. READ TIMING WAVEFORM Rev Maxwell Technologies

8 1 Megabit (128K x 8-Bit) EEPROM 28LV11 FIGURE 2. BYTE WRITE TIMING WAVEFORM(1) (WE CONTROLLED) Rev Maxwell Technologies

9 1 Megabit (128K x 8-Bit) EEPROM 28LV11 FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) Rev Maxwell Technologies

10 1 Megabit (128K x 8-Bit) EEPROM 28LV11 FIGURE 4. PAGE WRITE TIMING WAVEFORM(1) (WE CONTROLLED) Rev Maxwell Technologies

11 1 Megabit (128K x 8-Bit) EEPROM 28LV11 FIGURE 5. PAGE WRITE TIMING WAVEFORM(2) (CE CONTROLLED) FIGURE 6. DATA POLLING TIMING WAVEFORM Rev Maxwell Technologies

12 1 Megabit (128K x 8-Bit) EEPROM 28LV11 FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM(1) (IN PROTECTION MODE) FIGURE 8. SOFTWARE DATA PROTECTION TIMING WAVEFORM(2) (IN NON-PROTECTION MODE) EEPROM APPLICATION NOTES This application note describes the programming procedures for the EEPROM modules and with details of various techniques to preserve data protection. Automatic Page Write Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle, and allows the undefined data within 128 bytes to be written corresponding to the undefined address (A to A6). Loading the first byte of data, the data load window ope 3µs for the second byte. In the same manner each additional byte of data can be loaded within 3µs. In case CE and WE are kept high for 1 µs after data input, EEPROM enters erase and write mode automatically and only the input data are written into the EEPROM Rev Maxwell Technologies

13 1 Megabit (128K x 8-Bit) EEPROM 28LV11 WE, CE Pin Operation During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE. Data Polling Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation. RDY/Busy Signal RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal has high impedance except in write cycle and is lowered to V OL after the first write signal. At the-end of a write cycle, the RDY/Busy signal changes state to high impedance. RES Signal When RES is LOW, the EEPROM cannot be read and programmed. Therefore, data can be protected by keeping RES low when V CC is switched. RES should be high during read and programming because it doesn t provide a latch function. Memory Data Protection To protect the data during operation and power on/off, the EEPROM has the internal functio described below. 1. Data Protection agait Noise of Control Pi (CE, OE, WE) during Operation Rev Maxwell Technologies

14 1 Megabit (128K x 8-Bit) EEPROM 28LV11 During readout or standby, noise on the control pi may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 2 or less in programming mode. Be careful not to allow noise of a width of more than 2 on the control pi. 2. Data Protection at V CC on/off When V CC is turned on or off, noise on the control pi generated by external circuits, such as CPUs, may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable state during V CC on/off by using a CPU reset signal to RES pin. Memory RES should be kept at V SS level when V CC is turned on or off. The EEPROM breaks off programming operation when RES become low, programming operation doesn t finish correctly in case that RES falls low during programming operation. RES should be kept high for 1 ms after the last data input. 3. Software Data Protection Rev Maxwell Technologies

15 1 Megabit (128K x 8-Bit) EEPROM 28LV11 The software data protection function is to prevent unintentional programming caused by noise generated by external circuits. In software data protection mode, 3 bytes of data must be input before write data as follows. These bytes can switch the nonprotection mode to the protection mode. Software data protection mode can be canceled by inputting the following 6 bytes. Then, the EEPROM tur to the non-protection mode and can write data normally. However, when the data is input in the canceling cycle, the data cannot be written Rev Maxwell Technologies

16 1 Megabit (128K x 8-Bit) EEPROM 28LV11 32-PIN RAD-PAK FLAT PACKAGE DIMENSION SYMBOL MIN NOM MAX A b c D E E1.426 e.5bsc L Q S N 32 Note: All dimeio in inches Top and Bottom of the package are connected internally to ground Rev Maxwell Technologies

17 1 Megabit (128K x 8-Bit) EEPROM 28LV11 28LV11 32-Pin Rad-Tolerant Flat Package DIMENSION SYMBOL MIN NOM MAX A b c D E E1.426 e.5bsc L Q S N 32 Note: All dimeio in inches Top and Bottom of the package are connected internally to ground Rev Maxwell Technologies

18 1 Megabit (128K x 8-Bit) EEPROM 28LV11 Important Notice: These data sheets are created using the chip manufacturers published specificatio. Maxwell Technologies verifies functionality by testing key parameters either by 1% testing, sample testing or characterization. The specificatio presented within these data sheets represent the latest and most accurate information available to date. However, these specificatio are subject to change without notice and Maxwell Technologies assumes no respoibility for the use of this information. Maxwell Technologies products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim agait Maxwell Technologies must be made within 9 days from the date of shipment from Maxwell Technologies. Maxwell Technologies liability shall be limited to replacement of defective parts Rev Maxwell Technologies

19 1 Megabit (128K x 8-Bit) EEPROM 28LV11 Product Ordering Optio 1 Model Number Feature Option Details 28LV11 XX F X -XX Access Time 2 = 2 25 = 25 Screening Flow Monolithic 1 S = Maxwell Class S B = Maxwell Class B I = Industrial -55 C, +25 C, +125 C) E = Engineering +25 C) Package F = Flat Pack Memory Radiation Feature 2 RP = RAD-PAK package RT = No Radiation Guarantee, Class E and I RT1 = 1 Krad (Read and Write) RT2R = 25 Krad (Read); 15 Krad (Write) RT4R = 4 Krad (Read); 15 Krad (Write) RT6R = 6 Krad (Read); 15 Krad (Write) Base Product Nomenclature 1 Megabit (128k x 8-bit) EEPROM 1) Products are manufactured and screened to Maxwell Technologies self-defined Class B and Class S. 2) The device will meet the specified read mode TID level, at the die level, if it is not written to during irradiation. Writing to the device during irradiation will reduce the device s TID tolerance - the specified write mode TID level. Writing to the device before irradiation does not alter the device s read mode TID level Rev Maxwell Technologies

28C010T. 1 Megabit (128K x 8-Bit) EEPROM. Memory FEATURES: DESCRIPTION: Logic Diagram

28C010T. 1 Megabit (128K x 8-Bit) EEPROM. Memory FEATURES: DESCRIPTION: Logic Diagram 28C1T 1 Megabit (128K x 8-Bit) EEPROM FEATURES: 128k x 8-bit EEPROM RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - > 1 krad (Si), depending upon space mission Excellent

More information

28C256T. 256K EEPROM (32K x 8-Bit) Memory DESCRIPTION: FEATURES: Logic Diagram 28C256T. RAD-PAK radiation-hardened against natural space radiation

28C256T. 256K EEPROM (32K x 8-Bit) Memory DESCRIPTION: FEATURES: Logic Diagram 28C256T. RAD-PAK radiation-hardened against natural space radiation 256K EEPROM (32K x 8-Bit) Logic Diagram FEATURES: RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - > 1 Krad (Si), dependent upon space mission Excellent Single Event Effects

More information

EEPROM AS58LC K x 8 EEPROM Radiation Tolerant. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS MIL-PRF-38535

EEPROM AS58LC K x 8 EEPROM Radiation Tolerant. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS MIL-PRF-38535 128K x 8 EEPROM Radiation Tolerant AVAILABLE AS MILITARY SPECIFICATIONS MIL-PRF-38535 FEATURES High speed: 250ns and 300ns Data Retention: 10 Years Low power dissipation, active current (20mW/MHz (TYP)),

More information

EEPROM AS8ER128K32 FUNCTIONAL BLOCK DIAGRAM. 128K x 32 Radiation Tolerant EEPROM. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS

EEPROM AS8ER128K32 FUNCTIONAL BLOCK DIAGRAM. 128K x 32 Radiation Tolerant EEPROM. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS 128K x 32 Radiation Tolerant EEPROM AVAILABLE AS MILITARY SPECIFICATIONS MIL-PRF-38534 FEATURES Access time of 150ns, 200ns, 250ns Operation with single 5V + 10% supply Power Dissipation: Active: 1.43

More information

89LV Megabit (512K x 32-Bit) Low Voltage MCM SRAM 89LV1632 FEATURES: DESCRIPTION: Logic Diagram. 16 Megabit (512k x 32-bit) SRAM MCM

89LV Megabit (512K x 32-Bit) Low Voltage MCM SRAM 89LV1632 FEATURES: DESCRIPTION: Logic Diagram. 16 Megabit (512k x 32-bit) SRAM MCM 89LV1632 16 Megabit (512K x 32Bit) Low Voltage MCM SRAM 16 Megabit (512k x 32bit) SRAM MCM CS 14 Address OE, WE 89LV1632 Power 4Mb SRAM 4Mb SRAM 4Mb SRAM 4Mb SRAM Ground MCM FEATURES: I/O 7 I/O 815 I/O

More information

A13 A12 A11 A10 ROW DECODER DQ0 INPUT DATA CONTROL WE OE DESCRIPTION: DDC s 32C408B high-speed 4 Megabit SRAM

A13 A12 A11 A10 ROW DECODER DQ0 INPUT DATA CONTROL WE OE DESCRIPTION: DDC s 32C408B high-speed 4 Megabit SRAM 32C48B 4 Megabit (12K x 8-Bit) SRAM A13 A A1 A2 A3 A4 CS 1 36 NC A18 A17 A16 A1 OE A12 A11 A1 A9 A8 A7 A6 A A4 ROW DECODER MEMORY MATRIX 124 ROWS x 496 COLUMNS I/O1 I/O8 I/O2 Vcc Vss I/O3 32C48B I/O7 Vss

More information

54BCT245. Octal Buffers Transceiver FEATURES: DESCRIPTION: Logic Diagram

54BCT245. Octal Buffers Transceiver FEATURES: DESCRIPTION: Logic Diagram Logic Diagram FEATURES: 3-state outputs drive bus lines or buffer memory address registers RAD-PAK radiation-hardened against natural space radiation Total dose hardness: - > 100 krad (Si), depending upon

More information

7545B. 12-Bit Buffered Multiplying Digital to Analog Converter FEATURES: DESCRIPTION: 7545B BLOCK DIAGRAM

7545B. 12-Bit Buffered Multiplying Digital to Analog Converter FEATURES: DESCRIPTION: 7545B BLOCK DIAGRAM 12-Bit Buffered Multiplying FEATURES: BLOCK DIAGRAM DESCRIPTION: RAD-PAK patented shielding against natural space radiation Total dose hardness: - > 50 krad (Si), depending upon space mission Excellent

More information

54BCT244. Octal Buffers/Drivers. Memory DESCRIPTION: FEATURES: Logic Diagram

54BCT244. Octal Buffers/Drivers. Memory DESCRIPTION: FEATURES: Logic Diagram Logic Diagram FEATURES: 3-state outputs drive bus lines or buffer memory address registers RAD-PAK radiation-hardened against natural space radiation Total dose hardness: - >100 krad (Si), depending upon

More information

54LVTH V ABT16-Bit Transparent D-Type Latches DESCRIPTION: FEATURES: Logic Diagram 54LVTH16373

54LVTH V ABT16-Bit Transparent D-Type Latches DESCRIPTION: FEATURES: Logic Diagram 54LVTH16373 54LVTH16373 3.3V ABT16-Bit Transparent D-Type Latches 1OE 1Q1 1Q2 1Q3 1Q4 VCC 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 VCC 2Q5 2Q6 2Q7 2Q8 2OE FEATURES: 1 48 54LVTH16373 24 25 1LE 1D1 1D2 1D3 1D4 VCC 1D5 1D6 1D7

More information

54LVTH PRELIMINARY. 3.3V 16-Bit Transparent D-Type Latches. Memory DESCRIPTION: FEATURES: Logic Diagram

54LVTH PRELIMINARY. 3.3V 16-Bit Transparent D-Type Latches. Memory DESCRIPTION: FEATURES: Logic Diagram PRELIMINARY 1OE 1Q1 1Q2 1Q3 1Q4 VCC 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 VCC 2Q5 2Q6 2Q7 2Q8 2OE FEATURES: 1 48 54LVTH162373 24 25 1LE 1D1 1D2 1D3 1D4 VCC 1D5 1D6 1D7 1D8 2D1 2D2 2D3 2D4 VCC 2D5 2D6 2D7 2D8

More information

OP490. Quad Low Voltage Micropower Operational Amplifier FEATURES: DESCRIPTION: Logic Diagram (One Amplifier)

OP490. Quad Low Voltage Micropower Operational Amplifier FEATURES: DESCRIPTION: Logic Diagram (One Amplifier) Quad Low Voltage Micropower Operational Amplifier Logic Diagram (One Amplifier) FEATURES: RAD-PAK technology-hardened against natural space radiation Total dose hardness: - > 100 krad (Si), depending upon

More information

Logic Diagram (PositiveLogic) 1/24 1OE/2OE 48/25 1LE/2LE 47/36 1D1/2D1 DESCRIPTION: DDC s 54LVTH bit transparent D-

Logic Diagram (PositiveLogic) 1/24 1OE/2OE 48/25 1LE/2LE 47/36 1D1/2D1 DESCRIPTION: DDC s 54LVTH bit transparent D- 54LVTH16373 3.3V ABT16-Bit Transparent D-Type Latches 1OE 1Q1 1Q2 1Q3 1Q4 VCC 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 VCC 2Q5 2Q6 2Q7 2Q8 2OE FEATURES: 1 48 54LVTH16373 24 25 3.3V low voltage advanced BiCMOS technology

More information

8-Channel Fault-Protected Analog Multiplexer

8-Channel Fault-Protected Analog Multiplexer 358 8-Channel Fault-Protected Analog Multiplexer FEATURES: RAD-PAK technology-hardened against natural space radiation Total dose hardness: - > 50 krad (Si), depending upon space mission Excellent Single

More information

16-Channel CMOS Analog Multiplexer. Memory

16-Channel CMOS Analog Multiplexer. Memory 306 16-Channel CMOS Analog Multiplexer FEATURES: RAD-PAK technology radiation-hardened against natural space radiation Total dose hardness: - > 50 Krad (Si), depending upon space mission Excellent Single

More information

54LVTH PRELIMINARY. 3.3V 16-Bit Transparent D-Type Latches. Memory DESCRIPTION: FEATURES: Logic Diagram

54LVTH PRELIMINARY. 3.3V 16-Bit Transparent D-Type Latches. Memory DESCRIPTION: FEATURES: Logic Diagram PRELIMINARY 1OE 1Q1 1Q2 1Q3 1 48 1LE 1D1 1D2 1D3 Logic Diagram (PositiveLogic) 1OE/2OE 1/24 54LVTH162373 3.3V 16-Bit Transparent D-Type Latches 1Q4 1D4 VCC 1Q5 1Q6 VCC 1D5 1D6 1LE/2LE 48/25 1Q7 1Q8 2Q1

More information

CMOS Quad Rail-to-Rail I/O Op Amp DESCRIPTION: FEATURES: Logic Diagram

CMOS Quad Rail-to-Rail I/O Op Amp DESCRIPTION: FEATURES: Logic Diagram 6484 CMOS Quad Rail-to-Rail I/O Op Amp V+ IN+A IN+D IN-A OUT A OUT D IN-D V- IN+B OUT B OUT C IN+C IN-B Logic Diagram IN-C FEATURES: Rad-Pak technology-hardened against natural space radiation Total dose

More information

256K (32K x 8) Paged Parallel EEPROM AT28C256

256K (32K x 8) Paged Parallel EEPROM AT28C256 Features Fast Read Access Time 150 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes Internal Control Timer Fast Write Cycle Times Page Write Cycle Time: 3 ms or 10 ms Maximum

More information

54LVTH Memory FEATURES: DESCRIPTION: 16-Bit Buffers/Drivers with 3-State Outputs. Logic Diagram

54LVTH Memory FEATURES: DESCRIPTION: 16-Bit Buffers/Drivers with 3-State Outputs. Logic Diagram 16-Bit Buffers/Drivers with 3-State Outputs Logic Diagram FEATURES: RAD-PAK radiation-hardened against natural space radiation Total dose hardness: - > 100 krad (Si), depending upon space mission Output

More information

9240LP LPTVREF. Memory DESCRIPTION: FEATURES: 14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC. 9240LP Block Diagram 9240LP

9240LP LPTVREF. Memory DESCRIPTION: FEATURES: 14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC. 9240LP Block Diagram 9240LP 14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC NC BIAS CAPB CAPT NC CML LPTref VinA VinB LPTAVDD LPTDVDD REFCOM Vref SENSE NC AVSS AVDD NC NC OTC BIT 1 BIT 2 BIT 3 BIT 4 BIT BIT 6 BIT 7 BIT 8 BIT

More information

54LVTH244A. 3.3V ABT 8-Bit Octal Buffers/Drivers FEATURES: DESCRIPTION: Logic Diagram

54LVTH244A. 3.3V ABT 8-Bit Octal Buffers/Drivers FEATURES: DESCRIPTION: Logic Diagram 54LVTH244A 3.3V ABT 8-Bit Octal Buffers/Drivers FEATURES: Logic Diagram DESCRIPTION: 3.3V ABT octal buffers/drivers with 3-state outputs RAD-PAK radiation-hardened against natural space radiation Package:

More information

Low-Power Quad Operational Amplifier FEATURES: DESCRIPTION: Memory. Logic Diagram. RAD-PAK technology-hardened against natural space radiation

Low-Power Quad Operational Amplifier FEATURES: DESCRIPTION: Memory. Logic Diagram. RAD-PAK technology-hardened against natural space radiation Low-Power Quad Operational Amplifier FEATURES: RAD-PAK technology-hardened against natural space radiation Total dose hardness: - > 100 krad (Si), depending upon space mission Excellent Single Event Effects:

More information

54LVTH FEATURES: DESCRIPTION: 16-Bit Bus Transceivers with 3-State Outputs. Logic Diagram

54LVTH FEATURES: DESCRIPTION: 16-Bit Bus Transceivers with 3-State Outputs. Logic Diagram 16-Bit Bus Transceivers with 3-State Outputs / / / / Logic Diagram FEATURES: A-Port outputs have equivalent 22-Ω series resistors, so no external resistors are required Support mixed-mode signal operation

More information

4-megabit (512K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT29BV040A

4-megabit (512K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT29BV040A Features Single Supply Voltage, Range 2.7V to 3.6V Single Supply for Read and Write Software Protected Programming Fast Read Access Time 200 ns Low Power Dissipation 15 ma Active Current 50 µa CMOS Standby

More information

OP400A. Quad Low-Offset, Low-Power Operational Amplifier FEATURES: DESCRIPTION: Memory. Logic Diagram (One Amplifier)

OP400A. Quad Low-Offset, Low-Power Operational Amplifier FEATURES: DESCRIPTION: Memory. Logic Diagram (One Amplifier) Quad Low-Offset, Low-Power Operational Amplifier v+ BIAS OUT VOLTAGE LIMITING NETWORK +IN -IN v- Logic Diagram (One Amplifier) FEATURES: RAD-PAK technology-hardened against natural space radiation Total

More information

Microprocessor-compatible 8-Bit ADC. Memory FEATURES: Logic Diagram DESCRIPTION:

Microprocessor-compatible 8-Bit ADC. Memory FEATURES: Logic Diagram DESCRIPTION: 7820 Microprocessor-compatible 8-Bit ADC FEATURES: 1.36 µs Conversion Time Built-in-Track-and-Hold Function Single +5 Volt Supply No External Clock Required Tri-State Output Buffered Total Ionization Dose:

More information

7809ALP 16-Bit Latchup Protected Analog to Digital Converter

7809ALP 16-Bit Latchup Protected Analog to Digital Converter 789ALP 6-Bit Latchup Protected Analog to Digital Converter R/C CS POWER DOWN Successive Approimation Register and Control Logic Clock 2 k CDAC R IN k BUSY R2 IN R3 IN 5 k 2 k Comparator Serial Data Out

More information

7809ALP 16-Bit Latchup Protected Analog to Digital Converter

7809ALP 16-Bit Latchup Protected Analog to Digital Converter 789ALP 6-Bit Latchup Protected Analog to Digital Converter R/C CS POWER DOWN Successive Approimation Register and Control Logic Clock 2 kω CDAC R IN kω BUSY R2 IN R3 IN 5 kω 2 kω Comparator Serial Data

More information

128 Channel Multiplexer DESCRIPTION: FEATURES: See page 2 for pin assignments. (631) Fax: (631)

128 Channel Multiplexer DESCRIPTION: FEATURES: See page 2 for pin assignments. (631) Fax: (631) 81840 128 Channel Multiplexer ADDRESS ENABLE COMMON TO ALL INPUT MUX s CLAMP/ PRECHARGE ADDRESS ENABLE BYPASS CASCADE INPUT ADDRESS ENABLE V+ (+15V) V- (-15V) 8 8 4 7 4 16 IN 16:1 5 5 128 TOTAL ANALOG

More information

768A PRELIMINARY. Memory FEATURES: DESCRIPTION: 16-BIT, 30 MSPS DIGITAL-TO-ANALOG CONVERTER 768A. Functional Block Diagram

768A PRELIMINARY. Memory FEATURES: DESCRIPTION: 16-BIT, 30 MSPS DIGITAL-TO-ANALOG CONVERTER 768A. Functional Block Diagram 16-BIT, 30 MSPS DIGITAL-TO-ANALOG CONVERTER Functional Block Diagram FEATURES: RAD-PAK technology-hardened against natural space radiation Total dose hardness: > 100 krad (Si), depending upon space mission

More information

Am27C Megabit (524,288 x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION BLOCK DIAGRAM

Am27C Megabit (524,288 x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION BLOCK DIAGRAM FINAL Am27C040 4 Megabit (524,288 x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS Fast access time 90 ns Low power consumption 100 µa maximum CMOS standby current JEDEC-approved pinout Plug in upgrade

More information

Radiation Hardened 32K x 8 CMOS EEPROM

Radiation Hardened 32K x 8 CMOS EEPROM Radiation Hardened 32K x 8 CMOS EEPROM Introduction The W28C256 is a 32K x 8 radiation hardened EEPROM designed by Sandia National Laboratories, Albuquerque, NM, and manufactured by the Northrop Grumman

More information

4-Megabit (512K x 8) OTP EPROM AT27C040

4-Megabit (512K x 8) OTP EPROM AT27C040 Features Fast Read Access Time 70 ns Low Power CMOS Operation 100 µa Max Standby 30 ma Max Active at 5 MHz JEDEC Standard Packages 32-lead PDIP 32-lead PLCC 32-lead TSOP 5V ± 10% Supply High Reliability

More information

NTE27C D Integrated Circuit 2 Mbit (256Kb x 8) UV EPROM

NTE27C D Integrated Circuit 2 Mbit (256Kb x 8) UV EPROM NTE27C2001 12D Integrated Circuit 2 Mbit (256Kb x 8) UV EPROM Description: The NTE27C2001 12D is an 2 Mbit UV EPROM in a 32 Lead DIP type package ideally suited for applications where fast turn around

More information

Pin Connection (Top View)

Pin Connection (Top View) TOSHIBA TC551001BPL/BFL/BFTL/BTRL-70L/85L SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM Description The TC551001BPL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits

More information

NTE27C256 12D, NTE27C256 15D, NTE27C256 70D Integrated Circuit 256 Kbit (32Kb x 8) UV EPROM 28 Lead DIP Type Package

NTE27C256 12D, NTE27C256 15D, NTE27C256 70D Integrated Circuit 256 Kbit (32Kb x 8) UV EPROM 28 Lead DIP Type Package NTE27C256 12D, NTE27C256 15D, NTE27C256 70D Integrated Circuit 256 Kbit (32Kb x 8) UV EPROM 28 Lead DIP Type Package NTE27C256 15P Integrated Circuit 256 Kbit (32Kb x 8) OTP EPROM 28 Lead DIP Type Packag

More information

1-Megabit (128K x 8) Unregulated Battery-Voltage OTP EPROM AT27BV010

1-Megabit (128K x 8) Unregulated Battery-Voltage OTP EPROM AT27BV010 Features Fast Read Access Time 90 ns Dual Voltage Range Operation Unregulated Battery Power Supply Range, 2.7V to 3.6V or Standard 5V ± 10% Supply Range Compatible with JEDEC Standard AT27C010 Low Power

More information

32M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr. 26,2017

32M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr. 26,2017 Revision History Rev. No. History Issue Date 1.0 Initial issue Apr. 26,2017 1 Rev. 1.0 GENERAL DESCRIPTION The and are a 33,578,432-bit high-speed Static Random Access Memory organized as 4M(2M) words

More information

1M Async Fast SRAM. Revision History CS16FS1024(3/5/W) Rev. No. History Issue Date

1M Async Fast SRAM. Revision History CS16FS1024(3/5/W) Rev. No. History Issue Date Revision History Rev. No. History Issue Date 1.0 Initial issue Apr.15,2014 2.0 Add 32TSOPII-400mil pin configuration and outline May 26, 2014 3.0 Delete 128kx8 products May 22, 2015 4.0 Add part no. CS16FS10245GC(I)-12

More information

NM27C040 4,194,304-Bit (512K x 8) High Performance CMOS EPROM

NM27C040 4,194,304-Bit (512K x 8) High Performance CMOS EPROM NM27C040 4,194,304-Bit (512K x 8) High Performance CMOS EPROM General Description The NM27C040 is a high performance, 4,194,304-bit Electrically Programmable UV Erasable Read Only Memory. It is organized

More information

2M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr..15,2014

2M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr..15,2014 Revision History Rev. No. History Issue Date 1.0 Initial issue Apr..15,2014 1 Rev. 1.0 GENERAL DESCRIPTION The and are a 2,097,152-bit high-speed Static Random Access Memory organized as 128K(256) words

More information

4M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr.15,2014

4M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr.15,2014 Revision History Rev. No. History Issue Date 1.0 Initial issue Apr.15,2014 1 Rev. 1.0 GENERAL DESCRIPTION The and are a 4,194,304-bit high-speed Static Random Access Memory organized as 256K(512) words

More information

SPI Serial EEPROMs AT25128A AT25256A

SPI Serial EEPROMs AT25128A AT25256A Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes (,) and (,) Data Sheet Describes Mode Operation Low-voltage and Standard-voltage Operation. (V CC =.V to.v). (V CC =.V to.v) MHz

More information

16M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr. 15,2014

16M Async Fast SRAM. Rev. No. History Issue Date 1.0 Initial issue Apr. 15,2014 Revision History Rev. No. History Issue Date 1.0 Initial issue Apr. 15,2014 1 Rev. 1.0 GENERAL DESCRIPTION The and are a 16,789,216-bit high-speed Static Random Access Memory organized as 1M(2M) words

More information

NM27C010 1,048,576-Bit (128K x 8) High Performance CMOS EPROM

NM27C010 1,048,576-Bit (128K x 8) High Performance CMOS EPROM NM27C010 1,048,576-Bit (128K x 8) High Performance CMOS EPROM General Description The NM27C010 is a high performance, 1,048,576-bit Electrically Programmable UV Erasable Read Only Memory. It is organized

More information

SOIC (SOP) NC A8 A9 A10 A11 A12 A13 A14 A15 A16 NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 BYTE/VPP GND O15/A-1 GND O7 O14 O6 O13 O5 O12 O4 VCC

SOIC (SOP) NC A8 A9 A10 A11 A12 A13 A14 A15 A16 NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 BYTE/VPP GND O15/A-1 GND O7 O14 O6 O13 O5 O12 O4 VCC Features Read Access Time - 100 ns Word-wide or Byte-wide Configurable 8-Megabit Flash and Mask ROM Compatable Low Power CMOS Operation -100 µa Maximum Standby - 50 ma Maximum Active at 5 MHz Wide Selection

More information

256K (32K x 8) OTP EPROM AT27C256R

256K (32K x 8) OTP EPROM AT27C256R Features Fast Read Access Time 45 ns Low-Power CMOS Operation 100 µa Max Standby 20 ma Max Active at 5 MHz JEDEC Standard Packages 28-lead PDIP 32-lead PLCC 28-lead TSOP and SOIC 5V ± 10% Supply High Reliability

More information

NM27C ,288-Bit (64K x 8) High Performance CMOS EPROM

NM27C ,288-Bit (64K x 8) High Performance CMOS EPROM NM27C512 524,288-Bit (64K x 8) High Performance CMOS EPROM General Description The NM27C512 is a high performance 512K UV Erasable Electrically Programmable Read Only Memory (EPROM). It is manufactured

More information

NM93C56 2K-Bit Serial CMOS EEPROM (MICROWIRE Bus Interface)

NM93C56 2K-Bit Serial CMOS EEPROM (MICROWIRE Bus Interface) NM93C56 2K-Bit Serial CMOS EEPROM (MICROWIRE Bus Interface) General Description The NM93C56 devices are 2048 bits of CMOS non-volatile electrically erasable memory divided into 28 6-bit registers. They

More information

524,288-Word x 16-Bit or 1,048,576-Word x 8-Bit One Time PROM

524,288-Word x 16-Bit or 1,048,576-Word x 8-Bit One Time PROM Semiconductor 524,288Word x 16Bit or 1,048,576Word x 8Bit One Time PROM 1A DESCRIPTION The is a 8Mbit electrically Programmable ReadOnly Memory whose configuration can be electrically switched between

More information

5V 128K X 8 HIGH SPEED CMOS SRAM

5V 128K X 8 HIGH SPEED CMOS SRAM 5V 128K X 8 HIGH SPEED CMOS SRAM Revision History AS7C1024B Revision Details Date Rev 1.0 Preliminary datasheet prior to 2004 Rev 1.1 Die Revision A to B March 2004 Rev 2.0 PCN issued yield issues with

More information

3-wire Serial EEPROM AT93C86. Features. Description. Pin Configurations 8-lead PDIP. 16K (2048 x 8 or 1024 x 16)

3-wire Serial EEPROM AT93C86. Features. Description. Pin Configurations 8-lead PDIP. 16K (2048 x 8 or 1024 x 16) Features Low-voltage and Standard-voltage Operation 2.7 (V CC = 2.7V to 5.5V) User Selectable Internal Organization 6K: 2048 x 8 or 024 x 6 3-wire Serial Interface Sequential Read Operation Schmitt Trigger,

More information

Pm39LV512 / Pm39LV010

Pm39LV512 / Pm39LV010 512 Kbit / 1Mbit 3.0 Volt-only CMOS Flash Memory FEATURES Single Power Supply Operation - Low voltage range: 2.7 V - 3.6 V Memory Organization - Pm39LV512: 64K x 8 (512 Kbit) - Pm39LV010: 128K x 8 (1 Mbit)

More information

TC55VBM316AFTN/ASTN40,55

TC55VBM316AFTN/ASTN40,55 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM DESCRIPTION The TC55VBM316AFTN/ASTN is a 8,388,608-bit static random

More information

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 262,144-WORD BY 16-BIT FULL CMOS STATIC RAM DESCRIPTION The TC55YEM216ABXN is a 4,194,304-bit static random access memory (SRAM) organized

More information

1Mb Ultra-Low Power Asynchronous CMOS SRAM. Features. Power Supply (Vcc) Operating Temperature A 0 -A 16 I/O 0 -I/O 7

1Mb Ultra-Low Power Asynchronous CMOS SRAM. Features. Power Supply (Vcc) Operating Temperature A 0 -A 16 I/O 0 -I/O 7 1Mb Ultra-Low Power Asynchronous CMOS SRAM 128K 8 bit N01L83W2A Overview The N01L83W2A is an integrated memory device containing a 1 Mbit Static Random Access Memory organized as 131,072 words by 8 bits.

More information

A4 A3 A2 A1 A0 DQ0 DQ15. DQ2 DQ3 Vcc GND DQ4 DQ5 DQ6 DQ7 WE A16 A15 A14 A13 A12

A4 A3 A2 A1 A0 DQ0 DQ15. DQ2 DQ3 Vcc GND DQ4 DQ5 DQ6 DQ7 WE A16 A15 A14 A13 A12 128K x 16 Low Power SRAM Rev 1.5 04/2007 Features 48-Ball BGA (CSP), Top View Single power supply voltage of 2.7V to 3.6V Power down features using CE Low operating current : 30mA(max for 55 ns) Maximum

More information

Features INSTRUCTION DECODER CONTROL LOGIC AND CLOCK GENERATORS EEPROM ARRAY READ/WRITE AMPS DATA IN/OUT REGISTER 16 BITS DATA OUT BUFFER

Features INSTRUCTION DECODER CONTROL LOGIC AND CLOCK GENERATORS EEPROM ARRAY READ/WRITE AMPS DATA IN/OUT REGISTER 16 BITS DATA OUT BUFFER NM93C56 2048- Serial CMOS EEPROM (MICROWIRE Synchronous Bus) General Description NM93C56 is a 2048-bit CMOS non-volatile EEPROM organized as 128 x 16-bit array. This device features MICROWIRE interface

More information

HT27C020 OTP CMOS 256K 8-Bit EPROM

HT27C020 OTP CMOS 256K 8-Bit EPROM OTP CMOS 256K 8-Bit EPROM Features Operating voltage: +5.0V Programming voltage V PP=12.5V±0.2V V CC=6.0V±0.2V High-reliability CMOS technology Latch-up immunity to 100mA from -1.0V to V CC+1.0V CMOS and

More information

P4C147 ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM

P4C147 ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) 1/1/15//5 (Commercial) 15//5/35 (Military) Low Power Operation 715 mw Active 1 (Commercial)

More information

FM27C ,144-Bit (32K x 8) High Performance CMOS EPROM

FM27C ,144-Bit (32K x 8) High Performance CMOS EPROM FM27C256 262,144-Bit (32K x 8) High Performance CMOS EPROM General Description The FM27C256 is a 256K Electrically Programmable Read Only Memory. It is manufactured in Fairchild s latest CMOS split gate

More information

8K x 8 EPROM CY27C64. Features. Functional Description. fax id: 3006

8K x 8 EPROM CY27C64. Features. Functional Description. fax id: 3006 1CY 27C6 4 fax id: 3006 CY27C64 Features CMOS for optimum speed/power Windowed for reprogrammability High speed 0 ns (commercial) Low power 40 mw (commercial) 30 mw (military) Super low standby power Less

More information

P4C1257/P4C1257L. ULTRA HIGH SPEED 256K x 1 STATIC CMOS RAMS FEATURES DESCRIPTION. Full CMOS. Separate Data I/O

P4C1257/P4C1257L. ULTRA HIGH SPEED 256K x 1 STATIC CMOS RAMS FEATURES DESCRIPTION. Full CMOS. Separate Data I/O P4C1257/P4C1257L ULTRA HIGH SPEED 256K x 1 STATIC CMOS RAMS FEATURES Full CMOS High Speed (Equal Access and Cycle s) 12/15/20/25 ns (Commercial) 12/15/20/25 ns (Industrial) 25/35/45/55/70 ns (Military)

More information

P4C1041 HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM

P4C1041 HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM FEATURES High Speed (Equal Access and Cycle Times) 10/12/15/20 ns (Commercial) 12/15/20 ns (Industrial/Military) Low Power Single 5.0V ± 10% Power Supply 2.0V

More information

8Mb (1M x 8) One-time Programmable, Read-only Memory

8Mb (1M x 8) One-time Programmable, Read-only Memory Features Fast read access time 90ns Low-power CMOS operation 100µA max standby 40mA max active at 5MHz JEDEC standard packages 32-lead PLCC 32-lead PDIP 5V 10% supply High-reliability CMOS technology 2,000V

More information

DS1270W 3.3V 16Mb Nonvolatile SRAM

DS1270W 3.3V 16Mb Nonvolatile SRAM 19-5614; Rev 11/10 www.maxim-ic.com 3.3V 16Mb Nonvolatile SRAM FEATURES Five years minimum data retention in the absence of external power Data is automatically protected during power loss Unlimited write

More information

KEY FEATURES. Immune to Latch-UP Fast Programming. ESD Protection Exceeds 2000 V Asynchronous Output Enable GENERAL DESCRIPTION TOP VIEW A 10

KEY FEATURES. Immune to Latch-UP Fast Programming. ESD Protection Exceeds 2000 V Asynchronous Output Enable GENERAL DESCRIPTION TOP VIEW A 10 HIGH-SPEED 2K x 8 REGISTERED CMOS PROM/RPROM KEY FEATURES Ultra-Fast Access Time DESC SMD Nos. 5962-88735/5962-87529 25 ns Setup Pin Compatible with AM27S45 and 12 ns Clock to Output CY7C245 Low Power

More information

NMC27C32B Bit (4096 x 8) CMOS EPROM

NMC27C32B Bit (4096 x 8) CMOS EPROM NMC27C32B 32 768-Bit (4096 x 8) CMOS EPROM General Description The NMC27C32B is a 32k UV erasable and electrically reprogrammable CMOS EPROM ideally suited for applications where fast turnaround pattern

More information

P4C1299/P4C1299L. ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES DESCRIPTION. Full CMOS, 6T Cell. Data Retention with 2.0V Supply (P4C1299L)

P4C1299/P4C1299L. ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM FEATURES DESCRIPTION. Full CMOS, 6T Cell. Data Retention with 2.0V Supply (P4C1299L) FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) 15/20/25/35 ns (Commercial/Industrial) 15/20/25/35/45 ns (Military) Low Power Operation Single 5V±10% Power Supply Output Enable (OE)

More information

UT32BS1X833 Matrix-D TM 32-Channel 1:8 Bus Switch October, 2018 Datasheet

UT32BS1X833 Matrix-D TM 32-Channel 1:8 Bus Switch October, 2018 Datasheet UT32BS1X833 Matrix-D TM 32-Channel 1:8 Bus Switch October, 2018 Datasheet The most important thing we build is trust FEATURES Interfaces to standard processor memory busses Single-chip interface that provides

More information

Standard Products UT54ACTS220 Clock and Wait-State Generation Circuit. Datasheet November 2010

Standard Products UT54ACTS220 Clock and Wait-State Generation Circuit. Datasheet November 2010 Standard Products UT54ACTS220 Clock and Wait-State Generation Circuit Datasheet November 2010 www.aeroflex.com/logic FEATURES 1.2μ CMOS - Latchup immune High speed Low power consumption Single 5 volt supply

More information

4Mb Ultra-Low Power Asynchronous CMOS SRAM. Features. Power Supply (Vcc) Operating Temperature A 0 -A 17 I/O 0 -I/O 15 V CC V SS

4Mb Ultra-Low Power Asynchronous CMOS SRAM. Features. Power Supply (Vcc) Operating Temperature A 0 -A 17 I/O 0 -I/O 15 V CC V SS 4Mb Ultra-Low Power Asynchronous CMOS SRAM 256K 16 bit N04L63W2A Overview The N04L63W2A is an integrated memory device containing a 4 Mbit Static Random Access Memory organized as 262,144 words by 16 bits.

More information

NTE74S188 Integrated Circuit 256 Bit Open Collector PROM 16 Lead DIP Type Package

NTE74S188 Integrated Circuit 256 Bit Open Collector PROM 16 Lead DIP Type Package NTE74S188 Integrated Circuit 256 Bit Open Collector PROM 16 Lead DIP Type Package Description: The NTE74S188 Schottky PROM memory is organized in the popular 32 words by 8 bits configuration. A memory

More information

CS SK DI DO NC TEST GND. Figure 1. Table 1

CS SK DI DO NC TEST GND. Figure 1. Table 1 Rev.. CMOS SERIAL E 2 PROM The series are low power 4K/8K-bit E 2 PROM with a low operating voltage range. They are organized as 256-word 6-bit and 52-word 6bit, respectively. Each is capable of sequential

More information

74ABT377 Octal D-Type Flip-Flop with Clock Enable

74ABT377 Octal D-Type Flip-Flop with Clock Enable Octal D-Type Flip-Flop with Clock Enable General Description The ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all

More information

1M Words By 8 bit. Rev. No. History Issue Date Remark 1.0 Initial issue Aug.17,2016

1M Words By 8 bit. Rev. No. History Issue Date Remark 1.0 Initial issue Aug.17,2016 Revision History Rev. No. History Issue Date Remark 1.0 Initial issue Aug.17,2016 i Rev. 1.0 PRODUCT DESCRIPTION... 1 FEATURES... 1 PRODUCT FAMILY... 1 PIN CONFIGURATIONS... 2 FUNCTIONAL BLOCK DIAGRAM...

More information

NOTE: This product has been replaced with UT28F256QLE or SMD device types 09 and 10.

NOTE: This product has been replaced with UT28F256QLE or SMD device types 09 and 10. NOTE: This product has been replaced with UT28F256QLE or SMD 5962-96891 device types 09 and 10. 1 Standard Products UT28F256 Radiation-Hardened 32K x 8 PROM Data Sheet December 2002 FEATURES Programmable,

More information

Radiation Hardened 8K x 8 CMOS EEPROM

Radiation Hardened 8K x 8 CMOS EEPROM Radiation Hardened 8K x 8 CMOS EEPROM Introduction The W28C64 is a 8K x 8 radiation hardened EEPROM designed by Sandia National Laboratories, Albuquerque, NM, and manufactured by Northrop Grumman Advanced

More information

32K x 8 Power Switched and Reprogrammable PROM

32K x 8 Power Switched and Reprogrammable PROM 1 CY7C271 32K x Power Switched and Reprogrammable PROM Features CMOS for optimum speed/power Windowed for reprogrammability High speed 30 ns (Commercial) 3 ns (Military) Low power 660 mw (commercial) 71

More information

TOSHIBA MOS MEMORY PRODUCTS TC5565APL-10, TC5565APL-12, TC5565APL-15 TC5565AFL-10, TC5565AFL-12, TC5565AFL-15

TOSHIBA MOS MEMORY PRODUCTS TC5565APL-10, TC5565APL-12, TC5565APL-15 TC5565AFL-10, TC5565AFL-12, TC5565AFL-15 TOSHIBA MOS MEMORY PRODUCTS TC5565APL-10, TC5565APL-12, TC5565APL-15 DESCRIPTION The TC5565APL/AFL is 65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS technology, and

More information

SRAM AS5C K x 8 SRAM Ultra Low Power SRAM. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATION FEATURES GENERAL DESCRIPTION

SRAM AS5C K x 8 SRAM Ultra Low Power SRAM. PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATION FEATURES GENERAL DESCRIPTION 512K x 8 Ultra Low Power AVAILABLE AS MILITARY SPECIFICATION SMD 5962-95613 1,2 MIL STD-883 1 FEATURES Ultra Low Power with 2V Data Retention (0.2mW MAX worst case Power-down standby) Fully Static, No

More information

NMC27C64 65,536-Bit (8192 x 8) CMOS EPROM

NMC27C64 65,536-Bit (8192 x 8) CMOS EPROM NMC27C64 65,536-Bit (8192 x 8) CMOS EPROM General Description The NMC27C64 is a 64K UV erasable, electrically reprogrammable and one-time programmable (OTP) CMOS EPROM ideally suited for applications where

More information

74LVC373ATTR OCTAL D-TYPE LATCH HIGH PERFORMANCE

74LVC373ATTR OCTAL D-TYPE LATCH HIGH PERFORMANCE OCTAL D-TYPE LATCH HIGH PERFORMANCE 5V TOLERANT INPUTS HIGH SPEED: t PD = 6.8 (MAX.) at V CC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: I OH = I OL = 24mA (MIN) at V

More information

RIC74424H RADIATION HARDENED NON-INVERTING DUAL OUTPUT MOSFET DRIVERS PD Product Summary. Description

RIC74424H RADIATION HARDENED NON-INVERTING DUAL OUTPUT MOSFET DRIVERS PD Product Summary. Description PD-97901 RIC74424H RADIATION HARDENED NON-INVERTING DUAL OUTPUT MOSFET DRIVERS Product Summary Part Number Output Voltage Range Peak Current Typical ton/toff RIC74424H 5 to 20V 3A 110ns/90ns 8 LEAD FLAT

More information

3-wire Serial EEPROM AT93C86. Features. Description. Pin Configurations. 16K (2048 x 8 or 1024 x 16)

3-wire Serial EEPROM AT93C86. Features. Description. Pin Configurations. 16K (2048 x 8 or 1024 x 16) Features Low-voltage and Standard-voltage Operation 2.7 (V CC = 2.7V to 5.5V) User Selectable Internal Organization 6K: 2048 x 8 or 024 x 6 3-wire Serial Interface Sequential Read Operation Schmitt Trigger,

More information

DISCONTINUED PRODUCT

DISCONTINUED PRODUCT Rev. 2.2_ CMOS SERIAL E 2 PROM Features Low power consumption Standby :. µa Max. (V CC =5.5 V) Operating :.8 ma Max. (V CC =5.5 V) :.4 ma Max. (V CC =2.5 V) Wide operating voltage range Read/Write :.8

More information

NM27P Bit (256k x 8) POP Processor Oriented CMOS EPROM

NM27P Bit (256k x 8) POP Processor Oriented CMOS EPROM NM27P020 2 097 152-Bit (256k x 8) POPTM Processor Oriented CMOS EPROM General Description The NM27P020 is a 2 Mbit POP EPROM configured as 256k x 8 It s designed to simplify microprocessor interfacing

More information

4-Megabit (512K x 8) OTP EPROM AT27C040. Features. Description. Pin Configurations

4-Megabit (512K x 8) OTP EPROM AT27C040. Features. Description. Pin Configurations Features Fast Read Access Time - 70 ns Low Power CMOS Operation 100 µa max. Standby 30 ma max. Active at 5 MHz JEDEC Standard Packages 32-Lead 600-mil PDIP 32-Lead 450-mil SOIC (SOP) 32-Lead PLCC 32-Lead

More information

DS1642 Nonvolatile Timekeeping RAM

DS1642 Nonvolatile Timekeeping RAM www.dalsemi.com Nonvolatile Timekeeping RAM FEATURES Integrated NV SRAM, real time clock, crystal, power fail control circuit and lithium energy source Standard JEDEC bytewide 2K x 8 static RAM pinout

More information

P4C164LL. VERY LOW POWER 8Kx8 STATIC CMOS RAM FEATURES DESCRIPTION V CC. Current (Commercial/Industrial) Operating: 55 ma CMOS Standby: 3 µa

P4C164LL. VERY LOW POWER 8Kx8 STATIC CMOS RAM FEATURES DESCRIPTION V CC. Current (Commercial/Industrial) Operating: 55 ma CMOS Standby: 3 µa P4C164LL VERY LOW POWER 8Kx8 STATIC CMOS RAM FEATURES Current (Commercial/Industrial) Operating: 55 ma CMOS Standby: 3 µa Access Times 80/100 (Commercial or Industrial) 90/120 (Military) Single 5 Volts

More information

UT54ACS164245SEI Schmitt CMOS 16-bit Bidirectional MultiPurpose Transceiver Datasheet

UT54ACS164245SEI Schmitt CMOS 16-bit Bidirectional MultiPurpose Transceiver Datasheet UT54ACS164245SEI Schmitt CMOS 16-bit Bidirectional MultiPurpose Transceiver Datasheet April 2016 www.aeroflex.com/16bitlogic FEATURES Flexible voltage operation - 5V bus to 3.3V bus; 5V bus to 5V bus -

More information

UT28F64 Radiation-Hardened 8K x 8 PROM Data Sheet

UT28F64 Radiation-Hardened 8K x 8 PROM Data Sheet Standard Products UT28F64 Radiation-Hardened 8K x 8 PROM Data Sheet August 2001 FEATURES Programmable, read-only, asynchronous, radiationhardened, 8K x 8 memory - Supported by industry standard programmer

More information

8408 Quad 8-Bit Multiplying CMOS D/A Converter with Memory

8408 Quad 8-Bit Multiplying CMOS D/A Converter with Memory Quad 8-Bit Multiplying CMOS FEATURES: RAD-PAK patented shielding against natural space radiation Total dose hardness: - equal to 100 krad (Si), depending upon orbit and space mission Package: - 28 pin

More information

IS39LV040 / IS39LV010 / IS39LV512

IS39LV040 / IS39LV010 / IS39LV512 4Mbit / 1Mbit / 512 Kbit 3.0 Volt-only CMOS Flash Memory FEATURES Single Power Supply Operation - Low voltage range: 2.70 V - 3.60 V Memory Organization - IS39LV040: 512K x 8 (4 Mbit) - IS39LV010: 128K

More information

PY263/PY264. 8K x 8 REPROGRAMMABLE PROM FEATURES DESCRIPTION. EPROM Technology for reprogramming. Windowed devices for reprogramming.

PY263/PY264. 8K x 8 REPROGRAMMABLE PROM FEATURES DESCRIPTION. EPROM Technology for reprogramming. Windowed devices for reprogramming. FEATURES EPROM Technology for reprogramming High Speed 25/35/45/55 ns (Commercial) 25/35/45/55 ns (Military) Low Power Operation: 660 mw Commercial 770 mw Military PY263/PY264 8K x 8 REPROGRAMMABLE PROM

More information

TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 512-MBIT (64M 8 BITS) CMOS NAND E 2 PROM (64M BYTE SmartMedia TM ) DESCRIPTION TH58NS512DC The TH58NS512 is a single 3.3-V 512-Mbit (553,648,128)

More information

RHFAHC00. Rad-Hard, quad high speed NAND gate. Datasheet. Features. Applications. Description

RHFAHC00. Rad-Hard, quad high speed NAND gate. Datasheet. Features. Applications. Description Datasheet Rad-Hard, quad high speed NAND gate Features 1.8 V to 3.3 V nominal supply 3.6 V max. operating 4.8 V AMR Very high speed: propagation delay of 3 ns maximum guaranteed Pure CMOS process CMOS

More information

MM74HC221A Dual Non-Retriggerable Monostable Multivibrator

MM74HC221A Dual Non-Retriggerable Monostable Multivibrator September 1983 Revised January 2004 MM74HC221A Dual Non-Retriggerable Monostable Multivibrator General Description The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate

More information

74AC299 74ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins

74AC299 74ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins 8-Input Universal Shift/Storage Register with Common Parallel I/O Pi General Description The AC/ACT299 is an 8-bit universal shift/storage register with 3-STATE outputs. Four modes of operation are possible:

More information

I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 A 16 I/O 7

I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 A 16 I/O 7 128K x 8 Static RAM Features High speed t AA = 12 ns Low active power 495 mw (max. 12 ns) Low CMOS standby power 55 mw (max.) 4 mw 2.0V Data Retention Automatic power-down when deselected TTL-compatible

More information