3-wire Serial EEPROM AT93C86. Features. Description. Pin Configurations. 16K (2048 x 8 or 1024 x 16)

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1 Features Low-voltage and Standard-voltage Operation 2.7 (V CC = 2.7V to 5.5V) User Selectable Internal Organization 6K: 2048 x 8 or 024 x 6 3-wire Serial Interface Sequential Read Operation Schmitt Trigger, Filtered Inputs for Noise Suppression 2 MHz Clock Rate (5V) Compatibility Self-timed Write Cycle (0 ms max) High Reliability Endurance: Million Write Cycles Data Retention: 00 Years Automotive Grade, Extended Temperature, and Lead-Free Devices Available 8-lead PP, 8-lead JEDEC SOIC, and 8-lead TSSOP Packages Description The AT93C86 provides 6384 bits of serial electrically erasable programmable read only memory (EEPROM), organized as 024 words of 6 bits each when the ORG pin is connected to V CC and 2048 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applicatio where lowpower and low-voltage operatio are essential. The AT93C86 is available in spacesaving 8-lead PP, 8-lead JEDEC SOIC, and 8-lead TSSOP packages. 3-wire Serial EEPROM 6K (2048 x 8 or 024 x 6) AT93C86 Pin Configuratio Pin Name Function 8-lead PP DO Chip Select Serial Data Clock Serial Data Input Serial Data Output DO VCC DC ORG GND GND Ground VCC Power Supply 8-lead SOIC ORG DC Internal Organization Don t Connect DO VCC DC ORG GND 8-lead TSSOP DO VCC DC ORG GND Rev.

2 Absolute Maximum Ratings* The AT93C86 is enabled through the Chip Select pin () and accessed via a 3-wire serial interface coisting of Data Input (), Data Output (DO), and Shift Clock (). Upon receiving a READ itruction at, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When is brought high following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. The AT93C86 is available in a 2.7V to 5.5V version. Operating Temperature C to +25 C Storage Temperature C to +50 C Voltage on any Pin with Respect to Ground....0V to +7.0V Maximum Operating Voltage V *NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of this specification is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability DC Output Current ma Block Diagram Vcc GND ORG MEMORY ARRAY 2048 x 8 OR 024 x 6 ADDRESS DECODER DATA REGISTER MODE DECODE LOGIC OUTPUT BUFFER CLOCK GENERATOR DO Note:. When the ORG pin is connected to Vcc, the x 6 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of the internal Meg ohm pullup, then the x 6 organization is selected. This feature is not available on the.8v devices. 2

3 Pin Capacitance () Applicable over recommended operating range from T A = 25 C, f =.0 MHz, V CC = +5.0V (unless otherwise noted). Symbol Test Conditio Max Units Conditio C OUT Output Capacitance (DO) 5 pf V OUT = 0V C IN Input Capacitance (,, ) 5 pf V IN = 0V Note:. This parameter is characterized and is not 00% tested. DC Characteristics Applicable over recommended operating range from: T AI = 40 C to +85 C, V CC = +2.7V to +5.5V, T AE = 40 C to +25 C, V CC = +2.7V to +5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Unit V CC Supply Voltage V V CC2 Supply Voltage V I CC Supply Current V CC = 5.0V READ at.0 MHz ma WRITE at.0 MHz ma I SB Standby Current V CC = 2.7V = 0V µa I SB2 Standby Current V CC = 5.0V = 0V 7 30 µa I IL Input Leakage V IN = 0V to V CC 0..0 µa I OL Output Leakage V IN = 0V to V CC 0..0 µa V IL () V IH () Input Low Voltage Input High Voltage 0.6 V CC x 0.7 V CC x 0.3 V CC + V V IL2 () V IH2 () Input Low Voltage Input High Voltage V CC 2.7V 0.6 V CC x 0.7 V CC x 0.3 V CC + V V OL V OH Output Low Voltage Output High Voltage I OL = 2. ma 0.4 V I OH = 0.4 ma 2.4 V V OL2 V OH2 Output Low Voltage Output High Voltage V CC 2.7V Note:. V IL min and V IH max are reference only and are not tested. I OL = 0.5 ma 0.2 V I OH = 00 µa V CC 0.2 V 3

4 AC Characteristics Applicable over recommended operating range from T AI = 40 C to + 85 C, T AE = 40 C to + 25 C,V CC = As Specified, CL = TTL Gate and 00 pf (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units f Clock Frequency MHz t H High Time t L Low Time t Minimum Low Time t S Setup Time Relative to t S Setup Time Relative to t H Hold Time Relative to 0 t H Hold Time Relative to t PD Output Delay to AC Test t PD0 Output Delay to 0 AC Test t SV to Status Valid AC Test t DF to DO in High Impedance AC Test = V IL t WP Write Cycle Time 0 ms 0. 4 ms Endurance () 5.0V, 25 C, Page Mode M Write Cycles Note:. This parameter is characterized and is not 00% tested. 4

5 Itruction Set for the AT93C86 Itruction SB Op Code Address Data x 8 x 6 x 8 x 6 Comments READ 0 A 0 A 0 A 9 A 0 Reads data stored in memory, at specified address. EWEN 00 XXXXXXXX XXXXXXXX Write enable must precede all programming modes. ERASE A 0 A 0 A 9 A 0 Erases memory location A n A 0. WRITE 0 A 0 A 0 A 9 A 0 D 7 D 0 D 5 D 0 Writes memory location A n A 0. ERAL 00 0XXXXXXXX 0XXXXXXXX Erases all memory locatio. Valid only at V CC = 4.5V to 5.5V. WRAL 00 0XXXXXXXX 0XXXXXXXX D 7 D 0 D 5 D 0 Writes all memory locatio. Valid when V CC = 4.5V to 5.5V and Disable Register cleared. EWDS 00 00XXXXXXXX 00XXXXXXXX Disables all programming itructio. Functional Description The AT93C86 is accessed via a simple and versatile 3-wire serial communication interface. Device operation is controlled by seven itructio issued by the host processor. A valid itruction starts with a rising edge of and coists of a Start Bit (logic ) followed by the appropriate Op Code and the desired memory address location. READ (READ): The Read (READ) itruction contai the address code for the memory location to be read. After the itruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock. It should be noted that a dummy bit (logic 0 ) precedes the 8- or 6-bit data output string. The AT93C86 supports sequential read operatio. The device will automatically increment the internal address pointer and clock out the next memory location as long as is held high. In this case, the dummy bit (logic 0 ) will not be clocked out between memory locatio, thus allowing for a continuous stream of data to be read. ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) itruction must be executed first before any programming itructio can be carried out. Please note that once in the EWEN state, programming remai enabled until an EWDS itruction is executed or V CC power is removed from the part. ERASE (ERASE): The Erase (ERASE) itruction programs all bits in the specified memory location to the logical state. The self-timed erase cycle starts once the ERASE itruction and address are decoded. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). A logic at pin DO indicates that the selected memory location has been erased, and the part is ready for another itruction. WRITE (WRITE): The Write (WRITE) itruction contai the 8 or 6 bits of data to be written into the specified memory location. The self-timed programming cycle t WP starts after the last bit of data is received at serial data input pin. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). A logic 0 at DO indicates that programming is still in progress. A logic indicates that the memory location at the specified address has been written with the 5

6 data pattern contained in the itruction and the part is ready for further itructio. A READY/BUSY status cannot be obtained if the is brought high after the end of the self-timed programming cycle t WP. ERASE ALL (ERAL): The Erase All (ERAL) itruction programs every bit in the memory array to the logic state and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). The ERAL itruction is valid only at V CC = 5.0V ± 0%. WRITE ALL (WRAL): The Write All (WRAL) itruction programs all memory locatio with the data patter specified in the itruction. The DO pin outputs the READY/BUSY status of the part if is brought high after being kept low for a minimum of (t ). The WRAL itruction is valid only at V CC = 5.0V ± 0%. ERASE/WRITE SABLE (EWDS): To protect agait accidental data disturb, the Erase/Write Disable (EWDS) itruction disables all programming modes and should be executed after all programming operatio. The operation of the READ itruction is independent of both the EWEN and EWDS itructio and can be executed at any time. 6

7 Timing Diagrams Synchronous Data Timing Note:. This is the minimum period. Organization Key for Timing Diagrams AT93C86 (6K) I/O x 8 x 6 A N A 0 A 9 D N D 7 D 5 7

8 READ Timing t High Impedance EWEN Timing t EWDS Timing t

9 WRITE Timing t 0 A N... A0 D N... D0 O HIGH IMPEDANCE BUSY READY t WP WRAL Timing () t D N... D0 O HIGH IMPEDANCE BUSY READY t WP Note:. Valid only at V CC = 4.5V to 5.5V. 9

10 ERASE Timing t CHECK STATUS STANDBY A N- A N-2... A0 A N t SV t DF DO HIGH IMPEDANCE BUSY READY HIGH IMPEDANCE t WP ERAL Timing () t CHECK STATUS STANDBY t SV t DF DO HIGH IMPEDANCE BUSY HIGH IMPEDANCE READY t WP Note:. Valid only at V CC = 4.5V to 5.5V. 0

11 AT93C86 Ordering Information Ordering Code Package Operation Range AT93C86-0PI-2.7 8P3 Industrial AT93C86-0SI-2.7 8S ( 40 C to 85 C) AT93C86-0TI-2.7 8A2 AT93C86-0SJ-2.7 8S Lead-Free/Industrial Temperature ( 40 C to 85 C) AT93C86-0SE-2.7 8S High Grade/Extended Temperature ( 40 C to 25 C) Note: For 2.7V devices used in a 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. Package Type 8P3 8S 8A2 8-lead, 0.300" Wide, Plastic Dual Inline Package (PP) 8-lead, 0.50" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 0.70" Wide, Thin Shrink Small Outline Package (TSSOP) Optio 2.7 Low Voltage (2.7V to 5.5V)

12 Packaging Information 8P3 PP E E N Top View c ea End View D D e A2 A COMMON MENSIONS (Unit of Measure = inches) SYMBOL MIN NOM MAX NOTE A A b b b c b3 4 PL b2 b L D D E E Side View e 0.00 BSC ea BSC 4 L Notes: R. This drawing is for general information only; refer to JEDEC Drawing MS-00, Variation BA for additional information. 2. Dimeio A and L are measured with the package seated in JEDEC seating plane Gauge GS D, D and E dimeio do not include mold Flash or protrusio. Mold Flash or protrusio shall not exceed 0.00 inch. 4. E and ea measured with the leads cotrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease iertion. 6. b2 and b3 maximum dimeio do not include Dambar protrusio. Dambar protrusio shall not exceed 0.00 (0.25 mm) Orchard Parkway San Jose, CA 953 TITLE 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PP) DRAWING NO. 8P3 0/09/02 REV. B 2

13 8S JEDEC SOIC C E E N L Top View End View e B A COMMON MENSIONS (Unit of Measure = mm) D Side View A SYMBOL MIN NOM MAX NOTE A A b C D E E e.27 BSC L Note: These drawings are for general information only. Refer to JEDEC Drawing MS-02, Variation AA for proper dimeio, tolerances, datums, etc. 0/7/03 R 50 E. Cheyenne Mtn. Blvd. Colorado Springs, CO TITLE 8S, 8-lead (0.50" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) DRAWING NO. 8S REV. B 3

14 8A2 TSSOP 3 2 Pin indicator this corner E E L N Top View L End View b e D Side View A2 A COMMON MENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D , 5 E 6.40 BSC E , 5 A.20 A b e 0.65 BSC L L.00 REF Notes:. This drawing is for general information only. Refer to JEDEC Drawing MO-53, Variation AA, for proper dimeio, tolerances, datums, etc. 2. Dimeion D does not include mold Flash, protrusio or gate burrs. Mold Flash, protrusio and gate burrs shall not exceed 0.5 mm (0.006 in) per side. 3. Dimeion E does not include inter-lead Flash or protrusio. Inter-lead Flash and protrusio shall not exceed 0.25 mm (0.00 in) per side. 4. Dimeion b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimeion at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimeion D and E to be determined at Datum Plane H. 5/30/02 R 2325 Orchard Parkway San Jose, CA 953 TITLE 8A2, 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) DRAWING NO. 8A2 REV. B 4

15 Atmel Corporation 2325 Orchard Parkway San Jose, CA 953, USA Tel: (408) Fax: (408) Regional Headquarters Europe Atmel Sarl Route des Arsenaux 4 Case Postale 80 CH-705 Fribourg Switzerland Tel: (4) Fax: (4) Asia Room 29 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) Fax: (852) Japan 9F, Tonetsu Shinkawa Bldg Shinkawa Chuo-ku, Tokyo Japan Tel: (8) Fax: (8) Atmel Operatio Memory 2325 Orchard Parkway San Jose, CA 953, USA Tel: (408) Fax: (408) Microcontrollers 2325 Orchard Parkway San Jose, CA 953, USA Tel: (408) Fax: (408) La Chantrerie BP Nantes Cedex 3, France Tel: (33) Fax: (33) ASIC/ASSP/Smart Cards Zone Industrielle 306 Rousset Cedex, France Tel: (33) Fax: (33) East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: (79) Fax: (79) Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) Fax: (44) RF/Automotive Theresietrasse 2 Postfach Heilbronn, Germany Tel: (49) Fax: (49) East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: (79) Fax: (79) Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP Saint-Egreve Cedex, France Tel: (33) Fax: (33) Literature Requests Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company s standard warranty which is detailed in Atmel s Terms and Conditio located on the Company s web site. The Company assumes no respoibil ity for any errors which may appear in this document, reserves the right to change devices or specificatio detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licees to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel s products are not authorized for use as critical components in life support devices or systems. Atmel Corporation All rights reserved. Atmel and combinatio thereof, are the registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper.

3-wire Serial EEPROM AT93C86. Features. Description. Pin Configurations 8-lead PDIP. 16K (2048 x 8 or 1024 x 16)

3-wire Serial EEPROM AT93C86. Features. Description. Pin Configurations 8-lead PDIP. 16K (2048 x 8 or 1024 x 16) Features Low-voltage and Standard-voltage Operation 2.7 (V CC = 2.7V to 5.5V) User Selectable Internal Organization 6K: 2048 x 8 or 024 x 6 3-wire Serial Interface Sequential Read Operation Schmitt Trigger,