RA CH Segment/Common Driver For Dot Matrix LCD Specification. Version 1.1 December 29, 2009

Transcription

1 RAiO H egment/ommon river For ot Matrix L pecification Version. ecember, RAiO Technology Inc. opyright RAiO Technology Inc. 瑞佑科技 RAiO TEHNOLOGY IN. /

2 Version. H ommon / egment river For OT Matrix L Update History Version ate escription. July, Preliminary version. ecember, Add ection - ie Form and - PA oordinate 瑞佑科技 RAiO TEHNOLOGY IN. /

3 Version. H ommon / egment river For OT Matrix L hapter ontent Page. Introduction.... Features.... Pin onfiguration... - Internal Block iagram... - Pin Assignment ystem Block iagram ignal escription Block escription Pin escription Output Voltage Level ontrol L riving Voltage Application ircuit ata hift irection according to ontrol ignals Usage of ata Pins Electrical haracteristics Maximum Absolute Limit haracteristics A haracteristics Power own Function Operation Timing iagram bit Parallel Mode Interface egment river bit erial Mode Interface egment river ingle-type Interface Mode ommon river ual-type Interface Mode ommon river ommon / egment river Timming (/ uty) Application Information bit Parallel Interface Mode (-h. egment river) bit erial Interface Mode (-h. egment river) ingle-type Interface Mode (-h. ommon river) ual-type Interface Mode (-h. + -h. ommon river) Application ircuit Example.... Package... - Package Information... - ie Form... - PA oordinate... 瑞佑科技 RAiO TEHNOLOGY IN. /

4 Version. H ommon / egment river For OT Matrix L. Introduction The is an channels L driver LI which is fabricated by low power MO high voltage process technology. It can be used either as a OMMON driver or as a EGMENT driver, by connecting its input to V or V. In segment driver mode, it can be interfaced in -bit serial or -bit parallel method by the controller. In common driver mode, dual type mode is applicable. And in segment mode application, the power down function reduces power consumption.. Features Power supply voltage: + 5V± %, + V± Power down function (in segment mode) % Applicable L duty: /6 /56 upply voltage for display: 6 to V (V- Interface VEE) In -EGMENT driver or -OMMON driver selection, to set -pin voltage is V or V -bit parallel / -bit serial data processing (in segment mode) ingle mode / dual mode operation (in common mode) RIVER OM(ascade) EG(ascade) High voltage MO process Available package Type: LQFP- pin, ie. Pin onfiguration - Internal Block iagram V V V -bit -level river V5 VEE M IPFFB Output Level elector LK -bit river -bitata Latch/ommon ata Bi-direction hift Register -I -L -M -R K x -bit egment ata Bi-direction hift Register L L AM lock ontrol ata Latch ontrol Power own Function ERB V V ELB Figure - : Internal Block iagram 瑞佑科技 RAiO TEHNOLOGY IN. /

5 Version. H ommon / egment river For OT Matrix L - Pin Assignment ELB L AM L _I _L _M _R V HL V IPOFFB M V V V V5 VEE ERB RAiO TM LN XX-N MXT ate code (Year ) PIN# Figure - : LQFP- Pin Assignment - ystem Block iagram TN ontroller RA RA RA6 RA5 RA66 TN L Panel Figure - : ystem Block iagram 瑞佑科技 RAiO TEHNOLOGY IN. 5/

6 Version. H ommon / egment river For OT Matrix L. ignal escription - Block escription Name Function OM / EG lock control ata latch control Power down function Output level selector x-bit segment data BI-directional shift register -bit data latch / common data BI-directional shift register -bit level shifter -bit -level driver Generates latch clock (LK), shift clock (K) and control clock timing according to the input of L, L and control inputs (, AM). In common driver application mode, this block generates the shift clock (LK) for the common data Bi-directional shift register. etermines the direction of segment data shift, and input data of each Bi-directional shift register. In -bit segment data parallel transfer mode, data is shifted by a -bit unit. In common driver application mode, data is transferred to the common data shift register directly, which disables this block. ontrols the clock enable state of the current driver according to the input value of enable pin (ELB or ERB). If enable input value is Low, every clock of the current driver is enabled and the clock control block works. But if enable input is High, current driver is disabled and the input data value has no effect on the output level. o power consumption can be lowered. ontrols the output voltage level according to the input control pin (M and IPOFFB) (refer to ection -). tores output data value by shifting the input values. In -bit serial interface mode application, all shift clocks (K) are needed to store all the display data. But in -bit parallel transfer mode application, only clocks are needed. In common driver application mode, this block does not work. In segment driver application mode, the data from the x-bit segment data shift register are latched for segment driver output. In single-type common driver application,-bit input data (from L or R pin) is shifted and latched by the direction according to the HL signal input. In dualtype common application mode, -bit registers are divided by two blocks and controlled independently (refer to ection --). Voltage level shifter block for high voltage part. The inputs of this block are of logical voltage level and the outputs of this block are at high voltage level value. These values are input in to the driver. elects the output voltage level according to M and latched data value. If the data value is "High" the driver output is at selected voltage level (V or V5), and in the reverse case the driver output value is at the nonselected level (V or V). In segment driver application mode, nonselected output value is V or V. and when in common driver application, this value becomes V or V. OM / EG EG EG OM / EG EG OM / EG EG EG 瑞佑科技 RAiO TEHNOLOGY IN. 6/

7 Version. H ommon / egment river For OT Matrix L - Pin escription Pin I/O Name escription Function Interface V Logical "High" input port (+5V ± %, +V ± %) Power V P V (GN) Power supply VEE Logical "Low" for high voltage part L driver Bias supply voltage input to drive the L. Bias voltage V, V, output divided by the resistance is usually used as a supply I V, V5 voltage voltage source (refer to ection --). Power level - L M L IPOFFB AM O I I I I I I L driver output ata shift clock A signal for L driver output ata latch clock isplay OFF control OM / EG mode control Application mode select isplay data output pin which corresponds to the respective latch contents. One of V, V, V and V5 is selected as a display driving voltage source according to the combination of the latched data level and M signal (refer to ection --). lock pulse input for the bi-directional shift register. In segment driver application mode, the data is shifted to x -bit segment data shift. The clock pulse, which was input when the enable bit (ELB/ERB) is in not active condition, is invalid. In common driver application mode, the data is shifted to -bit common data bi-directional shift register by the L clock.hence, this clock pin is not used (Open or connect this pin to V). Alternate signal input pin for L driving. Normal frame inversion signal is input in to this pin. In segment driver application mode, this signal is used for latching the shift register contents at the falling edge of this clock pulse. L pulse "High" level initializes powerdown function block. In common driver application mode, L is used as a shifting clock of common output data. ontrol input pin to fix the driver output (~) to V level,during "Low" value input. L becomes non-selected by V level output from every output of segment drivers and every output of common drivers. When = "Low", is used as an -bit segment driver. When = "High", is set to an -bit common driver According to the input value of the AM and the pin, application mode of is differs as shown below. AM Application mode -bit parallel interface mode. -bit serial interface mode. ingle type application mode ual type application mode OM /EG EG OM L ontroller ontroller ontroller ontroller V/ V V/ V 瑞佑科技 RAiO TEHNOLOGY IN. /

8 Version. H ommon / egment river For OT Matrix L _I, _L, _M, _R. HL ELB,ERB I/O I I/O isplay data input / erial input data / left,right data input output hift direction control Enable data input/output - In segment driver application mode, these pins are used as -bit data input pin (when -bit parallel interface mode : AM = "Low"), or _I is used as serial data input pin and other pins are not used (connect these to V) (when -bit serial interface mode : AM = "High"). In common driver application mode, the data is shifted from _L(_R) to _R(_L), when in single type interface mode (AM = "Low"). In dual type application case, the data are shifted from _L and _M (_R and _M) to _R(_L). In each case the direction of the data shift and the connection of data pins are determined by HL input (refer to ection ). When HL = "Low", data is shifted from left to right. When HL = "High", the direction is reversed. (refer to ection --) In segment driver application mode, the internal operation is enabled only when enable input (ELB or ERB) is Low (power down function). When several drivers are serially connected, the enable state of each driver is shifted according to the HL input. onnect these pins as below. HL egment river ELB ERB L Output Input H Input Output ontroller V/ V - In common driver application mode, power down function is not used. Open these pins. -- Output Voltage Level ontrol Table - M Latched ata IPOFFB Output level ( ) EG Mode OM Mode L L H V (V) V (V) L H H V V5 H L H V (V) V (V) H H H V5 V X X L V V 瑞佑科技 RAiO TEHNOLOGY IN. /

9 Version. H ommon / egment river For OT Matrix L -- L riving Voltage Application ircuit () egment driver application ( = Low ) V V V V R R (n-) R R R V V V V V5 To OM river To OM river V V V5 V EG- EG V,V5 V,V To L Panel election Level Non-selection Level *n = (when /6 duty) to (when /56 duty) VEE Figure - () ommon driver application ( = High ) V V V V V R R (n-) R R R V V V V V5 To EG river V V V5 V EG- EG V,V5 V,V To L Panel election Level Non-selection Level *n = (when /6 duty) to (when /56 duty) VEE Figure - 瑞佑科技 RAiO TEHNOLOGY IN. /

10 Version. H ommon / egment river For OT Matrix L -- ata hift irection according to ontrol ignals () When = Low (egment driver application) AM HL Application Mode ata irection Input Pin L First data hift irection Last data L H -Bit Parallel ata Transfer Mode (EG) First data First data hift irection Last data Last data _I, _L, _M, _R L First data hift irection Last data ( _I) H H -Bit erial ata Transfer Mode (EG) Last data hift irection First data _I 瑞佑科技 RAiO TEHNOLOGY IN. /

11 Version. H ommon / egment river For OT Matrix L () When = High (ommon driver application) AM HL Application Mode ata irection Input Pin L hift irection Input ata ( _L ) Output ata ( _R ) _L L H ingle-type Application Mode (OM) hift irection Output ata ( _L ) Input ata ( _R ) _R L hift irection Output ata ( _R ) Input ata ( _L ) Input ata ( _M ) _L _M H H ual-type Application Mode (OM) hift irection Input ata ( _R ) Output ata ( _L ) Input ata ( _M ) _R _M 瑞佑科技 RAiO TEHNOLOGY IN. /

12 Version. H ommon / egment river For OT Matrix L -- Usage of ata Pins OM /EG ( pin) EG ( =Low) OM ( =High) Application Mode (AM pin) -bit parallel interface mode (AM = Low) -bit serial interface mode (AM = High) single-type application mode (AM = Low) dual-type application mode (AM =High) Table - HL ata Interface Pin _I _L _M _R X (input) (input) (input) (input) X I (input) onnect to V L L (input) R (output) Open Open H L (output) R (input) L L (input) M (input) R (output) Open H L (output) M (input) R (input) 5. Electrical haracteristics 5- Maximum Absolute Limit Table 5- haracteristic ymbol Value Unit Power supply voltage V river supply voltage VL - + V Input voltage VIN -. - V +. Operation temperature TOPR torage temperature TTG NOTE : Voltage greater than above may damage to the circuit. 瑞佑科技 RAiO TEHNOLOGY IN. /

13 Version. H ommon / egment river For OT Matrix L 5- haracteristics () egment river Application (V = V, Ta = - +5 ) haracteristic ymbol Test ondition Min Typ Max Unit Operating voltage Input voltage () Output voltage () Input leakage current () Input leakage current () V. 5.5 VL VIN = V - VEE 6 - VIH -.V - V VIL - -.V VOH IOH = -.ma V VOL IOL =.ma - -. IIL VIN = V to V - - IIL VIN = V to VEE -5-5 On resistance() RON ION = μa - kω ITBY fl = khz M = V V pin - - μa V V μa upply current (5) I fl = khz fm = Hz V = 5V V = V - - ma IEE V = 5V μa NOTE: () Applied to L, L, ELB, ERB, _I - _R, HL, IPOFFB, M,, AM pin () ELB, ERB pin () V, V, V, V5 pin () VL = V - VEE, V = V = 5V, V5= VEE = - V V = V-/n(VL), V = VEE+/n(VL), n = (/56 duty, / bias) (5) V = V, V =.V(V = 5V) or -.6V (V = V), V = -. V(V = 5V) or -.V (V = V), V5 = VEE = -V, no-load condition (/56 duty, / bias) -bit parallel interface mode ITBY :V = 5V, fl = 5.MHz, HL = V, IPOFFB = V, M = V, display data pattern = I : V = V, fl = MHz, display data pattern = V = 5 V, fl = 5.MHz, display data pattern = IEE : V = 5V, fl = 5.MHz, display data pattern =, VEE pin 瑞佑科技 RAiO TEHNOLOGY IN. /

14 Version. H ommon / egment river For OT Matrix L () ommon river Application (V = V, Ta = - +5 ) haracteristic ymbol Test ondition Min Typ Max Unit Operating voltage Input voltage () Output voltage () Input leakage current () Input leakage current () Input leakage current () V VL VIN = V - VEE 6 - VIH -.V - V VIL - -.V VOH IOH = -.ma V VOL IOL =.ma - -. IIL VIN = V to V - - IIL VIN = V, V = 5V (PULL UP) IIL VIN = V to VEE -5-5 On resistance(5) RON ION = μa - kω ITBY fl = khz M = V V pin - - V V μa V = 5V - - upply current (6) I fl = khz fm = Hz V = V - - μa IEE V = 5V NOTE: () Applied to L, _L (HL = LOW), _R (HL = HIGH), HL, IPOFFB, M,, AM pin () Pull-up input pins : L, _I, _M (AM = HIGH), ELB (HL = LOW), ERB (HL = HIGH) () _L (HL = HIGH), _R (HL = LOW) pin () V, V, V, V5 pin (5) VL = V-VEE, V = V = 5V, V5 = VEE = -V V = V-/n(VL), V = VEE+/n(VL), n = (/56 duty, / bias) (6) V = V, V =.5V (V = 5V) or.v (V = V), V = -.5V (V = 5 V) or -.V (V = V), V5 = VEE = - V, no-load condition (/56 duty, / bias) single-type mode operation : AM = V, HL = V, IPOFFB = V _I = _M = V, _R = OPEN, ELB = ERB = OPEN, ITBY : V = 5V, M = V, _L = V I : fm = Hz, _L = V V = V, display data pattern =...,...,...,...,.. V = 5 V, display data pattern =...,...,...,...,.. IEE : fm = Hz, _L = V V = 5V, current through VEE Pin, display data pattern =...,...,...,... 瑞佑科技 RAiO TEHNOLOGY IN. /

15 Version. H ommon / egment river For OT Matrix L 5- A haracteristics () egment river Application haracteristic ymbol Test ondition (V = V, Ta = - +5 ) () V = 5V ±% () V = V ±% Min Typ Max Min Typ Max lock cycle time ty uty = 5% lock pulse width twk lock rise / fall time tr/tf ata set-up time t ata hold time th lock set-up time t lock hold time th Propagation delay time ELB,ERB set-up time IPOFFB low pulse width tphl tpu ELB Output ERB Output 6 5 ELB Input ERB Input twl μs IPOFFB clear time t ns M OUT propagation delay time L OUT propagation delay time IPOFFB OUT propagation delay time tp tp L = 5pF tp Unit ns μs 瑞佑科技 RAiO TEHNOLOGY IN. 5/

16 Version. H ommon / egment river For OT Matrix L ()ommon river Application haracteristic ymbol Test ondition (V = V, Ta = - +5 ) () V = 5V ±% () V = V ±% Min Typ Max Min Typ Max lock cycle time ty uty = 5% lock pulse width twk lock rise / fall time tr/tf ata set-up time t ata hold time th IPOFFB low pulse width twl μs IPOFFB clear time t ns Output delay time tl 5 M OUT propagation delay time L OUT propagation delay time IPOFFB OUT propagation delay time tp L = 5pF tp tp Unit ns μs 瑞佑科技 RAiO TEHNOLOGY IN. 6/

17 Version. H ommon / egment river For OT Matrix L () egment river Application Timing L. V. V t WK. V. V t L. V. V t WK t WK t H. V. V t R t F t Y t t H _I -_R. V. V IPFFB t WL t L L ELB, ERB (Output ). V t PHL. V. V ELB, ERB (Intput ) M. V. V t P. V t PU L. V t P IPFFB. V. V t P - (Latched ata) Figure 5- 瑞佑科技 RAiO TEHNOLOGY IN. /

18 Version. H ommon / egment river For OT Matrix L () ommon river Application Timing t Y L. V. V t WKH. V. V t R t F t F t t H (*)I. V. V (*)O t L. V. V IPFFB t WL t (*) When in single-type interface mode I=>_L (HL=L), _R (HL=H) O=>_R (HL=L), _L (HL=H) When in dual-type interface mode I=>_L and _M (HL=L), _R and _M (HL=H) O=>_R (HL=L), _L (HL=H) M. V. V t P L. V t P IPFFB - (Latched ata). V. V t P Figure 5- 瑞佑科技 RAiO TEHNOLOGY IN. /

19 Version. H ommon / egment river For OT Matrix L 5- Power own Function In the case of cascade connection of segment mode drivers, has a "power down function" in order to reduce the power consumption. HL Enable Input Enable Output urrent river tatus The Other rivers tatus L ERB ELB While ERB =Low, current driver is enabled. isabled H ELB ERB While ELB =Low, current driver is enabled. isabled * In the case of common driver application, power down function does not work. L n - n n - n n - n n - n n - L ELB (Input) ERB/ELB (Output /Input ) ERB/ELB (Output /Input ) ERB/ELB (Output /Input ) ELB (Output ) Note :.HL=High (ELB=Input, ERB=Output) urrent s ERB must be connected to the next s ELB.When in -bit parallel interface mode : n= When in -bit serial interface mode : n= Figure 5- 瑞佑科技 RAiO TEHNOLOGY IN. /

20 Version. H ommon / egment river For OT Matrix L 5-5 Operation Timing iagram bit Parallel Mode Interface egment river When HL = Low L _I _L 6 6 _M 5 5 _R 6 6 ERB (Input) ELB (Output) L - Figure 5- When HL = High L _I 6 6 _L 5 5 _M 6 6 _R 5 5 ERB (Input) ELB (Output) L - Figure 5-5 瑞佑科技 RAiO TEHNOLOGY IN. /

21 Version. H ommon / egment river For OT Matrix L bit erial Mode Interface egment river When HL = Low L _I ERB (Input) ELB (Output) L - Figure 5-6 When HL = High L _I ERB (Input) ELB (Output) L - Figure 5- 瑞佑科技 RAiO TEHNOLOGY IN. /

22 Version. H ommon / egment river For OT Matrix L 5-5- ingle-type Interface Mode ommon river When HL = Low L _L _R OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA ommon area of current driver Figure 5- When HL = High L _R _L OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA ommon area of current driver Figure 5- 瑞佑科技 RAiO TEHNOLOGY IN. /

23 Version. H ommon / egment river For OT Matrix L 5-5- ual-type Interface Mode ommon river When HL = Low L _L _M _R OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA Figure 5- When HL = High L _L _M _R OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA OM_ATA Figure 5- 瑞佑科技 RAiO TEHNOLOGY IN. /

24 Version. H ommon / egment river For OT Matrix L ommon / egment river Timming (/ uty) Figure 5- 瑞佑科技 RAiO TEHNOLOGY IN. /

25 Version. H ommon / egment river For OT Matrix L 6. Application Information 6- -bit Parallel Interface Mode (-h. egment river) () Lower View (HL = L, AM = L ) Figure 6- () Upper View (HL = H, AM = L) Figure 6- 瑞佑科技 RAiO TEHNOLOGY IN. 5/

26 Version. H ommon / egment river For OT Matrix L 6- -bit erial Interface Mode (-h. egment river) () Lower View (HL = L, AM = L ) Figure 6- () Upper View (HL = H, AM = H) Figure 6- 瑞佑科技 RAiO TEHNOLOGY IN. 6/

27 Version. H ommon / egment river For OT Matrix L 6- ingle-type Interface Mode (-h. ommon river) Figure 6-5 瑞佑科技 RAiO TEHNOLOGY IN. /

28 Version. H ommon / egment river For OT Matrix L 6- ual-type Interface Mode (-h. + -h. ommon river) Figure 6-6 NOTE: Using this application mode (dual-type common mode), the duty ratio can be reduced to half. In case, / duty can be used to drive the common L panel. 瑞佑科技 RAiO TEHNOLOGY IN. /

29 Version. H ommon / egment river For OT Matrix L 6-5 Application ircuit Example V OM /EG R V OM R V EG V-V5 IPOFF _I-_R L V-V5 IPOFF _I-_R L V-V5 IPOFF _I-_R L (n-)r R V V EG OM M ELB AM L ERB M ELB AM L ERB M ELB AM L ERB R V5 OM /EG HL HL HL V VEE EG-EG EG-EG EG-EG M IPOFF _R 6 6 AM HL V-V5 L _L OM- OM M IPOFF _R RAiO TN ontroller AM HL V-V5 M IPOFF L _L _R OM- OM 6 6 X L MOULE IPOFFB FRAME(M) OM_ATA - L L AM HL V-V5 L _L OM- OM Figure 6- : Application ircuit Figure 6- : RA66 with Application ircuit 瑞佑科技 RAiO TEHNOLOGY IN. /

30 Version. H ommon / egment river For OT Matrix L Figure 6- : RA5 with Application ircuit Figure 6- : RA6 with Application ircuit 瑞佑科技 RAiO TEHNOLOGY IN. /

31 Version. H ommon / egment river For OT Matrix L. Package - Package Information Figure - 瑞佑科技 RAiO TEHNOLOGY IN. /

32 Version. H ommon / egment river For OT Matrix L - ie Form (, ) Pad No ERB VEE V5 V V V M OPOFFB V HL V _R _M _L _I L AM L ELB Figure - NOTE:ie ize=56.6*5.6um Table - ie ize Pad ize Pad ize 56.6*5.6um Pad #~# : *5um Pad #, #~# : 6*5um Table - Parts Number Package LN ie LQFP- pin 瑞佑科技 RAiO TEHNOLOGY IN. /

33 Version. H ommon / egment river For OT Matrix L - PA oordinate Pad.No Pad Name X-axis Y-axis Pad.No Pad Name X-axis Y-axis ERB VEE V V V V M IPOFFB V HL V _R _M _L _I L AM L ELB 瑞佑科技 RAiO TEHNOLOGY IN. /

34 Version. H ommon / egment river For OT Matrix L Pad.No Pad Name X-axis Y-axis 瑞佑科技 RAiO TEHNOLOGY IN. /