Advance Information. Current Accuracy Conditions

Transcription

1 Macroblock Advance Information MBI5025 Features MBI5025CN/CNS MBI5016CNS 16 constant-current output channels Constant output current invariant to load voltage change: Constant output current range: 3-50 ma Excellent output current accuracy: between channels: ±3% (max.), and between ICs: ±6% (max.) Output current adjusted through an external resistor Fast response of output current, (min.): 400 ns 25MHz clock frequency Schmitt trigger input 3.3V / 5V supply voltage CN: P-DIP CNS: SDIP MBI5025CD/CF MBI5016CF CD: SOP CF: SOP MBI5016CP MBI5025CP SSOP24-P Between Channels Current Accuracy Between ICs Conditions < ±3% < ±6% I OUT = 3 ma ~ 35 ma Product Description MBI5025 is designed for LED displays. As an enhancement of its predecessor, MBI5016, MBI5025 exploits PrecisionDrive technology to enhance its output characteristics. MBI5025 contains a serial buffer and data latches which convert serial input data into parallel output format. At MBI5025 output stage, sixteen regulated current ports are designed to provide uniform and constant current sinks for driving LEDs within a large range of Vf variations. MBI5025 provides users with great flexibility and device performance while using MBI5025 in their system design for LED display applications, e.g. LED panels. Users may adjust the output current from 3 ma to 35 ma through an external resistor, R ext, which gives users flexibility in controlling the light intensity of LEDs. MBI5025 guarantees to endure maximum 17V at the output port. The high clock frequency, 25 MHz, also satisfies the system requirements of high volume data transmission. Macroblock, Inc Floor 6-4, No.18, Pu-Ting Rd., Hsinchu, Taiwan 30077, ROC. TEL: , FAX: info@mblock.com.tw - 1 -

2 Block Diagram OUT0 OUT 1 OUT14 OUT15 R-EXT I O Regulator VDD 16-bit Output Driver 16 LE 16-bit Output Latch GND 16 SDI 16-bit Shift Register CLK Terminal Description Pin Configuration Pin No. Pin Name Function 1 GND Ground terminal for control logic and current sink 2 SDI Serial-data input to the shift register 3 CLK 4 LE Clock input terminal for data shift on rising edge Data strobe input terminal Serial data is transferred to the output latch when LE is high. The data is latched when LE goes low. GND SDI CLK LE OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT VDD R-EXT OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 5~20 OUT0 ~ OUT15 Constant current output terminals Output enable terminal R-EXT When (active) low, the output drivers are enabled; when high, all output drivers are turned OFF (blanked). Serial-data output to the following SDI of next driver IC Input terminal used to connect an external resistor for setting up output current for all output channels 24 VDD 3.5V / 5V supply voltage terminal - 2 -

3 Equivalent Circuits of Inputs and Outputs terminal LE terminal VDD VDD IN IN CLK, SDI terminal VDD terminal VDD IN OUT - 3 -

4 Timing Diagram CLK N = SDI LE OUT0 OUT 1 OUT2 OUT3 OFF ON OFF ON OFF ON OFF ON OUT15 OFF ON : don t care Truth Table CLK LE SDI OUT0 OUT 7 OUT15 H L D n D n.. D n - 7. D n - 15 D n-15 L L D n+1 No Change D n-14 H L D n+2 D n + 2. D n - 5. D n - 13 D n-13 X L D n+3 D n + 2. D n - 5. D n - 13 D n-13 X H D n+3 Off D n

5 Maximum Ratings Characteristic Symbol Rating Unit Supply Voltage V DD 0~7.0 V Input Voltage V IN -0.4~V DD V Output Current I OUT +50 ma Output Voltage V DS -0.5~+20.0 V Clock Frequency F CLK 25 MHz GND Terminal Current I GND 1440 ma Operating Temperature T opr -40~+85 C Storage Temperature T stg -55~+150 C Thermal Resistance (On PCB, Ta=25 C) CN type CNS type CD type CF type CP type R th(j-a) C/W - 5 -

6 Recommended Operating Conditions Characteristic Symbol Condition Min. Typ. Max. Unit Supply Voltage V DD V Output Voltage V DS OUT0 ~ OUT V I OUT DC Test Circuit 3-35 ma Output Current I OH ma I OL ma Input Voltage V IH CLK,, LE and SDI 0.8V DD - V DD +0.3 V V IL CLK,, LE and SDI V DD V LE Pulse Width t w(l) ns CLK Pulse Width t w(clk) ns Pulse Width t w() ns V DD =4.5~5.5V Setup Time for SDI t su(d) ns Hold Time for SDI t h(d) ns Setup Time for LE t su(l) ns Hold Time for LE t h(l) ns Clock Frequency F CLK Cascade Operation MHz - 6 -

7 Electrical Characteristics Characteristic Symbol Condition Min. Typ. Max. Unit Input Voltage H level V IH Ta = -40~85ºC 0.8V DD - V DD V L level V IL Ta = -40~85ºC GND - 0.3V DD V Output Leakage Current I OH V OH =17.0V μa Output Voltage V OL I OL =+1.0mA V V OH I OH =-1.0mA V Output Current 1 I OUT1 V DS =0.5V R ext =1260 Ω ma Current Skew di OUT1 I OL =15mA V DS =0.5V R ext =1260 Ω - ±1 ±3 % Output Current 2 I OUT2 V DS =0.8V R ext =620 Ω ma Current Skew di OUT2 I OL =30mA V DS =0.8V R ext =620 Ω - ±1 ±3 % Output Current vs. Output Voltage Regulation Output Current vs. Supply Voltage Regulation %/dv DS V DS within 1.0V and 3.0V - ±0.1 - % / V %/dv DD V DD within 4.5V and 5.5V - ±1 - % / V Pull-up Resistor R IN (up) KΩ Pull-down Resistor R IN (down) LE KΩ Supply Current OFF ON Test Circuit for Electrical Characteristics I DD (off) 1 R ext =Open, OUT0 ~ OUT15 =Off I DD (off) 2 R ext =1260 Ω, OUT0 ~ OUT15 =Off I DD (off) 3 R ext =620 Ω, OUT0 ~ OUT15 =Off I DD (on) 1 R ext =1260 Ω, OUT0 ~ OUT15 =On I DD (on) 2 R ext =620 Ω, OUT0 ~ OUT15 =On ma I DD I IH,IIL CLK V DD. OUT0 I OUT LE OUT15 V IH,VIL SDI R - EXT GND I ref - 7 -

8 Switching Characteristics Characteristic Symbol Condition Min. Typ. Max. Unit Propagation Delay Time ( L to H ) Propagation Delay Time ( H to L ) Pulse Width CLK - OUTn t plh ns LE - OUTn t plh ns - OUTn t plh ns CLK - t plh ns CLK - OUTn t phl1 V DD =5.0 V V DS =0.8 V ns LE - OUTn t phl2 V IH =V DD ns V IL =GND - OUTn t phl3 R ns ext =300 Ω CLK - t V L =4.0 V phl ns R L =52 Ω CLK t w(clk) C L =10 pf ns LE t w(l) ns t w() ns Hold Time for LE t h(l) ns Setup Time for LE t su(l) ns Maximum CLK Rise Time t r ** ns Maximum CLK Fall Time t f ** ns Output Rise Time of Iout t or ns Output Fall Time of Iout t of ns If the devices are connected in cascade and t r or t f is large, it may be critical to achieve the timing required for data transfer between two cascaded devices. Test Circuit for Switching Characteristics I DD VIH = 5V Function Generator Logic input waveform V IH,VIL CLK LE SDI I ref V DD. OUT0 OUT15 R - EXT GND C L I OUT R L C L V L VIL = 0V t r = tf = 10 ns - 8 -

9 Timing Waveform t W(CLK) CLK t su(d) t h(d) SDI t plh, t phl t W(L) LE t h(l) t su(l) LOW = OUTPUTS ENABLED HIGH = OUTPUT OFF OUTn t plh1, t phl1 t plh2, t phl2 LOW = OUTPUT ON t W() t phl3 t plh3 OUTn 90% 90% 10% 10% t of t or - 9 -

10 Application Information Constant Current To design LED displays, MBI5025 provides nearly no variations in current from channel to channel and from IC to IC. This can be achieved by: 1) The maximum current variation between channels is less than ±3%, and that between ICs is less than ±6%. 2) In addition, the current characteristic of output stage is flat and users can refer to the figure as shown below. The output current can be kept constant regardless of the variations of LED forward voltages (Vf). This performs as a perfection of load regulation. Adjusting Output Current The output current of each channel (I OUT ) is set by an external resistor, R ext. The relationship between I out and R ext is shown in the following figure Iout (ma) Rext (Ω) V DS = 1.0V Resistance of the external resistor, R ext, in Ω Also, the output current can be calculated from the equation: V R-EXT = 1.26V;I OUT = (V R-EXT / R ext ) x 15 where R ext is the resistance of the external resistor connected to R-EXT terminal and V R-EXT is the voltage of R-EXT terminal. The magnitude of current (as a function of R ext ) is around 30mA at 620Ω and 15mA at 1260Ω

11 Package Power Dissipation (PD) The maximum allowable package power dissipation is determined as P D (max) = (Tj Ta) / R th(j-a). When 16 output channels are turned on simultaneously, the actual package power dissipation is P D (act) = (I DD x V DD ) + (I OUT x Duty x V DS x 16). Therefore, to keep P D (act) P D (max), the allowable maximum output current as a function of duty cycle is: I OUT = { [ (Tj Ta) / R th(j-a) ] (I DD x V DD ) } / V DS / Duty / 16, where Tj = 150 C. Load Supply Voltage (V LED ) MBI5025 are designed to operate with V DS ranging from 0.4V to 0.8V (I OUT =5~35mA) considering the package power dissipating limits. V DS may be higher enough to make P D(act) > P D(max) when V LED = 5V and V DS = V LED Vf, in which V LED is the load supply voltage. In this case, it is recommended to use the lowest possible supply voltage or to set an external voltage reducer, V DROP. A voltage reducer lets V DS = (V LED Vf) V DROP. Resistors or Zener diode can be used in the applications as shown in the following figures. V LED V LED V DROP V DROP Vf Vf V DS V DS MBI5025 MBI

12 Package Outline MBI5025CNS Outline Drawing MBI5025CD Outline Drawing

13 MBI5025CF Outline Drawing MBI5025CP Outline Drawing