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1 Features Macroblock Datasheet 16 constant-current output channels Constant output current invariant to load voltage change Excellent output current accuracy: between channels: <±3% (max.), and between ICs: <±6% (max.) Output current adjusted through an external resistor Constant output current range: 5-9 ma Fast response of output current, (min.): 2 ns 25MHz clock frequency Schmitt trigger input 5V supply voltage Optional for Pb-free & Green Package MBI526 Dual In-Line Package MBI516CNS CN: P-DIP GN: P-DIP CNS: SP-DIP GNS: SP-DIP Small Outline I516CF Package CD: SOP GD: SOP Current Accuracy Between Channels Between ICs Conditions CF: SOP GF: SOP < ±3% < ±6% I OUT = 1 ~ 6 ma Shrink BI516CP SOP CP\CPA: SSOP GP\GPA: SSOP Product Description MBI526 is designed for D displays. As an enhancement of its predecessor, MBI516, MBI526 exploits PrecisionDrive technology to enhance its output characteristics. MBI526 contains a serial buffer and data latches which convert serial input data into parallel output format. At MBI526 output stage, sixteen regulated current ports are designed to provide uniform and constant current sinks for driving Ds within a large range of V F variations. MBI526 provides users with great flexibility and device performance while using MBI526 in their system design for D display applications, e.g. D panels. Users may adjust the output current from 5 ma to 9 ma through an external resistor, R ext, which gives users flexibility in controlling the light intensity of Ds. MBI526 guarantees to endure maximum 17V at the output port. The high clock frequency, 25 MHz, also satisfies the system requirements of high volume data transmission. Macroblock, Inc. 25 Floor 6-4, No.18, Pu-Ting Rd., Hsinchu, Taiwan 377, ROC. TEL: , FAX: info@mblock.com.tw - 1 -
2 Block Diagram OUT OUT1 OUT14 OUT15 R-EXT I O Regulator 16-bit Output Driver bit Output Latch GND bit Shift Register Terminal Description Pin Configuration Pin Name GND Function Ground terminal for control logic and current sink Serial-data input to the shift register Clock input terminal for data shift on rising edge Data strobe input terminal Serial data is transferred to the output latch when is high. The data is latched when goes low. OUT ~ OUT15 Constant current output terminals R-EXT Output enable terminal When (active) low, the output drivers are enabled; when high, all output drivers are turned OFF (blanked). Serial-data output to the following of next driver IC Input terminal used to connect an external resistor for setting up output current for all output channels 5V supply voltage terminal GND OUT OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT14 OUT15 R-EXT GND OUT OUT R-EXT OUT15 OUT14 OUT13 OUT12 OUT11 OUT1 OUT9 OUT8 MBI526CN\CNS\CD\CF\CP\ GN\GNS\GD\GF\GP OUT13 OUT12 OUT11 OUT1 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 MBI526CPA\GPA - 2 -
3 Equivalent Circuits of Inputs and Outputs terminal terminal IN IN, terminal terminal IN OUT - 3 -
4 Timing Diagram N = OUT OUT 1 OUT2 OUT3 OFF ON OFF ON OFF ON OFF ON OUT15 OFF ON : don t care Truth Table OUT OUT 7 OUT 15 H L D n D n.. D n - 7. D n - 15 D n-15 L L D n+1 No Change D n-14 H L D n+2 D n + 2. D n - 5. D n - 13 D n-13 X L D n+3 D n + 2. D n - 5. D n - 13 D n-13 X H D n+3 Off D n
5 Maximum Ratings Characteristic Symbol Rating Unit Supply Voltage V DD ~7. V Input Voltage V IN -.4~V DD +.4 V Output Current I OUT +9 ma Output Voltage V DS -.5~+17. V Clock Frequency F 25 MHz GND Terminal Current I GND 144 ma Power Dissipation (On PCB, Ta=25 C) Thermal Resistance (On PCB, Ta=25 C) CN GN CNS GNS CD GD CF GF CP GP CPA GPA P D CN GN CNS GNS CD GD CF GF CP GP CPA GPA R th(j-a) Operating Temperature T opr -4~+85 C Storage Temperature T stg -55~+15 C W C/W - 5 -
6 Electrical Characteristics Characteristic Symbol Condition Min. Typ. Max. Unit Supply Voltage V DD V Output Voltage V DS OUT ~ OUT V I OUT DC Test Circuit 5-9 ma Output Current I OH ma I OL ma Input Voltage H level V IH Ta = -4~85ºC.8*V DD - V DD V L level V IL Ta = -4~85ºC GND -.3*V DD V Output Leakage Current I OH V OH =17.V µa Output Voltage V OL I OL =+1.mA V V OH I OH =-1.mA V Output Current 1 I OUT1 V DS =.6V R ext =72 Ω ma Current Skew di OUT1 I OL =26.25mA V DS =.6V R ext =72 Ω - ±1 ±3 % Output Current 2 I OUT2 V DS =.8V R ext =36 Ω ma Current Skew Output Current vs. Output Voltage Regulation Output Current vs. Supply Voltage Regulation di OUT2 I OL =52.5mA V DS =.8V R ext =36 Ω - ±1 ±3 % %/dv DS V DS within 1.V and 3.V - ±.1 - % / V %/dv DD V DD within 4.5V and 5.5V - ±1 - % / V Pull-up Resistor R IN (up) KΩ Pull-down Resistor R IN (down) KΩ Supply Current OFF ON Test Circuit for Electrical Characteristics I DD (off) 1 R ext =Open, OUT ~ OUT15 =Off I DD (off) 2 R ext =72 Ω, OUT ~ OUT15 =Off I DD (off) 3 R ext =36 Ω, OUT ~ OUT15 =Off I DD (on) 1 R ext =72 Ω, OUT ~ OUT15 =On I DD (on) 2 R ext =36 Ω, OUT ~ OUT15 =On ma I DD I IH,IIL V DD. OUT IOUT OUT15 V IH, VIL R - EXT GND I ref - 6 -
7 Switching Characteristics Propagation Delay Time ( L to H ) Propagation Delay Time ( H to L ) Pulse Width Characteristic Symbol Condition Min. Typ. Max. Unit - OUTn t plh ns - OUTn t plh ns - OUTn t plh ns - t plh ns - OUTn t phl1 V DD =5. V V DS =.8 V ns - OUTn t phl2 V IH =V DD ns V IL =GND - OUTn t phl3 R ns ext =3 Ω - t V L =4. V phl ns R L =52 Ω t w() C L =1 pf ns t w(l) ns t w() ns Hold Time for t h(l) ns Setup Time for t su(l) ns Hold Time for t h(d) ns Setup Time for t su(d) ns Clock Frequency F Cascade Operation MHz Maximum Rise Time t r ** ns Maximum Fall Time t f ** ns Output Rise Time of Vout (turn off) t or ns Output Fall Time of Vout (turn on) t of ns **If the devices are connected in cascade and t r or t f is large, it may be critical to achieve the timing required for data transfer between two cascaded devices. Test Circuit for Switching Characteristics I DD VIH = 5V Function Generator Logic input waveform V IH, VIL I ref R - EXT GND. OUT OUT15 IOUT RL CL CL VL VIL = V t r = tf = 1 ns - 7 -
8 Timing Waveform t W() t su(d) t h(d) t plh, t phl t W(L) t h(l) t su(l) LOW = OUTPUTS ENABD HIGH = OUTPUT OFF OUTn t plh1, t phl1 t plh2, t phl2 LOW = OUTPUT ON t W() t phl3 t plh3 OUTn 9% 9% 1% 1% t of t or - 8 -
9 Application Information Constant Current In D display application, MBI526 provides nearly no variations in current from channel to channel and from IC to IC. This can be achieved by: 1) The maximum current variation between channels is less than ±3%, and that between ICs is less than ±6%. 2) In addition, the current characteristic of output stage is flat and users can refer to the figure as shown below. The output current can be kept constant regardless of the variations of D forward voltages (V F ). This performs as a perfection of load regulation Iout (ma) V DS (V) Adjusting Output Current The output current of each channel (I OUT ) is set by an external resistor, R ext. The relationship between I out and R ext is shown in the following figure. I OUT (ma) V DS = 1.V Rext Resistance of the external resistor, R ext, in Ω Also, the output current can be calculated from the equation: V R-EXT = 1.26V;I OUT = (V R-EXT / R ext ) x 15 where R ext is the resistance of the external resistor connected to R-EXT terminal and V R-EXT is the voltage of R-EXT terminal. The magnitude of current (as a function of R ext ) is around 52.5mA at 36Ω and 26.25mA at 72Ω
10 Soldering Process of Pb-free & Green Package Plating* Macroblock has defines "Pb-Free & Green" to mean semiconductor products that are compatible with the current RoHS requirements and selected 1% pure tin (Sn) to provide forward and backward compatibility with both the current industry-standard SnPb-based soldering processes and higher-temperature Pb-free processes. Pure tin is widely accepted by customers and suppliers of electronic devices in Europe, Asia and the US as the lead-free surface finish of choice to replace tin-lead. Also, it is backward compatible to standard 215ºC to 24ºC reflow processes which adopt tin/lead (SnPb) solder paste. However, in the whole Pb-free soldering processes and materials, 1% pure tin (Sn), will all require up to 26 o C for proper soldering on boards, referring to J-STD-2B as shown below. Temperature ( ) ± Average ramp-up rate=.7 /s 3s max Ramp-down 6 /s (max) 15 1s max 1 Peak Temperature 245 ~26 < 1s 5 Average ramp-up rate =.4 /s Average ramp-up rate= 3.3 /s Maximum peak temperature Recommended reflow profile Acc.J-STD-2B Time (sec) *Note1: For details, please refer to Macroblock s Policy on Pb-free & Green Package
11 Package Power Dissipation (P D ) The maximum allowable package power dissipation is determined as P D (max) = (Tj Ta) / R th(j-a). When 16 output channels are turned on simultaneously, the actual package power dissipation is P D (act) = (I DD x V DD ) + (I OUT x Duty x V DS x 16). Therefore, to keep P D (act) P D (max), the allowable maximum output current as a function of duty cycle is: I OUT = { [ (Tj Ta) / R th(j-a) ] (I DD x V DD ) } / V DS / Duty / 16, where Tj = 15 C. Iout(mA) Iout vs. Duty Cycle at Rth = ( C/W) Iout(mA) Iout vs. Duty Cycle at Rth = 59.1 ( C/W) % 1% 15% 2% 25% 3% 35% 4% 45% 55% 6% Duty Cycle 65% 7% 75% 8% 85% 9% 95% 1% 5% 1% 15% 2% 25% 3% 35% 4% 45% 55% 6% Duty Cycle 65% 7% 75% 8% 85% 9% 95% 1% CN\GN type package CF\GF type package Iout(mA) Iout(mA) Iout vs. Duty Cycle at at Rth Rth = = ( C/W) ( C/W) 5% 1% 5% 15% 1% 2% 15% 25% 2% 3% 25% 35% 3% 4% 35% 45% 4% 45% 55% 6% 55% 65% 6% 7% 65% 7% 75% 75% 8% 8% 85% 85% 9% 9% 95% 95% 1% 1% Duty Cycle Duty Cycle CNS\GNS type package Iout(mA) Iout vs. Duty Cycle at Rth = ( C/W) 5% 1% 15% 2% 25% 3% 35% 4% 45% 55% 6% 65% 7% 75% 8% 85% 9% 95% 1% Duty Cycle CP\CPA\GP\GPA type package Iout vs. Duty Cycle at Rth = ( C/W) 1 Iout(mA) % 1% 15% 2% 25% 3% 35% 4% 45% 55% 6% 65% 7% 75% 8% 85% 9% 95% 1% Condition : I out = 9mA,V DS = 1.V,16 output channels active Device Type R th(j-a) ( C/W) Note CN GN CNS GNS CD GD CF GF CP\CPA GP\GPA Ta = 25 Ta = 55 Ta = 85 Duty Cycle CD\GD type package
12 The maximum power dissipation, P D (max) = (Tj Ta) / R th(j-a), decreases as the ambient temperature increases. Max. Power Dissipation at Various Ambient Temperature Power Dissipation CN\GN Type: Rth= CNS\GNS Type: Rth= CD\GD Type: Rth= CF\GF Type: Rth= 59.1 CP\GP Type: Rth= CPA\GPA Type: Rth= Ambient Temperature Load Supply Voltage (V D ) MBI526 are designed to operate with V DS ranging from.4v to 1.V considering the package power dissipating limits. V DS may be higher enough to make P D(act) > P D(max) when V D = 5V and V DS = V D V F, in which V D is the load supply voltage. In this case, it is recommended to use the lowest possible supply voltage or to set an external voltage reducer, V DROP. A voltage reducer lets V DS = (V D V F ) V DROP. Resistors or Zener diode can be used in the applications as shown in the following figures. Voltage Supply Voltage Supply V D V Drop V Drop V D V F V DS V F V DS MBI526 MBI526 Switching Noise Reduction D driver ICs are frequently used in switch-mode applications which always behave with switching noise due to the parasitic inductance on PCB. To eliminate switching noise, refer to Application Note for 8-bit and 16-bit D Drivers- Overshoot
13 Package Outline MBI526CN\GN Outline Drawing MBI526CNS\GNS Outline Drawing
14 MBI526CD\GD Outline Drawing MBI526CF\GF Outline Drawing
15 MBI526CP\CPA\GP\GPA Outline Drawing Note: The unit for the outline drawing is mm. Product Top-mark Information The first row of printing MBIXXXX Or MBIXXXX Part number ID number The second row of printing XXXXXXXX Product No. Package Code Process Code C: General type G: Green and Pb-free Manufacture Code Device Version Code Product Revision History Datasheet version Device version code VA. Not defined VA.1 A VA.2 A Product Ordering Information Part Number Package Type Weight (g) Part Number Pb-free & Green Weight (g) Package Type MBI526CN P-DIP MBI526GN P-DIP MBI526CNS SP-DIP MBI526GNS SP-DIP MBI526CD SOP MBI526GD SOP MBI526CF SOP MBI526GF SOP MBI526CP SSOP MBI526GP SSOP MBI526CPA SSOP MBI526GPA SSOP
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