Datasheet. Conditions

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1 Features Macroblock Datasheet 16 constant-current output channels Constant output current invariant to load voltage change Excellent output current accuracy: between channels: <±3% (max.), and between ICs: <±6% (max.) Output current adjusted through an external resistor Constant output current range: 5-90 ma Fast response of output current, (min.): 200 ns 25MHz clock frequency Schmitt trigger input 5V supply voltage Optional for RoHS-Compliant Packages Dual In-Line Package MBI5016CNS GN: P-DIP GNS: SP-DIP Small Outline Package I5016CF GD: SOP GF: SOP Current Accuracy Between Channels Between ICs Conditions Shrink SOP BI5016CP < ±3% < ±6% I OUT = 10 ~ 60 ma GP: SSOP GPA: SSOP Product Description is designed for LED displays. As an enhancement of its predecessor, MBI5016, exploits PrecisionDrive technology to enhance its output characteristics. contains a serial buffer and data latches which convert serial input data into parallel output format. At output stage, sixteen regulated current ports are designed to provide uniform and constant current sinks for driving LEDs within a large range of V F variations. provides users with great flexibility and device performance while using in their system design for LED display applications, e.g. LED panels. Users may adjust the output current from 5 ma to 90 ma through an external resistor, R ext, which gives users flexibility in controlling the light intensity of LEDs. guarantees to endure maximum 17V at the output port. The high clock frequency, 25 MHz, also satisfies the system requirements of high volume data transmission. Macroblock, Inc Floor 6-4, No.18, Pu-Ting Rd., Hsinchu, Taiwan 30077, ROC. TEL: , FAX: info@mblock.com.tw - 1 -

2 Block Diagram OUT0 OUT1 OUT14 OUT15 R-EXT I O Regulator 16-bit Output Driver 16 LE 16-bit Output Latch GND 16 SDI CLK 16-bit Shift Register Terminal Description Pin Configuration Pin Name GND SDI CLK LE Function Ground terminal for control logic and current sink Serial-data input to the shift register Clock input terminal for data shift on rising edge Data strobe input terminal Serial data is transferred to the output latch when LE is high. The data is latched when LE goes low. OUT0 ~ OUT15 Constant current output terminals GND SDI CLK LE OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT R-EXT OUT15 OUT14 OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 GN\GNS\GD\GF\GP R-EXT Output enable terminal When (active) low, the output drivers are enabled; when high, all output drivers are turned OFF (blanked). Serial-data output to the following SDI of next driver IC Input terminal used to connect an external resistor for setting up output current for all output channels 5V supply voltage terminal OUT14 OUT15 R-EXT GND SDI CLK LE OUT0 OUT GPA OUT13 OUT12 OUT11 OUT10 OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2-2 -

3 Equivalent Circuits of Inputs and Outputs terminal LE terminal IN IN CLK, SDI terminal terminal IN OUT - 3 -

4 Timing Diagram CLK N = SDI LE OUT0 OUT1 OUT2 OUT3 OFF ON OFF ON OFF ON OFF ON OUT15 OFF ON : don t care Truth Table CLK LE SDI OUT 0 OUT 7 OUT 15 H L D n D n.. D n - 7. D n - 15 D n-15 L L D n+1 No Change D n-14 H L D n+2 D n + 2. D n - 5. D n - 13 D n-13 X L D n+3 D n + 2. D n - 5. D n - 13 D n-13 X H D n+3 Off D n

5 Maximum Ratings Characteristic Symbol Rating Unit Supply Voltage V DD 0~7.0 V Input Voltage V IN -0.4~V DD V Output Current I OUT +90 ma Output Voltage V DS -0.5~+17.0 V Clock Frequency F CLK 25 MHz GND Terminal Current I GND 1440 ma Power Dissipation (On PCB, Ta=25 C) Thermal Resistance (On PCB, Ta=25 C) GN P D 2.00 GNS 1.61 GD 2.19 GF 1.91 GP 1.46 GPA 1.46 GN R th(j-a) 49.9 GNS GD GF GP GPA Operating Temperature T opr -40~+85 C Storage Temperature T stg -55~+150 C W C/W - 5 -

6 Electrical Characteristics Characteristic Symbol Condition Min. Typ. Max. Unit Supply Voltage V DD V Output Voltage V DS OUT0 ~ OUT V I OUT DC Test Circuit 5-90 ma Output Current I OH ma I OL ma Input Voltage H level V IH Ta = -40~85ºC 0.8*V DD - V DD V L level V IL Ta = -40~85ºC GND - 0.3*V DD V Output Leakage Current I OH V OH =17.0V µa Output Voltage V OL I OL =+1.0mA V V OH I OH =-1.0mA V Output Current 1 I OUT1 V DS =0.6V R ext =720 Ω ma Current Skew di OUT1 I OL =26.25mA V DS =0.6V R ext =720 Ω - ±1 ±3 % Output Current 2 I OUT2 V DS =0.8V R ext =360 Ω ma Current Skew Output Current vs. Output Voltage Regulation Output Current vs. Supply Voltage Regulation di OUT2 I OL =52.5mA V DS =0.8V R ext =360 Ω - ±1 ±3 % %/dv DS V DS within 1.0V and 3.0V - ±0.1 - % / V %/dv DD V DD within 4.5V and 5.5V - ±1 - % / V Pull-up Resistor R IN (up) KΩ Pull-down Resistor R IN (down) LE KΩ Supply Current OFF ON I DD (off) 1 R ext =Open, OUT0 ~ OUT15 =Off I DD (off) 2 R ext =720 Ω, OUT0 ~ OUT15 =Off I DD (off) 3 R ext =360 Ω, OUT0 ~ OUT15 =Off I DD (on) 1 R ext =720 Ω, OUT0 ~ OUT15 =On I DD (on) 2 R ext =360 Ω, OUT0 ~ OUT15 =On ma Test Circuit for Electrical Characteristics IDD I IH,IIL CLK V DD. OUT0 IOUT LE OUT15 V IH, VIL SDI R - EXT GND Iref - 6 -

7 Switching Characteristics Propagation Delay Time ( L to H ) Characteristic Symbol Condition Min. Typ. Max. Unit CLK - OUTn t plh ns LE - OUTn t plh ns - OUTn t plh ns CLK - t plh ns CLK - OUTn t phl ns Propagation Delay Time LE - OUTn t phl ns ( H to L ) - OUTn t phl ns V DD =5.0 V CLK - t phl V DS =0.8 V ns CLK t V IH =V DD w(clk) ns V IL =GND Pulse Width LE t w(l) R ext =300 Ω ns V L =4.0 V t w() ns R L =52 Ω Hold Time for LE t h(l) C L =10 pf ns Setup Time for LE t su(l) ns Hold Time for SDI t h(d) ns Setup Time for SDI t su(d) ns Maximum CLK Rise Time t r ** ns Maximum CLK Fall Time t f ** ns Output Rise Time of Vout (turn off) t or ns Output Fall Time of Vout (turn on) t of ns Clock Frequency F CLK Cascade Operation MHz **If the devices are connected in cascade and t r or t f is large, it may be critical to achieve the timing required for data transfer between two cascaded devices. Test Circuit for Switching Characteristics I DD VIH = 5V Function Generator Logic input waveform V IH, VIL CLK LE SDI Iref R - EXT GND. OUT0 OUT15 CL IOUT RL CL VL VIL = 0V t r = tf = 10 ns - 7 -

8 Timing Waveform t W(CLK) CLK t su(d) t h(d) SDI t plh, t phl t W(L) LE OUTn t h(l) LOW = OUTPUTS ENABLED t su(l) HIGH = OUTPUT OFF t plh1, t phl1 t plh2, t phl2 LOW = OUTPUT ON t W() t phl3 t plh3 OUTn 90% 90% 10% 10% t of t or - 8 -

9 Application Information Constant Current In LED display application, provides nearly no variations in current from channel to channel and from IC to IC. This can be achieved by: 1) The maximum current variation between channels is less than ±3%, and that between ICs is less than ±6%. 2) In addition, the current characteristic of output stage is flat and users can refer to the figure as shown below. The output current can be kept constant regardless of the variations of LED forward voltages (V F ). This performs as a perfection of load regulation Iout (ma) V DS (V) Adjusting Output Current The output current of each channel (I OUT ) is set by an external resistor, R ext. The relationship between I out and R ext is shown in the following figure. I OUT (ma) V DS = 1.0V Rext Resistance of the external resistor, R ext, in Ω Also, the output current can be calculated from the equation: V R-EXT = 1.26VI OUT = (V R-EXT / R ext ) x 15 where R ext is the resistance of the external resistor connected to R-EXT terminal and V R-EXT is the voltage of R-EXT terminal. The magnitude of current (as a function of R ext ) is around 52.5mA at 360Ω and 26.25mA at 720Ω

10 Soldering Process of Pb-free & Green Package Plating* Macroblock has defined "Pb-Free & Green" to mean semiconductor products that are compatible with the current RoHS requirements and selected 100% pure tin (Sn) to provide forward and backward compatibility with both the current industry-standard SnPb-based soldering processes and higher-temperature Pb-free processes. Pure tin is widely accepted by customers and suppliers of electronic devices in Europe, Asia and the US as the lead-free surface finish of choice to replace tin-lead. Also, it is backward compatible to standard 215ºC to 240ºC reflow processes which adopt tin/lead (SnPb) solder paste. However, in the whole Pb-free soldering processes and materials, 100% pure tin (Sn), will all require up to 260 o C for proper soldering on boards, referring to J-STD-020B as shown below. Temperature () Average ramp-up rate= 0.7/s 30s max Ramp-down 6/s (max) s max 100 Peak Temperature 245~260< 10s 50 Average ramp-up rate = 0.4/s Average ramp-up rate= 3.3/s Maximum peak temperature Recommended reflow profile Acc.J-STD-020B Time (sec) *Note1: For details, please refer to Macroblock s Policy on Pb-free & Green Package

11 Package Power Dissipation (P D ) The maximum allowable package power dissipation is determined as P D (max) = (Tj Ta) / R th(j-a). When 16 output channels are turned on simultaneously, the actual package power dissipation is P D (act) = (I DD x V DD ) + (I OUT x Duty x V DS x 16). Therefore, to keep P D (act) P D (max), the allowable maximum output current as a function of duty cycle is: I OUT = { [ (Tj Ta) / R th(j-a) ] (I DD x V DD ) } / V DS / Duty / 16, where Tj = 150 C. Iout(mA) Iout vs. Duty Cycle at Rth = ( C/W) Iout(mA) Iout vs. Duty Cycle at Rth = ( C/W) % 10% 15% 20% 25% 30% 35% 40% 45% 55% 60% Duty Cycle 65% 70% 75% 80% 85% 90% 95% 100% 0 5% 10% 15% 20% 25% 30% 35% 40% 45% 55% 60% Duty Cycle 65% 70% 75% 80% 85% 90% 95% 100% GN type package GF type package Iout(mA) Iout vs. Duty Cycle at at Rth Rth = = ( C/W) ( C/W) 5% 10% 5% 15% 10% 20% 15% 25% 20% 30% 25% 35% 30% 40% 35% 45% 40% 45% 55% 60% 55% 65% 60% 70% 65% 75% 70% 75% 80% 80% 85% 85% 90% 90% 95% 95% 100% 100% Duty Cycle Duty Cycle GNS type package Iout(mA) Iout vs. Duty Cycle at Rth = ( C/W) 5% 10% 15% 20% 25% 30% 35% 40% 45% 55% 60% 65% 70% 75% 80% 85% 90% 95% 100% Duty Cycle GP\GPA type package Iout vs. Duty Cycle at Rth = ( C/W) % 10% 15% 20% 25% 30% 35% 40% 45% 55% 60% 65% 70% 75% 80% 85% 90% 95% 100% Iout(mA) Iout(mA) Condition : I out = 90mAV DS = 1.0V16 output channels Device Type R th(j-a) ( C/W) Note GN GNS GD GF GP\GPA Ta = 25 Ta = 55 Ta = 85 Duty Cycle GD type package

12 The maximum power dissipation, P D (max) = (Tj Ta) / R th(j-a), decreases as the ambient temperature increases. Max. Power Dissipation at Various Ambient Temperature Power Dissipation Ambient Temperature GN Type: Rth= GNS Type: Rth= GD Type: Rth= GF Type: Rth= GP Type: Rth= GPA Type: Rth= Load Supply Voltage (V LED ) are designed to operate with V DS ranging from 0.4V to 1.0V considering the package power dissipating limits. V DS may be higher enough to make P D(act) > P D(max) when V LED = 5V and V DS = V LED V F, in which V LED is the load supply voltage. In this case, it is recommended to use the lowest possible supply voltage or to set an external voltage reducer, V DROP. A voltage reducer lets V DS = (V LED V F ) V DROP. Resistors or Zener diode can be used in the applications as shown in the following figures. Voltage Supply Voltage Supply V LED V Drop V Drop V LED V F V DS V F V DS Switching Noise Reduction LED driver ICs are frequently used in switch-mode applications which always behave with switching noise due to the parasitic inductance on PCB. To eliminate switching noise, refer to Application Note for 8-bit and 16-bit LED Drivers- Overshoot

13 Package Outline GN Outline Drawing GNS Outline Drawing

14 GD Outline Drawing GF Outline Drawing

15 GP\GPA Outline Drawing Note: The unit for the outline drawing is mm

16 Product Top-mark Information The first row of printing MBIXXXX Or MBIXXXX Part number ID number The second row of printing XXXXXXXX Product No. Package Code Process Code C: General type G: Green and Pb-free Manufacture Code Device Version Code Product Revision History Datasheet version Device version code VA.00 Not defined VA.01 A VA.02 A VA.03 A Product Ordering Information Part Number Pb-free & Green Weight (g) Package Type GN P-DIP GNS SP-DIP GD SOP GF SOP GP SSOP GPA SSOP

17 Disclaimer Macroblock reserves the right to make changes, corrections, modifications, and improvements to their products and documents or discontinue any product or service. Customers are advised to consult their sales representative for the latest product information before ordering. All products are sold subject to the terms and conditions supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. Macroblock s products are not designed to be used as components in device intended to support or sustain life or in military applications. Use of Macroblock s products in components intended for surgical implant into the body, or other applications in which failure of Macroblock s products could create a situation where personal death or injury may occur, is not authorized without the express written approval of the Managing Director of Macroblock. Macroblock will not be held liable for any damages or claims resulting from the use of its products in medical and military applications. All text, images, logos and information contained on this document is the intellectual property of Macoblock. Unauthorized reproduction, duplication, extraction, use or disclosure of the above mentioned intellectual property will be deemed as infringement