NT7605. Single-chip 20C X 2L Dot-Matrix LCD Controller / Driver. Features. General Description 1 V2.1

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1 Single-chip 20C X 2L Dot-Matrix LCD Controller / Driver Features! Internal LCD drivers 6 common signal drivers 00 segment signal drivers! Maximum display dimensions 20 characters * 2 lines or 40 characters * line! Interfaces with 4-bit or 8-bit MPU! Versatile display functions provided on chip: Display Clear, Cursor Home, Display ON/OFF, Cursor ON/OFF, Character Blinking, Cursor Shift, and Display Shift! Three duty factors, selected by PROGRAM: /8, /, and /6! Displays Data RAM (DD RAM): 80 X 8 bits (Displays up to 80 characters)! Character Generator RAM (CG RAM): 64 X 8 bits for general data, 8 5 X 8 programmable dot patterns, or 4 5 X 0 programmable dot patterns! Low voltage reset! ITO option for A-type and B-type LCD waveform! 2 kinds of LCD pads sequence! Character Generator ROM (CG ROM): 2 kinds of CG ROM sizes: 92 characters: 60 5 X 8 dot patterns 32 5 X 0 dot patterns 240 characters: 92 5 X 8 dot patterns 48 5 X 0 dot patterns Custom CG ROM is also available! Built-in power-on reset function! Logic power supply: 2.8V ~ 5.5V! LCD driver power supply: V ~ V5 divided by Built-in LCD power division resister.! Two oscillator operations (Freq. = 500KHz - 540KHz): Built-in RC oscillation External clock! CMOS Process! Available in COG FORM General Description The NT7605 is a dot matrix LCD controller and driver LSI that can operate with either a 4-bit or an 8-bit microprocessor (MPU). NT7605 receives control character codes from the MPU, stores them in an internal RAM (up to 80 characters), transforms each character code into a 5 X 7, 5 X 8, or 5 X 0 dot matrix character pattern, and then displays the codes on the LCD panel. The built-in Character Generator ROM consists of 256 different character patterns. The NT7605 also contains Character Generator RAM where the user can store 8 different character patterns at run time. These memory features make the character display flexible. NT7605 also provides many display instructions to achieve versatile LCD display functions. The NT7605 is fabricated on a single LSI chip using the CMOS process, resulting in very low power requirements. V2.

2 Pad Configuration µm NT µm Size Item Pad No. X Y Chip size Pad pitch Unit µm 2

3 Block Diagram V V2 V3 V4 V5 OPT_UD OPT_R0 OPT_R OPT_LCD GND OSC OSC2 8 INSTRUCTION DECODE 7 TIMING GENERATOR TEST TESTM RS 8 INSTRUCTION REGISTER (IR) ADDRESS COUNTER 7 LCD DRIVER VOLTAGE GENERATOR R/W E I/O BUFFER CURSOR ADDRESS COUNTER 7 DISPLAY DATA RAM (DD RAM) 80 X 8 BITS 8 6-BIT SHIFT REGISTER 6 COMMON SIGNAL DRIVER 6 COM I COM6 DB7 ~ DB4 4 8 DATA REGISTER (DR) CURSOR /BLINK CONTROLLER DB3 ~ DB0 4 BUSY FLAG (BF) CHARACTER GENERATOR RAM (CG RAM) 64 X 8 BITS CHARACTER GENERATOR ROM (CG ROM) 00-BIT LATCH CIRCUIT 00 SEGMENT 00 SEG SIGNAL I DRIVER SEG PARALLER - TO - SERIAL CONVERTER TESTD 3

4 Pad Description (Total 80 pads for COG type) Pad No. Designation I/O External Connection Description TEST I Test pin Test pin internally pull-down. (No connect for user) 2 TESTM O Test output LCD driver clock output. (No connect for user) 3 - GND P Power supply GND: 0V 2 OSC I For external clock operation, clock inputs to OSC 3 OSC2 O Clock output 4, 5 V P Power supply Power supply for LCD driver. V V2 V3 V4 V5 GND 6, 7 V2 P Power supply Power supply for LCD driver 8, 9 V3 P Power supply Power supply for LCD driver 20, 2 V4 P Power supply Power supply for LCD driver V5 P Power supply Power supply for LCD driver 27, 29 OPT_R0, OPT_R I ITO Option P Power supply : +5V 30, 40 RS I MPU The built-in bias resister select: OPT_R, OPT_R0: No ITO =. ITO on = 0, : 2.2KΩ;, 0: 4KΩ; 0, : 6.8KΩ; 0, 0: No built-in bias resister: Register select signal 0: Instruction register (write), Busy flag, address counter (read) : Data register (write, read) 4, 42 R/W I MPU Read/Write control signal 0: Write : Read 43, 44 E I MPU Read/Write start signal (Schmitt trigger input) 45, 46 DB0 47, 48 DB 49, 50 DB2 5, 52 DB3 53, 54 DB4 55, 56 DB5 57, 58 DB6 59, 60 DB7 I/O I/O MPU MPU 6 OPT_LCD I ITO Option 63 OPT_UD I ITO Option Lower 4 tri-state bi-directional data bus for transmitting data between MPU and NT7605. Not used during 4-bit operation Higher 4 tri-state bi-directional data bus for transmitting data between MPU and NT7605. DB7 is also used as busy flag No ITO. (Option = ): B-Type waveform ITO On. (Option = 0): A-Type waveform No ITO. (Option = ): COM COM8 COM9 COM6; SEG SEG00 ITO On. (Option = 0): COM9 COM6 COM COM8; SEG00 SEG 64 TESTD O Test output Test data output. (No connect for user) COM - 8 O LCD panel Common signal output pins, for place on the upper glass (OPT_UD=) COM9-6 O LCD panel COM - 8 O LCD panel COM9-6 O LCD panel SEG - 00 O LCD panel Segment signal output pins (OPT_UD = ) Common signal output pins, for place on the lower glass (OPT_UD=0) SEG - 00 O LCD panel Segment signal output pins (OPT_UD = 0) 28, 62 GND_OUT P GND output pin, use for pull-down ITO option 4

5 Functional Description The NT7605 is a dot-matrix LCD controller and driver LSI. It operates with either a 4-bit or an 8-bit microprocessor (MPU). The NT7605 receives both instructions and data from the MPU. Some instructions set operation modes, such as the function mode, data entry mode, and display mode; as well as some control LCD display functions, such as clear display, restore display, shift display as well as controlling the cursor. Other instructions include reading and writing both data and addresses. All the instructions allow users convenient and powerful functions to control the LCD dot-matrix displays. Data is written into and read from the Data Display RAM (DD RAM) or the Character Generator RAM (CG RAM). As display character codes, the data stored in the DD RAM decodes a set of dot-matrix character patterns that are built into the Character Generator ROM (CG ROM). The CG ROM, with many character patterns (up to 256 patterns), defines the character pattern fonts. The NT7605 regularly scans the character patterns through the segment drivers. The CG RAM stores character pattern fonts at run time if users intend to show character patterns that are not defined in the CG ROM. This feature makes character display flexible. Other unused bytes can be used as general-purpose data storage. The LCD driver circuit consists of 6 common signal drivers and 00 segment signal drivers allowing a variety of application configurations to be implemented. Character Generator ROM (CG ROM) The character generator ROM generates LCD dot character patterns from the 8-bit character pattern codes. The NT7605 provides 2 CG ROM configurations:. 92 Characters: The CG ROM contains 60 5 X 8 dot character patterns and 32 5 X 0 dot character patterns. The relation between the character codes and character patterns is shown in Table. The character codes from 00H to 0FH are used to get character patterns from the CG RAM. The character codes 0H to FH, 80H to 9FH and 20H all map to null character patterns. The character codes from E0H to FFH are assigned to generate 5 X 0 dot character patterns, and other codes are used to generate 5x8 dot character patterns Characters: The CG ROM contains 92 5 X 8 dot character patterns and 48 5 X 0 dot character patterns. The relation between the character codes and character patterns is shown in Table 2. The character codes from 00H to 0FH are used to get character patterns from the CG RAM. The character codes from 0H to FH and from E0H to FFH are assigned to generate 5 X 0 dot character patterns, and other codes to generate 5 X 8 dot character patterns. Only one null character pattern exists in this type. Note that the underlined cursor, displayed on the 8th duty may be obscure if the 8th row of a dot character pattern is coded. We recommend that users display the cursor in the blinking mode if coding 5 X 8 dot character patterns is their custom CG ROM. Custom character patterns are available by mask-programming the ROM. For convenience of character pattern development, NOVATEK has developed a user-friendly editor program for the NT7605 to help determine the character patterns users prefer. By executing the program on the computer, users can easily create and modify their character patterns. By transferring the resulting files generated by the program through a modem or some other communication method, the user and NOVATEK can establish a reliable, fast link for programming the CG ROM. 5

6 Absolute Maximum Ratings* Power Supply Voltage () V to +7.0V Power Supply Voltage (V to V5) GND to + 0.3V Input Voltage (VI) V to + 0.3V Operating Temperature (TOPR) C to +70 C Storage Temperature (TSTG) C to +25 C *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.! All voltage values are referenced to GND = 0V! V to V5, must maintain V V2 V3 V4 V5 GND DC Electrical Characteristics ( = 4.5V~5.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions Operating Voltage V VIH "H" Level Input Voltage V VIL "L" Level Input Voltage V VOH "H" Level Output Voltage V IOH = -.2mA VOL "L" Level Output Voltage - - GND V IOL =.2mA Applicable Pin DB0 - DB7, RS, R/W, E, OSC DB0 - DB7 (CMOS) VCOMD Driver Voltage Descending (COM) V ID = 5µA COM - 6 VSEGD Driver Voltage Descending (SEG) V ID = 5µA SEG - 00 IIL Input Leakage Current - - µa VIN = 0 to -IP Pull-up MOS Current µa = 5V IOP Power Supply Current -.5 ma fcp External Clock Operating Frequency External Clock Operation KHz tduty External Clock Duty Cycle % Rf oscillation, from external clock = 5V, fosc = fcp = 540KHz, include LCD bias current RS, R/W, DB0 - DB7 trcp External Clock Rise Time µs tfcp External Clock Fall Time µs Internal Clock Operation (Built-in RC Oscillator) fosc Oscillator Frequency KHz Rf = 50KΩ (reference only) = 2.8V ~ 5.5V VLCD LCD Driving Voltage V - V5 6

7 DC Electrical Characteristics (continued) ( = 2.8V~4.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions Operating Voltage V VIH "H" Level Input Voltage V VIL "L" Level Input Voltage V VOH "H" Level Output Voltage V IOH = -0.8mA VOL "L" Level Output Voltage - - GND V IOL = 0.8mA Applicable Pin DB0 - DB7, RS, R/W, E, OSC DB0 - DB7 (CMOS) VCOMD Driver Voltage Descending (COM) V ID = 5µA COM - 6 VSEGD Driver Voltage Descending (SEG) V ID = 5µA SEG - 00 IIL Input Leakage Current - - µa VIN = 0 to -IP Pull-up MOS Current µa = 3V RS, R/W, DB0 - DB7 IOP Supply Current Power Supply Current -.5 ma Rf oscillation, from external clock = 3V, fosc = fcp = 540KHz, include LCD bias current External Clock Operation fcp External Clock Operating Frequency KHz tduty External Clock Duty Cycle % trcp External Clock Rise Time µs tfcp External Clock Fall Time µs Internal Clock Operation (Built-in RC Oscillator) fosc Oscillator Frequency KHz Rf = 50KΩ (reference only) = 2.8V ~ 5.5V VLCD LCD Driving Voltage V - V5 7

8 AC Characteristics Read Cycle ( = 4.5V~5.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions tcyce Enable Cycle Time ns Figure twhe Enable "H" Level Pulse Width ns Figure tre, tfe Enable Rise/Fall Time ns Figure tas RS, R/W Setup Time ns Figure 00 2 tah RS, R/W Address Hold Time ns Figure trd Read Data Output Delay ns Figure tdhr Read Data Hold Time ns Figure Write Cycle ( = 4.5V~5.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions tcyce Enable Cycle Time ns Figure 2 twhe Enable "H" Level Pulse Width ns Figure 2 tre, tfe Enable Rise/Fall Time ns Figure 2 tas RS, R/W Setup Time ns Figure tah RS, R/W Address Hold Time ns Figure 2 tds Data Output Delay ns Figure 2 tdhw Data Hold Time ns Figure 2 Notes: : 8-bit operation mode 2: 4-bit operation mode Power Supply Conditions Using Internal Reset Circuit ( = 4.5V~5.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions tron Power Supply Rise Time ms Figure 3 toff Power Supply OFF Time - - ms Figure 3 8

9 AC Characteristics (continued) Read Cycle ( = 2.8V~4.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions tcyce Enable Cycle Time ns Figure twhe Enable "H" Level Pulse Width ns Figure tre, tfe Enable Rise/Fall Time ns Figure tas RS, R/W Setup Time ns Figure 00 2 tah RS, R/W Address Hold Time ns Figure trd Read Data Output Delay ns Figure tdhr Read Data Hold Time ns Figure Write Cycle ( = 2.8V~4.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions tcyce Enable Cycle Time ns Figure 2 twhe Enable "H" Level Pulse Width ns Figure 2 tre, tfe Enable Rise/Fall Time ns Figure 2 tas RS, R/W Setup Time ns Figure tah RS, R/W Address Hold Time ns Figure 2 tds Data Output Delay ns Figure 2 tdhw Data Hold Time ns Figure 2 Notes: : 8-bit operation mode 2: 4-bit operation mode Power Supply Conditions Using Internal Reset Circuit ( = 2.8V~4.5V, GND = 0V, TA = 25 C) Symbol Parameter Min. Typ. Max. Unit Conditions tron Power Supply Rise Time ms Figure 3 toff Power Supply OFF Time - - ms Figure 3 9

10 Timing Waveforms Read Operation RS VIH VIL tas VIH VIL tah R/W twhe tfe E VIH VIL tre trd VIL tdhr VIL DB0 ~ DB7 VOH VOL VAILD DATA VOH VOL tcyce Figure. Bus Read Operation Sequence (Reading out data from NT7605 to MPU) Write Operation RS VIH VIL VIH VIL tas tah R/W VIL twhe E VIH VIL tre tds tfe VIL tdhw VIL DB0 ~ DB7 VIH VIL VAILD DATA VIH VIL tcyce Interface Signals with Segment Driver LSI Figure 2. Bus Write Operation Sequence (Writing data from MPU to NT7605) 4.5V 0.2V 0.2V 0.2V 0.ms > tron > 0ms tron toff > ms toff Figure 3. toff stipulates the time of power off for instantaneous Power supply to or when power supply repeats ON and OFF. 0

11 Note : The NT7605 has two clock options: A. Internal Oscillator (Built-in RC) OSC OSC2 OPEN OPEN B. External Clock Operation OSC OSC2 PULSE INPUT OPEN Note 2: Input/Output Terminals: A. Input Terminal Applicable Terminal: E (No Pull Up MOS) PMOS NMOS Applicable Terminal: RS, R/W (with Pull Up MOS) Pull Up MOS PMOS PMOS NMOS

12 B. Output Terminal Applicable Terminal: TESTM PMOS NMOS C. I/O Terminal Applicable Terminal: DB0 to DB7 Pull Up MOS PMOS PMOS ENABLE PMOS NMOS NMOS (OUTPUT CIRCUIT) (TRISTATE) DATA Note 3: ITO Options: Set Option = 0: Place ITO on the Option Pad. Set Option = : No ITO on the Option Pad. No ITO: ITO On: GND OUTPUT PAD OPTION PAD GND OUTPUT PAD OPTION PAD GND_OUT OPTION (Internal pull up) GND_OUT OPTION (Internal pull up) ITO Option = Option = 0 2

13 Table. NT7605H-BDT0 Correspondence between Character Codes and Character Patterns (NOVATEK Standard 92 Character CG ROM) 3

14 Instruction Set Instruction Code RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB0 Display Clear Display/ Cursor Home Entry Mode Set Display ON/OFF * I/D S D C B NT7605 Execution time (max) Function (fosc = 540KHz) Clear entire display area, Restore display from shift, and.64ms load address counter with DD RAM address 00H Restore display from shift and load address counter with DD RAM address 00H Specify direction of cursor movement and display shift mode. This operation takes place after each data transfer (read/write) Specify activation of display (D) cursor (C) and blinking of character at cursor position (B) Display/ Cursor Shift S/C R/L * * Shift display or move cursor 40µs Function Set DL N F * * RAM Address Set DD RAM Address Set Busy Flag/ Address Counter Read CG RAM/ DD RAM Data Write CG RAM/ DD RAM Data Read ACG 0 0 ADD 0 BF AC Set interface data length (DL), number of the display line (N), and character font (F) Load the address counter with a CG RAM address Subsequent data access is for CG RAM data Load the address counter with a DD RAM address Subsequent data access is for DD RAM data Read Busy Flag (BF) and contents of Address Counter (AC) 0 Write data Write data to CG RAM or DD RAM Read data Read data from CG RAM or DD RAM I/D = : Increment I/D = 0 : Decrement S = : Display Shift On D = : Display On C = : Cursor Display On B = : Cursor Blink On S/C = : Shift Display S/C = 0 : Move Cursor R/L = : Shift Right R/L = 0 : Shift Left DL = : 8-Bit DL = 0 : 4-Bit N = : Dual Line N = 0 : Signal Line F = : 5x0 dots F = 0 : 5x8 dots BF = : Internal Operation BF = 0 : Ready for Instruction DD RAM : Display Data RAM CG RAM : Character Generator RAM ACG : Character Generator RAM Address ADD : Display Data RAM Address AC : Address Counter Note : Symbol " * " signifies an insignificant bit (disregard). Note 2: Correct input value for "N" is predetermined for each model. Note 3: The variation of execution time depends on the change of oscillator frequency; for example: if fosc = 380KHz, then execution time = 40µs (540KHz / 380KHz) = 57µs.64ms 40µs 40µs 40µs 40µs 40µs µs 40µs 40µs 4

15 Interface to LCD NT7605 () Character Font and Number of Lines The NT7605 provides a 5 X 7 dot character font -line mode, a 5 X 0 dot character font -line mode and a 5 X 7 dot character font 2-line mode, as shown in the table below. Three types of common signals are available as displayed in the table. The number of lines and the font type can be selected by the program. Number of Lines Character Font Number of Common Signals Duty Factor Bias 5 X 7 dots + Cursor (or 5 X 8 dots) 8 /8 /4 5 X 0 dots + Cursor / /4 2 5 X 7 dots + Cursor (or 5 X 8 dots) 6 /6 /5 (2) Connection to LCD The following 4 LCD connection examples show the various combinations between characters and lines. NT7605 can directly drive the following combinations: (a) 5 X 8 Font 20 characters X line (/8 duty cycle, /4 bias) COM LCD PANEL COM8 SEG NT7605 SEG00 5

16 (b) 5 X 0 Font - 20 characters X line (/ duty cycle, /4 bias) COM LCD PANEL COM8 SEG NT7605 SEG00 COM COM9 (c) 5 X 8 Font - 20 characters X 2 line (/6 duty cycle, /5 bias) COM LCD PANEL COM8 NT7605 SEG SEG00 COM6 COM9 6

17 (d) 5 X 8 Font - 40 characters X line (/6 duty cycle, /5bias) COM LCD PANEL COM8 SEG NT7605 SEG00 COM6 COM9 7

18 (3) Orientation Type of NT7605: C, S Type: Place the chip on the upper glass(ic face up) OPT_UD = (NO ITO) C, S Type2: Place the chip on the lower glass(ic face down) OPT_UD = 0 ( ITO ON) C8, S LCD PANEL C8, S LCD PANEL C9, S00 C9, S00 NT7605 C6, S00 NT7605 C6, S00 Type3: Place the chip on the lower glass(ic face down) OPT_UD = (NO ITO) Type4: Place the chip on the upper glass(ic face up) OPT_UD = 0 ( ITO ON) C, S NT7605 C, S NT7605 C8, S C8, S LCD PANEL C9, S00 LCD PANEL C9, S00 C6, S00 C6, S00 Note:. Dot line: ITO layout on lower glass. 2. Dash line: ITO layout on upper glass. 8

19 (3) Bias Power Connection NT7605 provides /4 or /5 bias for various duty cycle applications. The built-in power division resister divide voltage is described in the following table. The connection of NT7605, power supply, and resistors are also shown as follows: Power Division /8, / Duty Cycle - /4 Bias /6 Duty Cycle - /5 Bias V - /4 VLCD - /5 VLCD V2 - /2 VLCD - 2/5 VLCD V3 - /2 VLCD - 3/5 VLCD V4-3/4 VLCD - 4/5 VLCD V5 - VLCD - VLCD The bias is auto selected by the duty cycle. When the LCD is set to /6 duty, the bias is set to /5. Otherwise, the bias is set to /4. The ITO Option can select the division resister value: OPT_R OPT_R0 Division Resister No ITO () No ITO () 2.2KΩ No ITO () ITO On (0) 4KΩ ITO On (0) No ITO () 6.8KΩ NT7605 V V2 V3 V4 VLCD Built-in bias resister 2.2K, 4K or 6.8K ohm ITO On (0) No ITO (0) No built-in resister (external input) V5 VR GND R R V V R R NT7605 V2 VLCD NT7605 V2 R VLCD V3 R V3 R V4 R V4 R V5 V5 VR VR GND GND Exit Power division. (The resistance value depends on the LCD panel size) 9

20 (4) LCD Waveform A-type, /8 Duty Cycle, /4 Bias COM CLOCKS 8 2 V V2 (V3) V4 V5 Frame sec Frame = =.9ms Frame Frequency = = 84.3Hz 540K.9ms A-type, / Duty Cycle, /4 Bias COM CLOCKS 2 V V2 (V3) V4 V5 Frame sec Frame = 800 = 6.3ms Frame Frequency = = 6.4Hz 540K 6.3ms A-type, /6 Duty Cycle, /5 Bias COM CLOCKS 6 2 V V2 V3 V4 V5 Frame sec Frame = =.9ms 540K Frame Frequency = = 84.3Hz.9ms 20

21 B-type, /8 Duty Cycle, /4 Bias COM 800 CLOCKS V V2 (V3) V4 V5 Frame sec Frame = =.9ms Frame Frequency = = 84.3Hz 540K.9ms B-type, / Duty Cycle, /4 Bias COM 800 CLOCKS V V2 (V3) V4 V5 Frame sec Frame = 800 = 6.3ms Frame Frequency = = 6.4Hz 540K 6.3ms B-type, /6 Duty Cycle, /5 Bias COM CLOCKS V V2 V3 V4 V5 Frame sec Frame = =.9ms Frame Frequency = = 84.3Hz 540K.9ms 2

22 Low Voltage Reset NT7605 The Low voltage reset function is used to monitor the supply voltage and applies an internal reset at the time when a low voltage is detected. Functions of the Low Voltage Reset Circuit The Low voltage reset circuit has the following functions: # Generates an internal reset signal when VLVR. # Cancels the internal reset signal when > VLVR. Here, : power supply voltage, VLVR: Low voltage reset detection voltage, about 2.0V. Application Circuit (for reference only) COM ~ 6 LCD PANEL NT7605 SEG ~ 00 DB0 ~ 7 MPU E, R/W, RS V5 VR GND 22

23 Example (for reference only) Interface with 8-bit MPU RS R/W E Internal signal Internal operation DB7 DATA BUSY BUSY NO BUSY DATA Instruction Busy flag check Instruction Interface with 4-bit MPU RS R/W E Internal signal Internal operation DB7 D7 NO D3 BUSY AC3 BUSY AC3 D7 D3 Instruction Busy flag check Instruction 23

24 Initializing by Instruction. 8-bit Interface Power On Wait for more than 30 ms after on RS RW DB7 Function set DB6 DB5 DB4 DB3 DB2 DB DB0 N 0 -line mode 2-line mode N F X X F 0 5 x 7 dots 5 x 0 dots Wait for more than 40 μs Display ON/OFF Control D 0 display off display on RS RW 0 0 DB7 DB6 0 0 DB5 0 DB4 0 DB3 DB2 D DB C DB0 B C 0 cursor off cursor on Wait for more than 40 μs B 0 blink off blink on Clear Display RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB Wait for more than.64ms RS RW DB7 Entry Mode Set DB6 DB5 DB4 DB3 DB2 DB DB0 I/D 0 decrement mode increment mode I/D S S 0 entire shift off entire shift on Initialization end Write date to DDRAM: Write N RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB

25 2. 4-bit Interface Power On Wait for more than 30 ms after on Function set RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB X X X X X X X X 0 0 N F X X X X X X N F 0 -line mode 2-line mode 0 5 x 7 dots 5 x 0 dots Wait for more than 40 μs Display ON/OFF Control RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB X X X X 0 0 D C B X X X X Wait for more than 40 μs D C B 0 display off display on 0 cursor off cursor on 0 blink off blink on Clear Display RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB X X X X X X X X Wait for more than.64ms Entry Mode Set RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB X X X X I/D S X X X X I/D S 0 decrement mode increment mode 0 entire shift off entire shift on Initialization end Write date to DDRAM: Write N RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB DB X X X X 0 0 X X X X... 25

26 Ordering Information Part No. CG ROM Package Shipment Style NT7605H-BDB0 92 CGROM (ref P3) COG CHIP FORM Bumped Die on Blue tape NT7605H-BDT0 92 CGROM (ref P3) COG CHIP FORM Bumped Die on chip Tray NT7605-BDW0 92 CGROM (ref P3) COG CHIP FORM Bumped Die on Wafer 26

27 Bonding Diagram µm NT7605 ( 0, 0 ) Y X 230µm Pad No. Designation X Y Pad No. Designation X Y TEST TESTM GND GND GND GND GND GND GND RS GND RS GND RW OSC RW OSC E V E V DB V DB V DB V DB V DB V DB V DB V DB V DB V DB V DB V DB OPT_R DB GND_OUT DB OPT_R DB DB

28 Bonding Diagram (continued) Pad No. Designation X Y Pad No. Designation X Y 6 OPT_LCD SEG GND_OUT SEG OPT_UD SEG TESTD SEG COM SEG COM SEG COM SEG COM SEG COM SEG COM SEG COM SEG COM SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG

29 Bonding Diagram (continued) Pad No. Designation X Y Pad No. Designation X Y 4 SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG COM SEG COM SEG COM SEG COM SEG COM SEG COM SEG COM SEG COM SEG ALK_L SEG ALK_R

30 Package Information Chip Outline Dimensions unit: µm A A C g A2 m D f E m r (Metal 2) g f NT7605 ( 0, 0 ) Y X f g m r (Metal 2) E A2 m D f g C2 g m m m m m m m m m m m m m g C A A2 f f g g B B B B B2 B2 A2 A C2 Symbol Dimensions in µm Symbol Dimensions in µm A D A2 64 E 520 B 30 g 42 B2 455 f 90 C 62.5 m 65 C r 35 30

31 Tray Information e f X 0*3 Y Y H30-230*60-33 X W W2 c d g T2 T SECTION Y-Y h W W2 h g a b e f T2 T SECTION X-X Tray Outline Dimensions unit: mm Symbol Dimensions in mm Symbol Dimensions in mm a.54 g 0.84 b 2.2 h 4.20 c 5.84 W 76.0 d 6.4 W e.60 T 7.0 f.40 T

32 Product Spec. Change Notice NT7605 Specification Revision History Version Content Date Adding Note 3 and modified fosc from 270KHz to 540KHz (Page 4, Document mistake corrected) Modify the number of clock in single duty from 400 to 800 (/8 duty and / duty),200 to 400(/6 duty) and fosc from 270K to 540K(Page 2) ( Document mistake corrected) ROM Table deleted(page 4) B-type waveform modified(page 2, Document mistake corrected) Add new orientation type of NT7605 (page 9) Correct 4-bit interface Initializing sample. (page 26) conditions in Electrical Characteristics changed.(page 6~9) Add more description for OPT_UD option. (page 4) Jul.2002 Apr.2002 Nov Original Feb

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