IPS009 series IC CMOS SPXO
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- Alexandrina Parrish
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1 IPS009 series IC CMOS SPXO Description IPS009 is the IC for SPXO corresponding to the fundamental crystal from 14MHZ to 100MHz, and operation voltage is 1.2V minimum, so it is the best for the application to the hand-held apparatus of a battery drive. The operation temperature is quite high (125 ), so IPS009 can be used for various applications. Features Operation temperature : 125 Power supply voltage : 1.2~3.63V / IPS009BL and 1.62~3.63V / IPS009CM Standby function : Oscillation stop Crystal frequency : 100MHz maximum Low power consumption : 1.2mA (IPS009BL) Output : CMOS Divide function : 1/2, 1/4 and 1/8 Small chip size : 0.70mm 0.75mm Frequency stability to Vdd : Within ±1ppm Duty cycle : Within 50±5% 1. Part number rule IPS 009 B L z -C1 Series Name for SPXO Product Series Frequency Range Conbination of Frequency and Frequency Range B:14~48MHz C:48~100MHz Divide Function (V) L M 0:1/1 1.2~ ~3.63 1:1/2 Divide NA 2:1/4 Divide NA 3:1/8 Divide Pad Layout C1:Straight C2:Cross S1-1/7 S1.105
2 IPS009 series IC CMOS SPXO 2. Series Part Number Output Frequency (MHz) Pad Vdd Divide Min. Max. Layout (V) Remarks IPS009 B L 0 -C /1 IPS009 B L 1 -C /2 Straight 1.2 *1) ~ Low Vdd IPS009 B L 2 -C / *1) 1.3V at 125 IPS009 B L 3 -C /8 IPS009 B L 0 -C /1 Cross IPS009 C M 0 -C /1 IPS009 C M 1 -C /2 IPS009 C M 2 -C /4 Straight 1.62~3.63 High Frequency IPS009 C M 3 -C /8 3. Absolute Maximum Ratings Vss=0V, Ta=25 ±2 Parameter Symbol Condition Ratings Min Max Unit Supply Voltage VSS V Input Voltage VIN All Input Pin VSS V Output Voltage V VSS V Input Current IIN Pin 50 μa Output Current I 25 ma Junction Temperature Tj Storage Temperature Tstg Recommended Operating Condition VSS=0V, Ta=- 40 ~+125 Supply Voltage Parameter Symbol Condition Min Typ Max Unit Note IPS009BL IPS009CM -40~ V -40~ ~ V V H Input Voltage VIH 0.8 V L Input Voltage VIL 0.2 V Input Voltage VIN VSS V Output Load CL CMOS 15 pf Capacitance Ambient Temperature Topt This IC has enough immunity against ESD and Latch-up, but handle with care. S1-2/7 S1.105
3 IPS009 series IC CMOS SPXO 5. Electrical Specification 5-1 IPS009BL Unless otherwise stated, =1.2V~3.63V, VSS=0V, Ta=-40~125, fxtal=14~48mhz Specification Parameter Symbol Condition Unit Min Typ Max V, X1=, Out put Leak current Iz μa Vss, Vout=Vss~ H input current IIH pad, VIN= μa L input current IIL pad, VIN=VSS μa Oscillation Disable Time Tplz pad 0.1 μs Oscillation Enable Time Tpzl pad 2 ms Oscillation start up time Tstart fxtal=27mhz, 1.2V 2 ms H output voltage VOH pad, IOH=-1.0mA 0.9 V L output voltage VOL pad, IOL=1.0mA 0.1 V CL=0pF, =1.8V, -0.3V, Current consumption IDD F0=27MHz CL=15pF, =1.8V, ma -0.3V, F0=27MHz Current consumption at oscillation disable Frequency deviation Output Duty Ratio Rise time Fall time IDDD Fvst Duty Tr Tf CL=15pF, =3.3V, 0.3V μa =3.0±10% ±1 =1.8±10% ±2 CL=15pF, =1.2~1.62V CL=15pF, =1.62~3.63V CL=15pF, 10~90%, =2.52~3.63V CL=15pF, 10~90%, =1.2~2.52V CL=15pF, 10~90%, =2.52~3.63V CL=15pF, 10~90%, =1.2~2.52V ppm % ns ns S1-3/7 S1.105
4 IPS009 series IC CMOS SPXO 5-2 IPS009CM Unless otherwise stated, =1.62V~3.63V, VSS=0V, Ta=-40~125, fxtal=48~100mhz Specification Parameter Symbol Condition Unit Min Typ Max V, X1=, Out put Leak current Iz μa Vss, Vout=Vss~ H input current IIH pad, VIN= μa L input current IIL pad, VIN=VSS μa Oscillation Disable Time Tplz pad 0.1 μs Oscillation Enable Time Tpzl pad 2 ms Oscillation start up time Tstart fxtal=27mhz, 1.62V 2 ms H output voltage VOH pad, IOH=-1.0mA 0.9 V L output voltage VOL pad, IOL=1.0mA 0.1 V CL=0pF, =1.8V, -0.3V, Current consumption IDD F0=77MHz CL=15pF, =1.8V, ma -0.3V, F0=77MHz 5.0 Current consumption at oscillation disable Frequency deviation Output Duty Ratio Rise time Fall time IDDD Fvst Duty Tr Tf CL=15pF, =3.3V, 0.3V μa =3.0±10% ±1 =1.8±10% ±2 CL=15pF, =1.62~3.63V CL=15pF, 10~90%, =2.52~3.63V CL=15pF, 10~90%, =1.62~2.52V CL=15pF, 10~90%, =2.52~3.63V CL=15pF, 10~90%, =1.62~2.52V ppm % ns ns S1-4/7 S1.105
5 IPS009 series IC CMOS SPXO T WH T WL V DD 0.9 V OH V DD 0.5 V DD 0.1 V OL Tr Tf Duty= T WH T WH +T WL 100% Fig. 5-1 Output wave form (Duty, Tr, Tf, VOH, VOL) VIH VIL Tplz Tpzl 1.2V GND Tstart Oscillation Out High-Z Oscillation Out VIH : Threshold voltage for Oscillation Start VIL : Threshold voltage for Oscillation Stop Fig. 5-2 Input output signal timing S1-5/7 S1.105
6 IPS009 series IC CMOS SPXO 6. Circuit Parameters of Oscillator (Reference Data for Circuit Design) 6-1 IPS009BL Ta=25 Parameter Symbol Condition Min Typ Max Unit Equivalent series (Loading) =2.7V, CLxtal 4.5 pf Capacitance fxtal=27mhz =3.3V, Ta=25 Drive Level DL 20 μw fxtal=27mhz *The above values are the design values and are not guaranteed by test. 6-2 IPS009CM Ta=25 Parameter Symbol Condition Min Typ Max Unit Equivalent series (Loading) =2.7V, CLxtal 7.3 pf Capacitance fxtal=100mhz =3.3V, Ta=25 Drive Level DL 150 μw fxtal=70mhz *The above values are the design values and are not guaranteed by test. R f Voltage Regulator Vreg Level Shifter Divider 3stage Output Buffer R d X1 X2 Cg Cd Rst Fig. 6-1 Block Diagram S1-6/7 S1.105
7 7. Pad Layout IPS009 series IC CMOS SPXO 0.7mm Die Size:0.70mm 0.75mm Pad Size:80um X1 X2 y x Scribe line center VSS 0.75mm Thickness:150±20um IC Backside:Gnd or Open Pad Name Function Location (μm) x y (+)Power Supply (Q) Frequency Output VSS (-)Ground Oscillation stop, "L": High-Impedance X2 Crystal Drive X1 Crystal Feedback Chip Center 0 0 Fig. 7-1 Pad Layout of IPS009BLx-C1 and IPS009CMx-C1 ( Straight Type ) 0.7mm Die Size:0.70mm 0.75mm Pad Size:80um Thickness:150±20um IC Backside:Gnd or Open X1 X2 y x VSS 0.75mm Pad Name Function Location (μm) x y (+)Power Supply (Q) Frequency Output VSS (-)Ground X2 Crystal Drive X1 Crystal Feedback Oscillation stop, "L": High-Impedance Chip Center 0 0 Scribe line center Fig. 7-2 Pad Layout of IPS009BL0-C2 (Cross Type ) Rex IC VSS Package IMPORTANT Notice for function * Rex should be over 10MΩ in case of = Open usage. * Oscillation will not be activated when = Open after = Low if Rex is below 10MΩ. * There is no such issue in case of = usage. Rex : External resistance value between and VSS of package. S1-7/7 S1.105
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9 Low Phase Noise IPS009BM Wide Vdd CMOS SPXO Description IPS009BM is the specific SPXO IC for achieving low Phase Noise, corresponding to the fundamental crystal from 14MHZ to 60MHz. Both the operation temperature (-40 ~125 ) and Vdd range(1.62v~5.5v) is wide, so IPS009BM makes the selection of application wider. If slightly poor phase noise performance is allowed, even 1.8V is applicable. Features Phase Noise : -162dBc/Floor 27MHz Phase Jitter : 150fsec/27MHz Operation temperature : -40 ~125 Power supply voltage : 1.62 *1) ~2.25~5.5V Standby function : Oscillation stop Crystal frequency : 60MHz maximum Output : CMOS Divide function : 1/2, 1/4 and 1/8 Small chip size : 0.70mm 0.75mm Frequency stability to Vdd : Within ±1ppm Duty cycle : Within 50±5% *1) Phase noise performance becomes slightly poor below 2.25V operation. 1. Part number rule IPS 009 B M z -C1 Series Name for SPXO Pad Layout Product Series C1:Straight Frequency Range C2:Cross 1.75~60MHz C3:Cross 1.62~5.5V Divide Function 0:1/1 1:1/2 Divide 2:1/4 Divide 3:1/8 Divide S11-1/7 S11.104
10 2. Series Part Number Output Frequency (MHz) Min. Max. Divide IPS009 B M 0 -C /1 IPS009 B M 1 -C /2 IPS009 B M 2 -C /4 IPS009 B M 3 -C /8 IPS009 B M 0 -C /1 IPS009 B M 1 -C /2 IPS009 B M 2 -C /4 IPS009 B M 3 -C /8 IPS009 B M 0 -C /1 IPS009 B M 1 -C /2 IPS009 B M 2 -C /4 IPS009 B M 3 -C /8 3. Absolute Maximum Ratings Vss=0V, Ta=25 ±2 Parameter Symbol Condition Low Phase Noise IPS009BM Wide Vdd CMOS SPXO Pad Layout Straight Cross Ratings Vdd (V) 1.62 ~ 5.5 Min Max Unit Supply Voltage VSS V Input Voltage VIN All Input Pin VSS V Output Voltage V VSS V Input Current IIN Pin 50 μa Output Current I 25 ma Junction Temperature Tj Storage Temperature Tstg Remarks Low Phase Noise Wide Vdd 4. Recommended Operating Condition VSS=0V, Ta=- 40 ~+125 Supply Voltage Parameter Symbol Condition Min Typ Max Unit Note IPS009BM -40~ *1) V H Input Voltage VIH 0.8 V L Input Voltage VIL 0.2 V Input Voltage VIN VSS V Output Load CL CMOS 15 pf Capacitance Ambient Temperature Topt *1) Phase noise performance becomes slightly poor at 1.62~2.25V. This IC has enough immunity against ESD and Latch-up, but handle with care. S11-2/7 S11.104
11 Low Phase Noise IPS009BM Wide Vdd CMOS SPXO 5. Electrical Specification Unless otherwise stated, =1.62V~5.5V, VSS=0V, Ta=-40~125, fxtal=14~60mhz Specification Parameter Symbol Condition Min Typ Max 125 Out put Leak current Iz =0V, X1=, Vss, Vout=Vss~ Unit μa H input current IIH pad, VIN= μa L input current IIL pad, VIN=VSS μa Oscillation Disable Time Tpd pad 0.1 μs Oscillation Enable Time Tpe pad 2 ms Oscillation start up time Tstart fxtal=27mhz, 1.62V 2 ms H output voltage VOH pad, IOH=-1.0mA 0.9 V L output voltage VOL pad, IOL=1.0mA 0.1 V CL=15pF, =1.8V, -0.3V, Current consumption IDD F0=27MHz CL=15pF, =3.3V, ma -0.3V, F0=27MHz Current consumption at oscillation disable Frequency deviation Duty Ratio Rise/Fall time Rise/Fall time IDDD Fvst CL=15pF, =3.3V, 0.3V μa =5±10% ±1 =3.3±10% ±1 =2.5±10% ±1 Except below CL=15pF Duty IPS009BM0-C3 CL=15pF, =1.8±10% Tr/Tf Tr/Tf CL=15pF, 10~90%, =1.62~2.52V CL=15pF, 10~90%, =2.52~5.5V Phase Noise : Frequency =27MHz, V DD = 3.3V IPS009BMx-C1/C2 IPS009BMx-C3 Offset Phase Noise (dbc) 1Hz Hz Hz KHZ KHz KHz MHz Phase Jitter 143fsec 102fsec ppm % ns ns S11-3/7 S11.104
12 Low Phase Noise IPS009BM Wide Vdd CMOS SPXO T WH T WL V DD 0.9 V OH V DD 0.5 V DD 0.1 V OL Tr Tf Duty= T WH T WH +T WL 100% Fig. 5-1 Output wave form (Duty, Tr, Tf, VOH, VOL) VIH VIL Tplz Tpzl 1.2V GND Tstart Oscillation Out High-Z Oscillation Out VIH : Threshold voltage for Oscillation Start VIL : Threshold voltage for Oscillation Stop Fig. 5-2 Input output signal timing S11-4/7 S11.104
13 Low Phase Noise IPS009BM Wide Vdd CMOS SPXO 6. Circuit Parameters of Oscillator (Reference Data for Circuit Design) Ta=25 Parameter Symbol Condition Min Typ Max Unit Equivalent series (Loading) =2.7V, CLxtal Capacitance fxtal=27mhz 6 pf Drive Level DL =3.3V, Ta=25 fxtal=27mhz 60 μw *The above values are the design values and are not guaranteed by test. R f Voltage Regulator Vreg Level Shifter Divider 3stage Output Buffer R d X1 X2 Cg Cd Rst Fig. 6 Block Diagram S11-5/7 S11.104
14 Low Phase Noise IPS009BM Wide Vdd CMOS SPXO 7. Pad Layout 0.7mm Die Size:0.70mm 0.75mm Pad Size:80um X1 y x 0.75mm Thickness:150±20um IC Backside:Gnd or Open X2 Scribe line center VSS Pad Name Function Location (μm) x y (+)Power Supply (Q) Frequency Output VSS (-)Ground Oscillation stop, "L": High-Impedance X2 Crystal Drive X1 Crystal Feedback Chip Center 0 0 Fig. 7-1 Pad Layout of IPS009BM-C1 (Straight Type ) 0.7mm X1 X2 y x VSS Scribe line center 0.75mm Die Size:0.70mm 0.75mm Pad Size:80um Thickness:150±20um IC Backside:Gnd or Open Pad Name Function Location (μm) x y (+)Power Supply (Q) Frequency Output VSS (-)Ground X2 Crystal Drive X1 Crystal Feedback Oscillation stop, "L": High-Impedance Chip Center 0 0 Fig. 7-2 Pad Layout of IPS009BM-C2 (Cross Type ) S11-6/7 S11.104
15 Low Phase Noise IPS009BM Wide Vdd CMOS SPXO 0.7mm X1 y Die Size:0.70mm 0.75mm Pad Size:80um Thickness:150±20um IC Backside:Gnd or Open X2 x VSS Scribe line center 0.75mm Pad Name Function Location (μm) x y (+)Power Supply (Q) Frequency Output VSS (-)Ground X2 Crystal Drive X1 Crystal Feedback Oscillation stop, "L": High-Impedance Chip Center 0 0 Fig. 7-3 Pad Layout of IPS009BM-C3 (Cross Type ) Rex IC VSS Package IMPORTANT Notice for function * Rex should be over 10MΩ in case of = Open usage. * Oscillation will not be activated when = Open after = Low if Rex is below 10MΩ. * There is no such issue in case of = usage. Rex : External resistance value between and VSS of package. S11-7/7 S11.104
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3.3V ZERO DELAY CLOCK MULTIPLIER
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CD4094. CMOS 8-Stage Shift-and-Store Bus Register. Pinout. Features. Functional Diagram Applications. Description. December 1992
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3.3V ZERO DELAY CLOCK BUFFER
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DATASHEET CD4060BMS. Pinout. Features. Functional Diagram. Oscillator Features. Applications. Description
DATASHEET CDBMS CMOS 1 Stage Ripple-Carry Binary Counter/Divider and Oscillator FN3317 Rev. Features Pinout High Voltage Type (V Rating) Common Reset 1MHz Clock Rate at 15V Fully Static Operation Q1 Q13
DATASHEET CD4069UBMS. Features. Pinout. Applications. Functional Diagram. Description. Schematic Diagram. CMOS Hex Inverter
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IDT74FCT540AT/CT FAST CMOS OCTAL BUFFER/LINE DRIVER DESCRIPTION: FUNCTIONAL BLOCK DIAGRAM FEATURES:
FAST CMOS OCTAL BUFFER/LINE DRIVER IDT74FCT540AT/CT FEATURES: Low input and output leakage 1µ A (max.) CMOS power levels True TTL input and output compatibility VOH = 3. (typ.) VOL = 0. (typ.) Meets or
Product Data Sheet XO5629 series Ultra-low Power KHz Crystal Oscillator IC. Features. Application. Ordering Information.
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CMOS, Ultra-low Jitter Voltage Controlled Crystal Oscillators (VCXOs)
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EP15E7 D 2 H M TR. Pin 1 Connection Tri-State
eries Quartz Crystal Clock Oscillators XO (PXO) LVCMO (CMO) 2.5Vdc 4 Pad 2.5mm x 3.2mm Ceramic urface Mount (MD) Frequency Tolerance/tability ±50ppm Maximum over -20 C to +70 C ELECTRICAL PECIFICATION
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Product Data Sheet XO5029 series KHz Crystal Oscillorator IC. Features. Application. Ordering Information. Description.
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Ultra-miniature, Low Power, kHz MEMS Oscillator
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SRM2B256SLMX55/70/10
256K-BIT STATIC RAM Wide Temperature Range Extremely Low Standby Current Access Time 100ns (2.7V) 55ns (4.5V) 32,768 Words 8-Bit Asynchronous DESCRIPTION The SRM2B256SLMX is a low voltage operating 32,768
IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH
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ULTRA-LOW POWER OSCILLATOR 1-26MHz
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Low Phase Noise, LVPECL VCXO (for 150MHz to 160MHz Fundamental Crystals) FEATURES. * Internal 60KΩ pull-up resistor
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SiT9003 Low Power Spread Spectrum Oscillator
Features Frequency range from 1 MHz to 110 MHz LVCMOS/LVTTL compatible output Standby current as low as 0.4 µa Fast resume time of 3 ms (Typ)
3.3V ZERO DELAY CLOCK MULTIPLIER
3.3V ZERO DELAY CLOCK MULTIPLIER IDT2308 FEATURES: Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 1 operating frequency Distributes one clock input to two banks of four outputs
PL600-27T CLK0 XIN/FIN 1. Xtal Osc CLK1 XOUT CLK2. Low Power 3 Output XO PIN ASSIGNMENT FEATURES DESCRIPTION CLK2 GND VDD FIN CLK0 SOT23-6L
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CC series 1., 2.5,., 5.0 volt CMOS Oscillator Features CMOS output Output frequencies to 125 MHz Low jitter, Fundamental or rd OT Crystal Tristate output for board test and debug 10/70 or 0/5 C operating
Rad-hard 16-bit transceiver, 1.8 V to 3.3 V bidirectional level shifter. Description. Temp. range. Notes: (1) SMD = standard microcircuit drawing
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SN5414, SN54LS14, SN7414, SN74LS14 HEX SCHMITT-TRIGGER INVERTERS
Operation From Very Slow Edges Improved Line-Receiving Characteristics High Noise Immunity SN5414, SN54LS14, SN5414, SN54LS14...J OR W PACKAGE SN7414... D, N, OR NS PACKAGE SN74LS14... D, DB, OR N PACKAGE
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CLEARCLOCK POWER OPTIMIZED 0.12ps 5x7mm XO
FEATURES APPLICATIONS 0.125ps typ jitter (150fs MAX f > 200MHz, 25 C) Highest in-class frequency range from 50 to 2100MHz Excellent spurious suppresion 70mA MAX IDD (, any VDD) Lowest in-class power consumption
ICS722 LOW COST 27 MHZ 3.3 VOLT VCXO. Description. Features. Block Diagram DATASHEET
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LINEAR IMAGE SENSOR IC FOR CONTACT IMAGE SENSOR S-8603AWI
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DATASHEET CD40105BMS. Features. Description. Applications. Pinout. Functional Diagram. CMOS FIFO Register. FN3353 Rev 0.00 Page 1 of 10.
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EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.
EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at www.hest ore.hu. CD49BMS December 199 Features High-Voltage Type (V Rating) Medium Speed
ELECTRICAL SPECIFICATIONS PARAMETER SYMBOL CONDITION VALUE UNIT. Supply Voltage Vs Vs=+1.8V±5% is only for CML V
MEMS Differential Page 1 of 8 1 to 220 MHz High Performance LVPECL/ HCSL / LVDS / CML output High frequency stability SMD package 7.0 x 5.0 mm ELECTRICAL SPECIFICATIONS PARAMETER SYMBOL CONDITION VALUE
Ultra-miniature, Low Power, kHz MEMS Oscillator
ESD Sensitive Moisture Sensitivity Level (MSL) 1 FEATURES: APPLICATIONS: Factory programmable output frequency: 1Hz to 32.768kHz Available in two types of ultra-miniature packages: 2.0 x 1.2 x 0.6mm (SMD);
ICS1885. High-Performance Communications PHYceiver TM. Integrated Circuit Systems, Inc. General Description. Pin Configuration.
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Ultra Small PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits
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DATASHEET. CD4051BMS, CD4052BMS and CD4053BMS analog multiplexers/demultiplexers. Features. Description. Applications. FN3316 Rev 0.
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NT Output LCD Segment/Common Driver NT7703. Features. General Description. Pin Configuration 1 V1.0
160 Output LCD Segment/Common Driver Features (Segment mode)! Shift Clock frequency: 14 MHz (Max.) (VDD = 5V ± 10%) 8 MHz (Max.) (VDD = 2.5V - 4.5V)! Adopts a data bus system! 4-bit / 8-bit parallel input
PI6CX201A. 25MHz Jitter Attenuator. Features
Features PLL with quartz stabilized XO Optimized for MHz input/output frequency Other frequencies available Low phase jitter less than 30fs typical Free run mode ±100ppm Single ended input and outputs
CDC MHz CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS WITH 3-STATE OUTPUTS
Supports Pentium III Class Motherboards Uses a 14.318-MHz Crystal Input to Generate Multiple Output Frequencies Includes Spread Spectrum Clocking (SSC), 0.5% Downspread for Reduced EMI Performance Power
S-8604BWI LINEAR IMAGE SENSOR IC FOR CONTACT IMAGE SENSOR
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DESCRIPTION FEATURES + The XCO clock series is a cutting edge family of low to high frequency, low jitter output, single or multi - frequency clock oscillators. The XCO clocks are available in 7.0 x 5.0,
4-DIGIT FIXED TIMER WITH LCD DRIVER
1. GENERAL DESCRIPTION The is a countdown timer, which has six internal presettin g intervals: 1; 3; 5 ;15; 30; 60 mins. The selected time is set by connecting appropriate K i input to V cc. The K i is