SUBCARRIER PHASE LOCKED LOOP

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Domenic Ramsey
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1 Order this document by C/D The C is a gated phaselocked loop intended for, but not restricted to, video applications. The integrated circuit contains a gated phase detector, voltage controlled crystal oscillator, divideby circuitry, and a video clamp. This device provides a X reference frequency output, and a X reference frequency output. The C is manufactured using otorola s high density, bipolar OSAIC process. Pin DIP or Surface ount Package GatedPhase Detector Single Pin Voltage Controlled Crystal Oscillator X and X Operates Off of a Standard.0 V Supply SUBCARRIER PHASELOCKED LOOP SEICONDUCTOR TECHNICAL DATA P SUFFIX PLASTIC PACKAGE CASE Representative Block Diagram D SUFFIX PLASTIC PACKAGE CASE (SO) +.0 Burst Gate Composite Video X PIN CONNECTIONS 0.µ.0n Voltage.V Clamp Out Gate Pulse Video Clamp Video In Clamp In Phase Det Out Phase Detector Gnd Phase Detector Burst Gate Comp Video Input Divide by Voltage Control Input X Ref Drive VCO X Ref Out Crystal X Sub Xtal (Top View) X.0n 0p k 0.µ./.Hz.0 to p Device CD CP ORDERING INFORATION Operating Temperature Range TA = 0 to +0 C Package SO Plastic OTOROLA ANALOG IC DEVICE DATA otorola, Inc. 99 Rev

2 C ABSOLUTE AXIU RATINGS Rating Symbol Value Unit Supply Voltage.0 Vdc Operating Ambient Temperature TA 0 to +0 C Storage Temperature Range Tstg to +0 C Operating Junction Temperature TJ +0 C RECOENDED OPERATING CONDITIONS Characteristic Pin Symbol in Typ ax Unit Supply Voltage..0. Vdc Composite Video Input (Note ) mvpp Burst Amplitude to Acquire Lock NOTE:. Total peaktopeak voltage of video should not exceed ground or V CC. ELECTRICAL CHARACTERISTICS ( =.0 Vdc, TA = C) Characteristic Pin in Typ ax Unit Operating Current.0 0 ma Burst Gate Threshold Voltage: VIH.0 Vdc VIL. Burst Gate Input Current: IIH (Vin =.0 V) 0 µa IIL (Vin = 0 V) 0. X Voltage: (. Hz) mvpp Voltage: (. Hz) 0 Impedance: (. Hz and. Hz) Ω Voltage: (. Hz and. Hz) mvpp Impedance: (. Hz and. Hz) 00 Ω Phase Angle (Note ) 0 deg Phase Sensitivity (Notes & ).0 Note Static Phase Error (Note ), deg/00 Hz PhaseLocked Loop PullIn Range ± 0 Hz PhaseLocked Loop HoldIn Range ± 00 NOTES:. d to composite video input color burst. NOTES:. See paragraph of the Functional Description text. OUTPUT (PIN ) FREQUENCY (Hz) FOR NTSC Xf sc,..0.. Figure. Typical VCXO Gain KOPAL. The gain must be estimated from the operating point. KO PAL is the gain for. PAL applications and KO NTSC is the. gain for NTSC applications VCO CONTROL VOLTAGE (PIN VOLTAGE) (V) KONTSC Xf sc, OUTPUT (PIN ) FREQUENCY (Hz) FOR PAL Table. Crystal Specifications Frequency. Hz (NTSC). Hz (PAL) ode Frequency C df/dfo 0 C 0 C Load Capacitance ESR C (Internal Series Capacitance) Fundamental 0 ppm 0 pf 0 Ω mpf OTOROLA ANALOG IC DEVICE DATA

3 C +.0 Burst Gate Figure. Representative Schematic Diagram Composite Video 0.µ X.0k.0n Voltage.V Clamp Out Gate Pulse Video Clamp Video In Clamp In Phase Det Out Phase Detector Divide by Voltage Control Input X Ref Drive VCO X Ref Out Crystal.0k.0n 0p k 0.µ./.Hz.0 to p The C is designed to implement the color sync function in a video system. When provided NTSC/PAL composite video or composite chroma and burst gate inputs, the IC will phaselock a Voltage Controlled Crystal Oscillator (VCXO) to the color burst. Both X and X subcarrier frequency outputs are provided by the IC. The VCXO operates off of a X subcarrier crystal and The VCXO operates off a X subcarrier crystal and is capable of at least ± 00 Hz of pullin. The tradeoff for such a wide pullin range is a resultant soft lock, or a phase shift per 00 Hz change in oscillator freerun or input reference frequency. In addition to providing the gate pulse for the C phase detector, the Burst Gate input also initiates a clamp pulse that sets up the level of the composite video at the input to the Phase Detector. The start and duration of the Gate Pulse should be timed so that the pulse envelopes the color burst of the video signal, but not so wide as to gate sync or video into the Phase Detector. The Phase Detector is enabled when the voltage at the Burst Gate input (Pin ) is above the nominal. V threshold. While this makes possible the ability to lock to a color burst, it does not exclude the possibility of lock to a constant reference. If a constant source is to be the reference, the Phase Detector can be permanently enabled by holding the voltage on the Phase Detector input pin higher than the threshold voltage. The phase detector gain must be specified in two ways, for a constant reference and for a burstlocked application. The gain in a constant reference application is specified by the maximum current output with the maximum phase error. For FUNCTIONAL DESCRIPTION a maximum phase error of π/ radians the maximum current available is approximately 00 µa. So the phase detector gain is defined as, KPD = 00/(π/)(µA/rad sec) For a burstlocked application, the Phase Detector is active for only the duration of the color burst. Therefore the phase detector gain must be specified as an average gain over a line period. In this case the phase detector gain for NTSC and for PAL applications is, KPDNTSC = (/(π/))(µa/rad sec) and, KPDPAL = (/(π/))(µa/rad sec) A suitable filter for both types of applications is shown in the test schematic Figure. This same filter also works for both NTSC and PAL applications. The X subcarrier Voltage Controlled Crystal Oscillator (VCXO) uses a design that enables the use of series or parallel resonant types of crystals. Still, layout and crystal positioning are critical as the oscillator frequency is sensitive to shunt capacitance. Care should be taken to keep the crystal close to the IC and crystal switching should be avoided. A suitable parallel type crystal would meet the specifications in Table. A plot showing the VCXO gain is shown in Figure. From this plot the gain must be estimated from the operating point. KOPAL is the gain for PAL applications and KONTSC is the gain for NTSC applications. OTOROLA ANALOG IC DEVICE DATA

4 C PIN FUNCTION DESCRIPTION Name Pin Representative Circuitry Description Expected Waveforms.0k 00. A phaselocked reference of the PAL or NTSC color burst is output at this pin. A 00 mvpp square wave is output. Some high frequency content is present. Ground Circuit Ground Phase Detector.0k k k.v The error current from the phase detector is output at this pin. A filter circuit should be connected at this pin. A beat waveform, showing both horizontal period and half the subcarrier period, is present. / Period Line Period X Sub Xtal 00 gm Vref gm.0k Crystal Oscillator Pin. A X subcarrier parallel resonant crystal, in series with a.0 to pf trimmer capacitor provides the resonant element for the Voltage Controlled Crystal Oscillator (VCXO). Approximately 0 mvpp. A scope probe will disturb the frequency of oscillation. X (or Black Burst).0k Buffered output from the X voltage controlled oscillator. The sinusoidal Xfsc oscillator output is available at this pin. The output is nominally: mvpp for NTSC, mvpp for PAL. Composite Video Input (Black Burst, Continuous Wave, or Composite Chroma can also be applied) k Composite Video Input. Color burst from the video present at this pin is used as a reference to phase lock the VCXO. Positive or negative video may be used. Composite video should be applied at this pin. The color burst amplitude of the input video should be at least 0 mv, but no more than 000 mv. The waveform at this pin should not exceed ground or..v GND Burst Gate Input Input for the phase detector gate pulse. TTL compatible. The threshold is nominally.v. A positive going gate pulse should be applied at this pin. The Burst Gate input should envelope the color burst. k k Pin Pin.V Power Supply Pin..0 Vdc should be applied at this pin. OTOROLA ANALOG IC DEVICE DATA

5 C Linear and TTL Buffers The output buffers of the C are not designed to any specific logic family. If it is desired, Linear or TTL buffers can be added externally. Figure shows an example of a Linear buffer using an C Transistor array; virtually any utility transistor can be used. Figure shows a TTL type buffer using an CLS0 buffer. Figure. Linear Buffer +.0V C +.0V X or X Cin 000µF R.k R.k R 0 9 R 0 Co 000µF Linear C 00pF R 00 Figure. TTL Buffer R.0k X or X C 0.0µF R 0k CLS0 0 9 C pf TTL OTOROLA ANALOG IC DEVICE DATA

6 C OUTLINE DIENSIONS P SUFFIX PLASTIC PACKAGE CASE 0 F B NOTES:. DIENSION L TO CENTER OF LEADS WHEN FORED PARALLEL.. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS).. DIENSIONING AND TOLERANCING PER ANSI Y., AND 0 OBSOLETE, NEW STANDARD 0. NOTE T SEATING PLANE H A G D N C K φ 0. (0.00) T A B L J DI A B C D F G H J K L N ILLIETERS IN AX BSC BSC INCHES IN AX BSC BSC D SUFFIX PLASTIC PACKAGE CASE 0 (SO) SEATING PLANE T G D PL A B P K C PL 0. (0.00) T B S A S 0. (0.00) B R X F J NOTES:. DIENSIONS A AND B ARE DATUS AND T IS A DATU SURFACE.. DIENSIONING AND TOLERANCING PER ANSI Y., 9.. CONTROLLING DI: ILLIETER.. DIENSION A AND B DO NOT INCLUDE OLD PROTRUSION.. AXIU OLD PROTRUSION 0. (0.00) PER SIDE.. 0 AND 0 OBSOLETE, NEW STANDARD 0. DI A B C D F G J K P R ILLIETERS IN AX BSC 0.00 BSC INCHES IN AX OTOROLA ANALOG IC DEVICE DATA

7 C otorola reserves the right to make changes without further notice to any products herein. otorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does otorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in otorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. otorola does not convey any license under its patent rights nor the rights of others. otorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the otorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use otorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold otorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that otorola was negligent regarding the design or manufacture of the part. otorola and are registered trademarks of otorola, Inc. otorola, Inc. is an Equal Opportunity/Affirmative Action Employer. OTOROLA ANALOG IC DEVICE DATA

8 C How to reach us: USA / EUROPE / Locations Not Listed: otorola Literature Distribution; JAPAN: Nippon otorola Ltd.; TatsumiSPDJLDC, F SeibuButsuryuCenter, P.O. Box 09; Phoenix, Arizona or 00 Tatsumi KotoKu, Tokyo, Japan. 0 FAX: RFAX0@ .sps.mot.com TOUCHTONE 009 ASIA/PACIFIC: otorola Semiconductors H.K. Ltd.; B Tai Ping Industrial Park, INTERNET: Ting Kok Road, Tai Po, N.T., Hong Kong. 99 OTOROLA ANALOG IC DEVICE C/D DATA

9 This datasheet has been download from: Datasheets for electronics components.

QUAD EIA 422/3 LINE RECEIVER WITH THREE STATE OUTPUTS

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