LTC Dual Matched 14MHz Filter with Low Noise, Low Distortion Differential Amplifi er FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION

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1 FEATURES n Two Matched MHz nd Order Lowpass Fiters with Differentia Ampifi ers Gain Match: ±. Max, Passband Phase Match: ±. Max, Passband Singe-Ended or Differentia Inputs n < c Distortion in Passband n.nv/ Hz Op Amp Noise Density n Pin-Seectabe Gain (/6/9.) n Pin-Seectabe Power Consumption (.3mA/ 6.mA/33.mA) n Rai-to-Rai Output Swing Adjustabe Output Common Mode Votage Contro Buffered, Low Impedance Outputs n.v to.v Suppy Votage n Sma -Pin 6mm 3mm.mm DFN Package APPLICATIONS n Broadband Wireess ADC Driver/Fiter n Antiaiasing Fiter n Singe-Ended to Differentia Conversion n DAC Smoothing Fiter n Zero-IF Direct Conversion Receivers DESCRIPTION LTC66- Dua Matched MHz Fiter with Low Noise, Low Distortion Differentia Ampifi er The LTC 66- contains two independent, fuy differentia ampifiers configured as matched nd order MHz owpass fiters. The f 3 of the fiters is adjustabe in the range of.mhz to MHz and MHz. The interna op amps are fuy differentia, feature very ow noise and distortion, and are compatibe with 6-bit dynamic range systems. The inputs can accept singeended or differentia signas. An input pin is provided for each ampifier to set the common mode eve of the differentia outputs. Interna aser-trimmed resistors and capacitors determine a precise, very we matched (in gain and phase) MHz nd order fi ter response. A singe optiona externa resistor per channe can taior the frequency response for each ampifier. Three-state BIAS pins determine each ampifier s power consumption, aowing a choice between shutdown, medium power or fu power. The LTC66- is avaiabe in a compact 6mm 3mm -pin eadess DFN package and operates over a C to C temperature range., LT, LTC and LTM are registered trademarks of Linear Technoogy Corporation. A other trademarks are the property of their respective owners. TYPICAL APPLICATION Dua, Matched.MHz Lowpass Fiter Channe to Channe Phase Matching V INA V INB 3V 3V LTC TA.μF.μF.μF.μF 3V 3V V OUTA V OUTB NUMBER OF UNITS TYPICAL UNITS TA = f IN = MHz PHASE MATCH (DEG) 66 TAb

2 LTC66- ABSOLUTE MAXIMUM RATINGS (Note ) Tota Suppy Votage (V to V )...V Input Current (Note )...±ma Output Short-Circuit Duration (Note 3)... Indefinite Operating Temperature Range (Note )... C to C Specifi ed Temperature Range (Note )... C to C Junction Temperature... C Storage Temperature Range... 6 C to C PIN CONFIGURATION TOP VIEW IN A IN A BIAS A IN A IN A V IN B IN B BIAS B IN B IN B OUT A V A V V OCMA OUT A V OUT B V B V V OCMB OUT B DJC PACKAGE -LEAD (6mm 3mm) PLASTIC DFN T JMAX = C, θ JA = 6. C/W EXPOSED PAD (PIN 3) IS V, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC66CDJC-#PBF LTC66CDJC-#TRPBF 66 -Lead (6mm 3mm) Pastic DFN C to C LTC66IDJC-#PBF LTC66IDJC-#TRPBF 66 -Lead (6mm 3mm) Pastic DFN C to C Consut LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a abe on the shipping container. Consut LTC Marketing for information on non-standard ead based fi nish parts. For more information on ead free part marking, go to: For more information on tape and ree specifi cations, go to: DC ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the fu operating temperature range, otherwise specifi cations are at T A = C. V = 3V, V = V, V INCM = V OCM = mid-suppy, BIAS tied to V, R L = Open, R BAL = k. The fi ter is confi gured for a gain of, uness otherwise noted. V S is defi ned as (V V ). V OUTCM is defi ned as (V OUT V OUT )/. V INCM is defi ned as (V INP V INM )/. V OUTDIFF is defi ned as (V OUT V OUT ). V INDIFF is defi ned as (V INP V INM ). See Figure. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V OS Differentia Offset Votage (at Op Amp V S =.V to V ±. ± Inputs) (Note 6) ΔV OS /ΔT Differentia Offset Votage Drift (at Op Amp Inputs) BIAS = V BIAS = Foating ± ± μv/ C μv/ C I B I OS Input Bias Current (at Op Amp Inputs) (Note ) Input Offset Current (at Op Amp Inputs) (Note ) BIAS = V BIAS = Foating 6 3. μa μa ± μa

3 LTC66- DC ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the fu operating temperature range, otherwise specifi cations are at T A = C. V = 3V, V = V, V INCM = V OCM = mid-suppy, BIAS tied to V, R L = Open, R BAL = k. The fi ter is confi gured for a gain of, uness otherwise noted. V S is defi ned as (V V ). V OUTCM is defi ned as (V OUT V OUT )/. V INCM is defi ned as (V INP V INM )/. V OUTDIFF is defi ned as (V OUT V OUT ). V INDIFF is defi ned as (V INP V INM ). See Figure. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V INCM Input Common Mode Votage Range (Note ) V S = 3V V S = V.... V V CMRR PSRR V OSCM V OCM Common Mode Rejection Ratio (ΔV INCM /ΔV OS ) (Note 9) Power Suppy Rejection Ratio (ΔV S /ΔV OS ) (Note ) Common Mode Offset Votage (V OUTCM V OCM ) Output Common Mode Range (Vaid Range for V OCM Pin) (Note ) V S = 3V; ΔV INCM =.V V S = V; ΔV INCM =.V V S =.V to V 66 9 V S = 3V V S = V V S = 3V V S = V V MID Sef-Biased Votage at the V OCM Pin V S = 3V... V R VOCM Input Resistance of V OCM Pin.. 3. kω V OUT Output Votage Swing, High (Measured Reative to V ) Output Votage Swing, Low (Measured Reative to V ) I SC Output Short-Circuit Current (Note 3) V S = 3V V S = V V S = 3V; I L = ma V S = 3V; I L = ma V S = 3V; I L = ma V S = V; I L = ma V S = V; I L = ma V S = V; I L = ma V S = 3V; I L = ma V S = 3V; I L = ma V S = 3V; I L = ma V S = V; I L = ma V S = V; I L = ma V S = V; I L = ma V S Suppy Votage.. V I S Suppy Current (per Channe) V S =.V to V; BIAS = V V S =.V to V; BIAS = Foating V S =.V to V; BIAS = V BIAS Pin Range for Shutdown Referenced to V. V BIAS Pin Range for Medium Power Referenced to V. V BIAS Pin Range for Fu Power Referenced to V.3 V S V BIAS Pin Sef-Biased Votage (Foating) Referenced to V... V R BIAS BIAS Pin Input Resistance kω t ON Turn-On Time V S = 3V, V BIAS = V to V ns t OFF Turn-Off Time V S = 3V, V BIAS = V to V ns ± ± ± ± ± ± ± ± V V ma ma ma ma ma 3

4 LTC66- AC ELECTRICAL CHARACTERISTICS The denotes the specifi cations which appy over the fu operating temperature range, otherwise specifi cations are at T A = C. V = 3V, V = V, V INCM = V OCM = mid-suppy, V BIAS = V, uness otherwise noted. Fiter confi gured as in Figure, uness otherwise noted. V S is defi ned as (V V ). V OUTCM is defi ned as (V OUT V OUT )/. V INCM is defi ned as (V IN V IN )/. V OUTDIFF is defi ned as (V OUT V OUT ). V INDIFF is defi ned as (V IN V IN ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Gain Fiter Gain ΔV IN = ±.V, DC V INDIFF =.V P-P, f = MHz V INDIFF =.V P-P, f =.MHz V INDIFF =.V P-P, f = MHz V INDIFF =.V P-P, f = MHz V INDIFF =.V P-P, f = MHz Phase Fiter Phase ΔV IN = ±.V, DC V INDIFF =.V P-P, f = MHz V INDIFF =.V P-P, f =.MHz V INDIFF =.V P-P, f = MHz ΔGain Gain Match (Channe-to-Channe) ΔV IN = ±.V, DC V INDIFF =.V P-P, f = MHz V INDIFF =.V P-P, f =.MHz V INDIFF =.V P-P, f = MHz ΔPhase Phase Match (Channe-to-Channe) V INDIFF =.V P-P, f = MHz V INDIFF =.V P-P, f =.MHz V INDIFF =.V P-P, f = MHz V/V Gain Fiter Gain in V/V Confi guration Inputs at ±IN Pins, ±IN Pins Foating f O TC Noise e n i n HD HD ± ±. ±. ±. ±. ±. ±. ± Deg Deg Deg Deg Deg Deg Deg ΔV IN = ±.V, DC Channe Separation V INDIFF = V P-P, f = MHz 96 Fiter Cut-Off Frequency Temperature Coeffi cient (T = C to C) Integrated Output Noise (BW = khz to MHz) Input Referred Noise Density (f = MHz) Votage Noise Density Referred to Op Amp Inputs (f = MHz) Current Noise Density Referred to Op Amp Inputs (f = MHz) nd Harmonic Distortion f IN = MHz; V IN = V P-P Singe-Ended 3rd Harmonic Distortion f IN = MHz; V IN = V P-P Singe-Ended BIAS = V BIAS = Foating BIAS = V Figure, Gain = Figure, Gain = Figure, Gain = 3 BIAS = V BIAS = Foating BIAS = V BIAS = Foating BIAS = V BIAS = Foating, R LOAD = Ω BIAS = V BIAS = Foating, R LOAD = Ω 9 3 ppm/ C ppm/ C μv RMS nv/ Hz nv/ Hz nv/ Hz nv/ Hz nv/ Hz pa/ Hz pa/ Hz c c c c Note : Stresses beyond those isted under Absoute Maximum Ratings may cause permanent damage to the device. Exposure to any Absoute Maximum Rating condition for extended periods may affect device reiabiity and ifetime. Note : A pins are protected by steering diodes to either suppy. If any pin is driven beyond the LTC66- s suppy votage, the excess input current (current in excess of what it takes to drive that pin to the suppy rai) shoud be imited to ess than ma. Note 3: A heat sink may be required to keep the junction temperature beow the Absoute Maximum Rating when the output is shorted indefi nitey. Long-term appication of output currents in excess of the Absoute Maximum Ratings may impair the ife of the device. Note : Both the LTC66C and the LTC66I are guaranteed functiona over the operating temperature range C to C. Note : The LTC66C is guaranteed to meet specifi ed performance from C to C. The LTC66C is designed, characterized and expected to meet specifi ed performance from C to C, but is not tested or QA samped at these temperatures. The LTC66I is guaranteed to meet specifi ed performance from C to C. Note 6: Output referred votage offset is a function of gain. To determine output referred votage offset, or output votage offset drift, mutipy V OS by the noise gain ( GAIN). See Figure 3. Note : Input bias current is defi ned as the average of the currents f owing into the noninverting and inverting inputs of the interna ampifi er and is cacuated from measurements made at the pins of the IC. Input offset current is defi ned as the difference of the currents f owing into the noninverting and inverting inputs of the interna ampifi er and is cacuated from measurements made at the pins of the IC.

5 ELECTRICAL CHARACTERISTICS Note : See the Appications Information section for a detaied discussion of input and output common mode range. Input common mode range is tested by measuring the differentia DC gain with V INCM = mid-suppy, and again with V INCM at the input common mode range imits isted in the Eectrica Characteristics tabe, with ΔV IN = ±., verifying that the differentia gain has not deviated from the mid-suppy common mode input case by more than.%, and that the common mode offset (V OSCM ) has not deviated from the mid-suppy common mode offset by more than ±. Output common mode range is tested by measuring the differentia DC gain with V OCM = mid-suppy, and again with votage set on the V OCM pin at the output common range imits isted in the Eectrica Characteristics LTC66- tabe, verifying that the differentia gain has not deviated from the mid-suppy common mode input case by more than.%, and that the common mode offset (V OSCM ) has not deviated by more than ± from the mid-suppy case. Note 9: CMRR is defi ned as the ratio of the change in the input common mode votage at the interna ampifi er inputs to the change in differentia input referred votage offset (V OS ). Note : Power suppy rejection ratio (PSRR) is defi ned as the ratio of the change in suppy votage to the change in differentia input referred votage offset (V OS ). TYPICAL PERFORMANCE CHARACTERISTICS SUPPLY CURRENT (ma) Suppy Current vs Temperature V INCM = V OCM = MID-SUPPLY V S =.V, BIAS = FLOAT V S = 3V, BIAS = FLOAT V S = V, BIAS = FLOAT V S =.V, BIAS = V V S = 3V, BIAS = V V S = V, BIAS = V. 6 6 TEMPERATURE ( C) 66 G GAIN (V/V) Fiter Gain vs Temperature V S = 3V, BIAS = V V INCM = V OCM = MID-SUPPLY REPRESENTATIVE UNITS 6 TEMPERATURE ( C) 66 G FREQUENCY SHIFT OF f 3 (%) Frequency vs Temperature BIAS = FLOAT BIAS = V V S = 3V V INCM = V OCM =.V 6 TEMPERATURE ( C) 66 G3 GAIN MAGNITUDE () 3. Fiter Frequency Response BIAS = V BIAS PIN FLOATING V S = 3V V INCM = V OCM = MID SUPPLY. 66 G

6 LTC66- TYPICAL PERFORMANCE CHARACTERISTICS DISTORTION (c) 6 9 Harmonic Distortion vs Frequency, BIAS High DIFFERENTIAL INPUT, HD DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD SINGLE-ENDED INPUT, HD3 DISTORTION (c) 6 9 Harmonic Distortion vs Frequency, BIAS Foating DIFFERENTIAL INPUT, HD DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD SINGLE-ENDED INPUT, HD3 DISTORTION (c) 6 9 Harmonic Distortion vs Input Ampitude DIFFERENTIAL INPUT, HD DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD SINGLE-ENDED INPUT, HD3. 66 G V IN = V P-P,V S = 3V R L = Ω DIFFERENTIAL, GAIN = V/V. 66 G6 V IN = V P-P,V S = 3V R L = Ω DIFFERENTIAL, GAIN = V/V 3 6 V IN (V P-P ) 66 G V S = 3V, BIAS TIED TO V,V INCM = V OCM =.V, R LOAD = Ω, f IN = 3MHz, GAIN = V/V DISTORTION (c) 6 9 Harmonic Distortion vs Input Common Mode Votage (V S = 3V) DIFFERENTIAL INPUT, HD DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD SINGLE-ENDED INPUT, HD INPUT COMMON MODE VOLTAGE (V) V IN = V P-P,V OCM =.V 66 G BIAS = 3V, f = 3MHz R L = Ω DIFFERENTIAL, GAIN = V/V DISTORTION (c) 6 9 Harmonic Distortion vs Input Common Mode Votage (V S = V) DIFFERENTIAL INPUT, HD DIFFERENTIAL INPUT, HD3 SINGLE-ENDED INPUT, HD SINGLE-ENDED INPUT, HD INPUT COMMON MODE VOLTAGE (V) V IN = V P-P,V OCM =.V 66 G9 BIAS = V, f = 3MHz R L = Ω DIFFERENTIAL, GAIN = V/V NOISE SPECTRAL DENSITY (nv/ Hz) Differentia Output Noise vs Frequency V S = 3V BIAS TIED TO V OUTPUT NOISE SPECTRAL DENSITY INTEGRATED OUTPUT NOISE G INTEGRATED NOISE (μvrms) CHANNEL SEPARATION () Channe Separation vs Frequency BIAS = V BIAS = FLOAT VOLTAGE (V) Overdrive Transient Response OUT OUT IN IN 6. V IN = V P-P,V S = 3V R L = Ω DIFFERENTIAL 66 G. ns/div V S = 3V, V OCM =.V BIAS = 3V, R LOAD = Ω 66 G

7 TEST CIRCUITS LTC66- LTC66-.pF V OUT Ω I L Ω Ω Ω Ω.pF V V INP.μF.μF R BAL BIAS 3 BIAS V V OUTCM V INM Ω Ω.pF V 36k 36k 9 V OCM.μF.μF R BAL Ω Ω.pF V V OUT Ω I L 66 TC Figure. DC Test Circuit (Channe A Shown) μf V IN LTC66- Ω Ω.pF V OUT Ω μf Ω Ω.pF.μF V.μF COILCRAFT TTWB--B V IN BIAS 3 BIAS V V.μF Ω μf V IN Ω Ω Ω Ω.pF.pF V 36k 36k 9 V OCM.μF V OUT Ω μf 66 TC Figure. AC Test Circuit (Channe A Shown)

8 LTC66- PIN FUNCTIONS IN A, IN A, IN B, IN B (Pins,,, ): Inputs to Trimmed Ω Resistors. Can accept an input signa, be foated, tied to an output pin, or connected to externa components. IN A, IN A, IN B, IN B (Pins,,, ): Inputs to Trimmed Ω Resistors. Can accept an input signa, be foated, tied to an output pin, or connected to externa components. BIAS A, BIAS B (Pins 3, 9): Three-State Input to Seect Ampifi er Power Consumption. Drive ow for shutdown, drive high for fu power, eave f oating for medium power. BIAS presents an input resistance of approximatey k to a votage.v above V. V (Pins 6,,, ): Negative Suppy. A V pins shoud be connected to the same votage, either a ground pane or a negative suppy rai. V OCMA, V OCMB (Pins 9, 3): The votage appied to these pins sets the output common mode votage of each fiter channe. If eft foating, V OCM sef-biases to a votage midway between V and V. V A, V B (Pins, ): Positive Suppy for Fiter Channe A and B, Respectivey. These are not connected to each other internay. OUT A, OUT A, OUT B, OUT B (Pins,, 6, ): Differentia Output Pins. Exposed Pad (Pin 3): Aways tie the underying Exposed Pad to V. If spit suppies are used, do not tie the pad to ground.

9 BLOCK DIAGRAM LTC66-.pF OUT A IN A Ω Ω IN A Ω Ω.pF V A BIAS A 3 BIAS V A V IN A Ω Ω.pF 36k 36k 9 V OCMA IN A Ω Ω.pF V OUT A V 6 V.pF 6 OUT B IN B Ω Ω IN B Ω Ω.pF V B BIAS B 9 BIAS V V B IN B Ω Ω.pF 36k 36k 3 V OCMB IN B Ω Ω.pF V OUT B 66 BD 9

10 LTC66- APPLICATIONS INFORMATION Functiona Description The LTC66- is designed to make the impementation of high frequency fuy differentia fitering functions very easy. Two very ow noise ampifi ers are surrounded by precision matched resistors and precision matched capacitors enabing various fiter functions to be impemented by hard wiring pins. The ampifiers are wide band, ow noise and ow distortion fuy differentia ampifiers with accurate output phase baancing. They are optimized for driving ow votage, singe-suppy, differentia input anaog-todigita converters (ADCs). The LTC66- operates with a suppy votage as ow as.v and accepts inputs up to 3 beow the V power rai, which makes it idea for converting ground referenced, singe-ended signas into differentia signas that are referenced to the user-suppied common mode votage. This is idea for driving ow votage, singe-suppy, differentia input ADCs. The baanced differentia nature of the ampifier and matched surrounding components provide even-order harmonic distortion canceation, and ow susceptibiity to common mode noise (ike power suppy noise). The LTC66- can be operated with a singe-ended input and differentia output, or with a differentia input and differentia output. The outputs of the LTC66- can swing rai-to-rai. They can source or sink a transient ma of current. Load capacitances shoud be decouped with at east Ω of series resistance from each output. Fiter Frequency Response and Gain Adjustment Figure 3 shows the fiter architecture. The Lapace transfer function can be expressed in the form of the foowing generaized equation for a nd order owpass fiter: V OUT(DIFF) GAIN =, V IN(DIFF) s πf O Q s πf O ( ) with GAIN, f O and Q as given in Figure 3. Note that GAIN and Q of the fiter are based on component ratios, which both match and track extremey we over temperature. The corner frequency f O of the fi ter is a function of an RC product. This RC product is trimmed to ±% and is not expected to drift by more than ±% from nomina over the entire temperature range C to C. As a resut, fuy differentia fiters with tight magnitude, phase toerance and repeatabiity are achieved. Various vaues for resistors R and R can be formed by pin-strapping the interna Ω and Ω resistors, and optionay by incuding one or more externa resistors. Note that non-zero source resistance shoud be combined with, and incuded in, R. R Ω C.pF R R3 Ω C.pF RA V IN(DIFF) R R EXT RB R3 Ω C.pF V OUT(DIFF) R Ω C.pF R = RA RB R EXT 66 F3 Figure 3. Fiter Architecture and Equations

11 LTC66- APPLICATIONS INFORMATION Setting the passband gain (GAIN = R/R) ony requires choosing a vaue for R, since R is a fixed interna Ω. Therefore, the foowing three gains can be easiy configured without externa components: Tabe. Confi guring the Passband Gain Without Externa Components GAIN (V/V) GAIN () R (Ω) INPUT PINS TO USE Drive the Ω Resistors. Tie the Ω Resisters Together. 6 Drive the Ω Resistors Drive the Ω and Ω Resistors in Parae. The resonant frequency, f O, is independent of R, and therefore independent of the gain. For any LTC66- fiter confi guration that conforms to Figure 3, the f O is fixed at 6.MHz. The f 3 frequency depends on the combination of f O and Q. For any specifi c gain, Q is adjusted by the seection of R. Setting the f 3 Frequency Using an externa resistor (R EXT ), the f 3 frequency is adjustabe in the range of.mhz to.mhz (see Figure 3). The minimum f 3 is set for R EXT equa to Ω and the maximum f 3 is arbitrariy set for a maximum passband gain peak ess than. Tabe. R EXT Seection GAIN =, R = Ω, RA = RB = Ω f 3 (MHz) R EXT Ω Figure shows three fiter configurations with an f 3 =.3MHz, without any externa components. These fiters have a Q =., which is an amost idea Besse characteristic with inear phase. Figure shows fi ter configurations that use some externa resistors, and are taiored for a very fat passband. Many other confi gurations are possibe by using the equations in Figure 3. For exampe, externa resistors can be added to modify the vaue of R to confi gure GAIN. For an even more fexibe fiter IC with simiar performance, consider the LTC66. BIAS Pin Each channe of the LTC66- has a BIAS pin whose function is to taior both performance and power. The BIAS pin can be modeed as a votage source whose potentia is.v above the V suppy and that has a Thevenin equivaent resistance of k. This three-state pin has fixed ogic eves reative to V (see the Eectrica Characteristics tabe), and can be driven by any externa source that can drive the BIAS pin s equivaent input impedance. If the BIAS pin is tied to the positive suppy, the part is in a fuy active state configured for highest performance (owest noise and owest distortion). If the BIAS pin is foated (eft unconnected), the part is in a fuy active state, but with ampifier currents reduced and performance scaed back to preserve power consumption. Care shoud be taken to imit externa eakage currents to this pin to under μa to avoid putting the part in an unexpected state. If the BIAS pin is tied to the most negative suppy (V ), the part is in a ow power shutdown mode with ampifier outputs disabed. In shutdown, a interna biasing current sources are shut off, and the output pins each appear as open coectors with a non-inear capacitor in parae and steering diodes to either suppy. Because of the non-inear capacitance, the outputs can sti sink and source sma amounts of transient current if exposed to significant votage transients. Using this function to wire-or outputs together is not recommended.

12 LTC66- APPLICATIONS INFORMATION f 3 =.3MHz GAIN = V/V () Z IN = Ω 66 Fa f 3 =.3MHz GAIN = V/V (6) Z IN = Ω 66 Fb f 3 =.3MHz GAIN = 3V/V (9.) Z IN = 33Ω 66 Fc Gain Response Gain Response Gain Response GAIN MAGNITUDE () GAIN MAGNITUDE () GAIN MAGNITUDE () Gd 66 Ge 66 Gf PHASE (DEG) 6 6. Phase and Group Deay Response GROUP DELAY PHASE Gi GROUP DELAY (ns) /DIV Sma Signa Step Response GAIN = V/V ns/div 66 Gj Figure. f 3 =.3MHz Fiter Confi gurations without Externa Components

13 APPLICATIONS INFORMATION LTC66- Ω Ω Fa ±. MHz PASSBAND GAIN = V/V () Z IN = Ω 66 Fc ±. MHz PASSBAND GAIN = V/V (6) Z IN = Ω Gain Response Gain Response GAIN MAGNITUDE () GAIN MAGNITUDE () Gd 66 Ge PHASE (DEG) Passband Phase and Group Deay 3 PHASE 3 3 GROUP DELAY 66 Gi GROUP DELAY (ns) /DIV Sma Signa Step Response GAIN = V/V ns/div 66 Gj Figure. Fat Passband Fiter Confi gurations with Some Externa Resistors 3

14 LTC66- APPLICATIONS INFORMATION Input Impedance Cacuating the ow frequency input impedance depends on how the inputs are driven. Figure 6 shows a simpified ow frequency equivaent circuit. For baanced input sources (V INP = V INM ), the ow frequency input impedance is given by the equation: R INP = R INM = R Therefore, the differentia input impedance is simpy: R IN(DIFF) = R V INP V INM R INP R INM R R R3 R3 R R Figure 6. Input Impedance.μF 66 F6 V OUT V OUTDIFF V OUT V OCM For singe-ended inputs (V INM = ), the input impedance increases over the baanced differentia case due to the fact that the summing node (at the junction of R, R and R3) moves in phase with V INP to bootstrap the input impedance. Referring to Figure 6 with V INM =, the input impedance ooking into either input is: R R INP = R INM R RR Input Common Mode Votage Range The input common mode votage is defined as the average of the two inputs into resistor R: V INCM = V INP V INM The input common mode range is a function of the fiter confi guration (GAIN), V INDIFF and the V OCM potentia. Referring to Figure 6, the summing junction where R, R and R3 merge together shoud not swing within.v of the V power suppy. Additionay, to avoid forward biasing the ESD protection diodes on the input pins, neither input shoud swing further than 3 beow the V power rai. Therefore, the input common mode votage shoud be constrained to: V 3 V INDIFF V INCM R R V (.V) R V OCM R The specifications in the Eectrica Characteristics tabe are a specia case of the genera equation above. For a singe 3V power suppy, (V = 3V, V = V) with V OCM =.V, ΔV INDIFF = ±.V and R = R, the vaid input common mode range is: V INCM.V Likewise, for a singe V power suppy, (V = V, V = V) with V OCM =.V, ΔV INDIFF = ±.V and R = R, the vaid input common mode range is: V INCM.V Output Common Mode and V OCM Pin The output common mode votage is defined as the average of the two outputs: V OUTCM = V OCM = V OUT V OUT As the equation shows, the output common mode votage is independent of the input common mode votage, and is instead determined by the votage on the V OCM pin, by means of an interna feedback oop. If the V OCM pin is eft open, an interna resistor divider deveops a potentia hafway between the V and V votages. The V OCM pin can be overdriven to another votage if desired. For exampe, when driving an ADC, if the ADC makes a reference avaiabe for setting the common mode votage, it can be directy tied to the V OCM pin, as ong as the ADC is capabe of driving the input impedance presented by the V OCM pin as isted in the Eectrica Characteristics tabe (R VOCM ). The Eectrica Characteristics tabe aso specifies the vaid range that can be appied to the V OCM pin.

15 APPLICATIONS INFORMATION Noise When comparing the LTC66- s noise to that of other ampifi ers, be sure to compare simiar specifications. Standaone op amps often specify noise referred to the inputs of the op amp. The LTC66- s interna op amp has input referred votage noise of ony.nv/ Hz. In addition to the noise generated by LTC66- the ampifier, the surrounding feedback resistors aso contribute noise. A noise mode is shown in Figure a. The output spot noise generated by both the ampifier and the feedback components is given in Figure b. Substituting the equation for Johnson noise of a resistor (e nr = ktr) into the equation in Figure b and simpifying gives the resut shown in Figure c. e nr R e nr R e nr3 I n R3 e ni e nr R e nr3 R3 I n e nr R 66 Fa e no Figure a. Differentia Noise Mode e no = e ni R R I n RR3 R R e nr R R e nr3 R R e nr Figure b e no = e ni R R I n RR3 R R k T R R R3 R R R Figure c

16 LTC66- APPLICATIONS INFORMATION Board Layout and Bypass Capacitors For singe-suppy appications it is recommended that a high quaity XR or XR,.μF bypass capacitor be paced directy between V and the adjacent V pin. The V pins, incuding the Exposed Pad, shoud be tied directy to a ow impedance ground pane with minima routing. For spit power suppies, it is recommended that additiona high quaity XR or XR,.μF capacitors be used to bypass pin V to ground and V to ground, again with minima routing. For driving heavy differentia oads (< Ω), additiona bypass capacitance may be needed between V and V for optima performance. Keep in mind that sma geometry (e.g., 63) surface mount ceramic capacitors have a much higher sef-resonant frequency than do eaded capacitors, and perform best in high speed appications. The V OCM pins shoud be bypassed to ground with a high quaity ceramic capacitor (at east.μf). In spit-suppy appications, the V OCM pin can be either bypassed to ground or directy hard wired to ground. Stray parasitic capacitances to any unused input pins shoud be kept to a minimum to prevent deviations from the idea frequency response. The best approach is to remove the soder pads for the unused component pins and strip away any ground pane underneath. Foating unused pins does not reduce the reiabiity of the part. At the output, aways keep in mind the differentia nature of the LTC66-, because it is important that the oad impedances seen by both outputs (stray or intended) be as baanced and symmetric as possibe. This wi hep preserve the baanced operation that minimizes the generation of even-order harmonics and maximizes the rejection of common mode signas and noise. Driving ADCs The LTC66- s rai-to-rai differentia output and adjustabe output common mode votage make it idea for interfacing to differentia input ADCs. These ADCs are typicay suppied from a singe-suppy votage which can be as ow as 3V (.V minimum), and have an optima common mode input range near mid-suppy. The LTC66- makes interfacing to these ADCs easy, by providing antiaiasing, singe-ended to differentia conversion and common mode eve shifting. The samping process of ADCs creates a transient that is caused by the switching in of the ADC samping capacitor. This momentariy shorts the output of the ampifier as charge is transferred between ampifier and samping capacitor. The ampifi er must recover and sette from this 6

17 APPLICATIONS INFORMATION oad transient before the acquisition period has ended, for a vaid representation of the input signa. The LTC66- wi sette quicky from these periodic oad impuses. The RC network between the outputs of the driver decoupes the samping transient of the ADC (see Figure ). The capacitance serves to provide the buk of the charge during the samping process, whie the two resistors at the outputs of the LTC66- are used to dampen and attenuate any charge injected by the ADC. The RC fi ter gives the additiona benefit of band imiting broadband output noise. The seection of the RC time constant is tria and error for a given ADC, but the foowing guideines are recommended. Choose an RC time constant that is smaer than the reciproca of the fiter cutoff frequency configured LTC66- by the LTC66-. Time constants on the order of ns do a good job of fi tering broadband noise. Longer time constants improve SNR at the expense of setting time. The resistors in the decouping network shoud be at east Ω. Too arge of a resistor wi eave insufficient setting time. Too sma of a resistor wi not propery dampen the oad transient of the samping process, proonging the time required for setting. In 6-bit appications, this wi typicay require a minimum of eeven RC time constants. The Ω resistors at the inputs to the ADC minimize the samping transients that charge the RC fiter capacitors. For owest distortion, choose capacitors with ow dieectric absorption, such as a CG mutiayer ceramic capacitor. V IN BIAS 3 / LTC66-9.μF nf 3V μf V OCM R R C C C Ω Ω CONTROL A IN ADC A IN V CM GND.μF D D μf 3.3V CHANNEL A τ = R (C C) 66 F Figure. Driving an ADC

18 LTC66- TYPICAL APPLICATIONS Dua, Matched, th Order MHz Lowpass Fiter LTC66- LTC66- V INA.k V OUTA V INB 6.k 6 V OUTB THREE GAINS ARE POSSIBLE, AS SHOWN IN FIGURE 66 TA Gain Magnitude vs Frequency GAIN () TA3

19 PACKAGE DESCRIPTION DJC Package -Lead Pastic DFN (6mm 3mm) (Reference LTC DWG # --) LTC ±.. ±..6 ±. ( SIDES) R =..9. ±. NOTE:. DIMENSIONS ARE IN MILLIMETERS. APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3. DRAWING IS NOT TO SCALE PACKAGE OUTLINE.3 ±. ( SIDES). ±.. BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 6. ±. ( SIDES) R =. TYP.9 R =. TYP. ±. PIN TOP MARK (NOTE 6). REF 3. ±. ( SIDES). ±....6 ±. ( SIDES).3 ±. ( SIDES).9 BOTTOM VIEW EXPOSED PAD. ±.. BSC (DJC) DFN 6 PIN # NOTCH R.3 TYP OR.mm CHAMFER NOTE:. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WXXX) IN JEDEC PACKAGE OUTLINE M-9. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technoogy Corporation is beieved to be accurate and reiabe. However, no responsibiity is assumed for its use. Linear Technoogy Corporation makes no representation that the interconnection of its circuits as described herein wi not infringe on existing patent rights. 9

20 LTC66- TYPICAL APPLICATION Dua, Matched, nd Order MHz Lowpass Fiter Gain Magnitude vs Frequency 3 LTC66- V INA V OUTA GAIN () V INB 6 V OUTB. 66 TA 66 TA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT6 th Order Fiter Buiding Bock Lowpass and Bandpass Responses Up to MHz LTC6 Rai-to-Rai Output Differentia Op Amp.nV/ Hz Noise, 9c Distortion at MHz LTC66 3GHz Rai-to-Rai Input Differentia Op Amp.6nV/ Hz Noise, c Distortion at MHz, ma LT66-./LT66-/ LT66-/LT66-/ LT66- Differentia th Order Lowpass Fiters Cut-Off Frequencies of.mhz/mhz/mhz/mhz/mhz LTC66 Differentia Pin-Confi gurabe nd Order Fiter MHz to MHz Pin-Confi gurabe Buiding Bock LT66-./LT66- Dua Differentia th Order Lowpass Fiters Cut-Off Frequencies of.mhz or MHz LT PRINTED IN USA Linear Technoogy Corporation 63 McCarthy Bvd., Mipitas, CA 93- () 3-9 FAX: () 3- LINEAR TECHNOLOGY CORPORATION