DELD MODEL ANSWER DEC 2018

Transcription

1 2018 DELD MODEL ANSWER DEC 2018 Q 1. a ) How will you implement Full adder using half-adder? Explain the circuit diagram. [6] An adder is a digital logic circuit in electronics that implements addition of numbers. In many computers and other types of processors, adders are used to calculate addresses, similar operations and table indices in the ALU and also in other parts of the processors. These can be built for many numerical representations like excess-3 or binary coded decimal. Adders are classified into two types: half adder and full adder. The half adder circuit has two inputs: A and B, which add two input digits and generate a carry and sum. The full adder circuit has three inputs: A and C, which add the three input numbers and generate a carry and sum. This article gives brief information about half adder and full adder in tabular forms and circuit diagrams.

2 Full adder using Half adder Half Adder and Full Adder Circuit An adder is a digital circuit that performs addition of numbers. The half adder adds two binary digits called as augend and addend and produces two outputs as sum and carry; XOR is applied to both inputs to produce sum and AND gate is applied to both inputs to produce carry. The full adder adds 3 one bit numbers, where two can be referred to as operands and one can be referred to as bit carried in. And produces 2-bit output, and these can be referred to as output carry and sum. Full adder truth table :- With the truth-table, the full adder logic can be implemented. You can see that the output S is an XOR between the input A and the half-adder, SUM output with B and C-IN inputs. We take C- OUT will only be true if any of the two inputs out of the three are HIGH.

3 b ) How lockout condition in counter is avoided. [2] Ans : To avoid lock out condition the unused states are introduced in front of used states from the above state diagram the 1,4,5,6 and 7 is the sequence and unused states are 0,3 and 6 the states are introduced in front of us States 1,4,5 and 7 respectively. other than this we use special circuit which always reset the counter whenever it got struck in an into an unused state. c ) Draw & explain Ring counter using JK-FF ( Timing diagram is expected). [4] 4-bit Ring Counter The synchronous Ring Counter example above, is preset so that exactly one data bit in the register is set to logic 1 with all the other bits reset to 0. To achieve this, a CLEAR signal is firstly applied to all the flip-flops together in order to RESET their outputs to a logic 0 level and then a PRESET pulse is applied to the input of the first flip-flop ( FFA ) before the clock pulses are applied. This then places a single logic 1 value into the circuit of the ring counter. So on each successive clock pulse, the counter circulates the same data bit between the four flipflops over and over again around the ring every fourth clock cycle. But in order to cycle the data correctly around the counter we must first load the counter with a suitable data pattern as

4 all logic 0 s or all logic 1 s outputted at each clock cycle would make the ring counter invalid. This type of data movement is called rotation, and like the previous shift register, the effect of the movement of the data bit from left to right through a ring counter can be presented graphically as follows along with its timing diagram: Timing diagram for Ring Counter : OR Q 2. a ) Design Full Substractor using Multiplexer IC [4] Full subtractor is an electronic device or logic circuit which performs subtraction of two binary digits. It is a combinational logic circuit used in digital electronics. Many combinational circuits are available in integrated circuit technology namely adders, encoders, decoders and multiplexers. In this article, we are going to discuss full subtractor construction using half subtractor and also the terms like truth table.

5 A full subtractor is formed by two half subtractors, which involves three inputs such as minuend, subtrahend and borrow, borrow bit among the inputs is obtained from subtraction of two binary digits and is subtracted from next higher order pair of bits, outputs as difference and borrow. Full Substractor using Multiplexer IC

6 b ) Compare synchronous and Asynchronous Counter. [2] c ) Simplify the following function using Quine Mc-clusky minimization techniques. [6] Y(A, B, C, D) = m(0, 1, 2, 3, 5, 7, 8, 9, 11, 14)

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8 Q 3. a ) Design the ASM Chart for a 2-bit UP counter using mode control line. when : M = 1 (UP Counting) & M = 0 (remain in same state). [6] Consider C as mode control line

9 b ) Implement the following using PAL: [4] F1(A, B, C, D) = m (1, 3, 4, 6, 9, 12, 14) F2(A, B, C, D) = m (1, 2, 3, 7, 12, 15)

10 C ) Define PLD?Mention different types of PLD s? [2] OR Q 4. a) Write VHDL code for Full Adder using Behavioural style of Modeling [4] library ieee; use ieee.std_logic_1164.all; entity fa is port (A,B,C:in bit; sum,carry:out bit); end entity; architecture behavioural of fa is begin sum<=(a xor (B xor C)); carry<=(b and C) OR (A and C) OR (A and B); end behavioural;

11 b ) Explain entity declaration for 4:1 multiplexer having enable line. [2] entity mux_4to1 is port( A,B,C,D : in STD_LOGIC; S0,S1: in STD_LOGIC; Z: out STD_LOGIC ); end mux_4to1; c ) Design BCD to Excess-3 code converter using PLA. [6]

12 Q 5. A) Draw 3-input TTL NAND gate and explain its operation. [5]

13 b ) Explain the interfacing of TTL and CMOS : [8] 1. CMOS driving TTL 2. TTL driving CMOS OR

14 Q 6. a ) Draw and explain Wired AND gate in detail. [5] Ans : b ) Explain the charactristics of digital ICs. [4] Ans :

15 C ) Explain with neat diagram CMOS NOR gate. [4] Ans :

16 Q 7. a ) Explain addressing mode of 8051 with example (any three) [6] Ans :

17 b ) List any eight application of microcontroller [4] Ans : 1. Consumer Electronics Products: Toys, Cameras, Robots, Washing Machine, Microwave Ovens etc. [any automatic home appliance] 2. Instrumentation and Process Control: Oscilloscopes, Multi-meter, Leakage Current Tester, Data Acquisition and Control etc. 3. Medical Instruments: ECG Machine, Accu-Check etc. 4. Communication: Cell Phones, Telephone Sets, Answering Machines etc. 5. Office Equipment: Fax, Printers etc. 6. Multimedia Application: Mp3 Player, PDAs etc. 7. Automobile: Speedometer, Auto-breaking system etc. c ) Explain the following pins of 8051 : [3] 1. RXD : It is used to receive data from data bus to destination. It deals with communication. 2. PSEN: It stands for Program Strobe Enable Pin. Which is used to enable to access external address of bank. 3. EA : External Access enable. It must be strapped to ground in order to enable the device to fetch code from external program memory locations starting from 0000H to FFFFH.

18 OR Q 8. a) State the register used in Timer/Counter operation. Explain TMOD Register. [5] TMOD REGISTER :- b ) Explain the following instruction with respective to 8051 and give example of each : Ans : 1. MUL :

19 2. SWAP : 3. L JUMP : LJMP (long jump) LJMP is an unconditional long jump. It is a 3-byte instruction in which the first byte is the opcode, and the second and third bytes represent the 16-bit address of the target location. The 2-byte target address allows a jump to any memory location from 0000 to FFFFH. Remember that although the program counter in the 8051 is 16-bit, thereby giving a ROM address space of 64K bytes, not all 8051 family members have that much onchip program ROM. The original 8051 had only 4K bytes of on-chip ROM for program space; consequently, every byte was precious. For this reason there is also an SJMP (short jump) instruction, which is a 2-byte instruction as opposed to the 3-byte LJMP instruction. This can save some bytes of memory in many applications where memory space is in short supply 4. PUSH : **************** THE END ****************