Binary Adder and Subtractor circuit

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Herbert Hutchinson
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1 Digital circuit Experiment manual Experiment 9 inary dder and Subtractor circuit Part list. x. x. 8 x. x. 8 x Theory inary number addition n adder is a digital circuit that performs addition of numbers. In modern computers adders reside in the arithmetic logic unit (LU) where other operations are performed. For single bit adders, there are two general types. half adder has two inputs, generally labelled and, and two outputs, the sum S and carry C. S is the two-bit XOR of and, and C is the ND of and. Essentially the output of a half adder is the sum of two one-bit numbers, with C being the most significant of these two outputs. The second type of single bit adder is the full adder. The full adder takes into account a carry input such that multiple adders can be used to add larger numbers. To remove ambiguity between the input and output carry lines, the carry in is labelled C i or C in while the carry out is labelled C o or C out. Half adder The half adder format is + = + = + = + =, Carry =

2 8 Digital circuit Experiment manual Following is the logic table for a half adder : INPUT OUTPUT SUM (S) Carry (Co) The logic expression of half adder is : S = + = Co = The logic diagram of the Half adder is shown in Figure L9-. SUM S=+ SUM S=+ CRRY Co= CRRY Co= Figure L9- The -bit Half adder logic diagram

3 Digital circuit Experiment manual 9 S Ci Co Denominator () dder ต วทด ()(Co) ต วทด (Co) Carry in (Ci) SUM (S) Carry out ต วทด (Co) (Co) Figure L9- The logic diagram of -bit binary full adder Full adder full adder is a logical circuit that performs an addition operation on three binary digits. The full adder produces a sum and carry value, which are both binary digits. It can be combined with other full adders or work on its own. The logic expression of the full adder is : S = C + C + C + C Co = C + C + C + C We can minimization the Carry out logic expression as follows : Co = + C + C + C The full adder logic diagram is shown in the Figure L9-.

4 Digital circuit Experiment manual inary number subtraction In unsigned binary subtraction, two operands, called the subtrahend and the minuend, are subtracted to yield a result called the difference. In the operation Q = -, Q is the difference, is the minuend, and is the subtrahend. Unsigned binary subtraction is based on the following four operations: (i) - = (ii) - = (iii) - = (iv) - = The last operation shows how to obtain a positive result when subtracting a from a borrow from the next most significant bit. orrowing Rules: () If you are borrowing from a position that contains a, leave behind a in the borrowedfrom position. () If you are borrowing from a position that already contains a, you must borrow from a more significant digit that contains a. ll s up to that point become s, and the last borrowed-from digit becomes a. The truth table of the half subtractor is shhown below Diff (Q) orrow (o) Consider the half subtractor's truth table, we would see the subtractor operation similar the addition. It is Exclusive-OR operation.the different of half adder and subtractor is orrow output (o). The half subtractor logic diagram is shown in the Figure L9-

5 Digital circuit Experiment manual DIFFERENCE DIFF = + ORROW o = DIFF o Figure L9- The logic diagram of the half subtractor with orrow output In case the minuend value less than subtrahend, the borrow must happen. The orrow (in) will be add to the half subtractor. It is Full Subtractor ; FS. The truth table of the full subtractor is shown below Minuend () Subtrahend () orrow in (i) Diff (Q) orrow (o) The operation block diagram of the full subtractor is shown in the Figure L9- Half subtractor o i Full subtractor Q = DIFF Figure L9- Shows the internal diagram of full subtractor operation

6 Digital circuit Experiment manual Procedure Half adder 9. Construct the circuit in Figure L9-. pply the input with LOGIC SWITCH. The output is connected with LOGIC MONITOR on the experiment board. Record the result in the output table in Figure L9- IC/ IC/ IC/ IC/ 9 IC/ 8 S = SUM SUM (S) Carry (Co) IC,IC: 9 IC/ 8 IC/ C = CRRY Figure L9- The half adder experiment circuit for step Construct the circuit in Figure L9-. pply the input with LOGIC SWITCH. The output is connected with LOGIC MONITOR on the experiment board. Record the result in the output table in Figure L9- IC S SUM (S) Carry (Co) + V IC: 8 IC: 8 IC Co Figure L9- The half adder experiment circuit for step 9.

7 Digital circuit Experiment manual Full adder 9. Construct the circuit in Figure L9-. pply the input with LOGIC SWITCH. The output is connected with LOGIC MONITOR on the experiment board. Record the result in the output table in Figure L9- IC/ 9 IC/ 8 S Ci IC/ IC Co IC/ IC/ IC: 8 IC: 8 IC: Denominator () dder ต วทด ()(Co) Carry in ต วทด (Ci)(Co) SUM (S) Carry out ต วทด (Co) (Co) Figure L9- The full adder experiment circuit for step 9.

8 Digital circuit Experiment manual Half subtractor 9. Construct the circuit in Figure L9-8. pply the input with LOGIC SWITCH. The output is connected with LOGIC MONITOR on the experiment board. Record the result in the output table in Figure L9-8 IC Q IC IC o IC : 8 IC : IC : 8 Diff (Q) orrow (o) Figure L9-8 The half subtractor experiment circuit for step 9.

9 Digital circuit Experiment manual Full subtractor 9. Construct the circuit in Figure L9-9. pply the input with LOGIC SWITCH. The output is connected with LOGIC MONITOR on the experiment board. Record the result in the output table in Figure L9-9 i IC : 8 IC : IC : 8 IC : IC/ IC/ IC/ IC/ 9 IC/ 8 X o IC/ IC/ Minuend () Subtrahend () orrow in (i) Diff (Q) orrow (o) Figure L9-9 The full subtractor experiment circuit for step 9. INNOVTIVE EXPERIMENT

10 Digital circuit Experiment manual

Experiment # 3 Combinational Circuits (I) Binary Addition and Subtraction

Experiment # 3 Combinational Circuits (I) Binary Addition and Subtraction Objectives: 1. To study adder and subtractor circuits using logic gates. 2. To construct and test various adders and subtractor