IPS031G/IPS032G SINGLE/DUAL FULLY PROTECTED POWER MOSFET SWITCH. Product Summary

Transcription

1 Data Sheet No.PD 5-J SINGLE/DUAL FULLY PROTECTED POWER MOSFET SWITCH Features Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection Description The are fully protected single/dual low side SMART POWER MOSFETs that feature overcurrent, over-temperature, ESD protection and drain to source active clamp.these devices combine a HEXFET POWER MOSFET and a gate driver. They offer full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning off the power MOSFET when the temperature exceeds 5 o C or when the drain current reaches A. The device restarts once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations. Typical Connection Product Summary R ds(on) V clamp Ishutdown T on/ T off Packages -Lead SOIC IPS3G 7mΩ (max) 5V A.5µs -Lead SOIC IPS3G (Dual) Load R in series (if needed) IN control ƒ D S Logic signal (Refer to lead assignment for correct pin assignment)

2 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 5 o C unless otherwise specified). PCB mounting uses the standard footprint with 7 µm copper thickness. All Sources leads of each mosfet must be connected together to get full current capability Symbol Parameter Min. Max. Units Test Conditions V ds Maximum drain to source voltage 7 V in Maximum input voltage V Iin, max Maximum IN current - + ma Isd cont. Diode max. continuous current () (rth=5 o C/W) IPS3G. (for all sd mosfets, rth=5 o C/W) IPS3G Isd pulsed Diode max. pulsed current () (for ea. mosfet) 5 Pd Maximum power dissipation () (rth=5 o C/W) IPS3G W (for all Pd mosfets, rth=5 o C/W) IPS3G.5 ESD Electrostatic discharge voltage (Human Body) C=pF, R=5Ω, kv ESD Electrostatic discharge voltage (Machine Model).5 C=pF, R=Ω, L=µH T stor. Max. storage temperature Tj max. Max. junction temperature - 5 A o C Thermal Chacteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Rth Thermal resistance with standard footprint Rth Thermal resistance with " square footprint 5 SOIC- Rth Thermal resistance with standard footprint ( mos on) ( mosfets on) 5 C/W Rth Thermal resistance with standard footprint SOIC- ( mos on) ( mosfet on) Rth3 Thermal resistance with " square footprint ( mos on) ( mosfets on) () Limited by junction temperature (pulsed current limited also by internal wiring)

3 Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Min. Max. Units Vds (max) Continuous Drain to Source voltage 35 VIH High level input voltage V VIL Low level input voltage.5 Ids Continuous drain current Tamb=5 o C (TAmbient = 5 o C, IN = 5V, rth = o C/W, Tj = 5 o C) IPS3G. A (TAmbient = 5 o C, IN = 5V, rth = 5 o C/W, Tj = 5 o C) IPS3G.5 Rin Recommended resistor in series with IN pin. 5 kω Tr-in(max) Max recommended rise time for IN signal (see fig. ) µs Fr-Isc () Max. frequency in short circuit condition (Vcc = V) khz Static Electrical Characteristics (Tj = 5 o C unless otherwise specified.) Symbol Parameter Min. Typ. Max. Units Test Conditions Rds(on) ON state resistance Tj = 5 o C 5 Rds(on) ON state resistance Tj = 5 o mω Vin = 5V, Ids = A C 75 Idss Drain to source leakage current.5 5 Vcc = V, Tj = 5 o o C µa Idss Drain to source leakage current 5 5 Vcc = V, Tj = 5 o o C V clamp Drain to source clamp voltage Id = ma (see Fig.3 & ) V clamp Drain to source clamp voltage 5 53 Id=Ishutdown (see Fig.3 & ) V Vin clamp IN to source clamp voltage Iin = ma Vth IN threshold voltage. Id = 5mA, Vds = V Iin, -on ON state IN positive current 5 9 Vin = 5V Iin, -off OFF state IN positive current µa Vin = 5V over-current triggered Switching Electrical Characteristics Vcc = V, Resistive Load = 5Ω (IPS3), Resistive Load = 3Ω (IPS3S), Rinput = 5Ω, µs pulse,t j = 5 o C, (unless otherwise specified). Symbol Parameter Min. Typ. Max. Units Test Conditions Ton Turn-on delay time.5.3. Tr Rise time. See figure Trf Time to 3% final Rds(on) µs Toff Turn-off delay time. 3.5 See figure Tf Fall time Qin Total gate charge. nc Vin = 5V 3

4 Protection Characteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Tsd Over temperature threshold 5 o C See fig. Isd Over current threshold A See fig. V reset IN protection reset threshold V Treset Time to reset protection µs Vin = V, Tj = 5 o C EOI_OT Short circuit energy (see application note) µj Vcc = V Functional Block Diagram All values are typical DRAIN 3 Ω k Ω 7 V IN S Q. V µ A R Q T > 5 c I sense I > sd SOURCE Lead Assignments D D D D D D D D D D D D S S S In Lead SOIC IPS3G Part Number S S S I S S S I Lead SOIC (Dual) IPS3G

5 Vin 5 V V Vin 9 % % Ids Isd I shutdown t < T reset t > T reset Ids Tr-in 9 % % T Tsd (5 c) T shutdown Vds Td on tr Td off tf Figure - Timing diagram Figure - IN rise time & switching time definitions T clamp Vin L V load Ids Vds Vds clamp ( Vcc ) Rem : V load is negative during demagnetization 5 v v Vin IN R D S Vds Ids + V - ( see Appl. Notes to evaluate power dissipation ) Figure 3 - Active clamp waveforms Figure - Active clamp test circuit 5

6 All curves are typical values with standard footprints. Operating in the shaded area is not recommended Tj = 5 o C Tj = 5 o C % % % % % % % % % % % Figure 5 - Rds ON (mω) Vs Input Voltage (V) Figure - Normalised Rds ON (%) Vs Tj ( o C) ton delay rise time 3% final rdson toff delay 9 fall time Figure 7 - Turn-ON Delay Time, Rise Time & Time to 3% final Rds(on) (us) Vs Input Voltage (V) Figure - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V)

7 delay on rise time 3% rdson delay off fall time. Figure 9 - Turn-ON Delay Time, Rise Time & Time to 3% final Rds(on) Vs IN Resistor (Ω). Figure - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor (Ω) Isd 5 C Ilim 5 C Figure - Current Iimimitation & I shutdown (A) Vs Vin (V) Figure - I shutdown (A) Vs Temperature ( o C) 7

8 rth = 5 C/W SO Std. footprint mosfet on SO Std. footprint C/W SO Std. footprint mosfets on Figure 3a - Max.Cont. Ids (A) Vs Amb. Temperature ( o C) - IPS3G Figure 3b - Max.Cont. Ids (A) Vs Amb. Temperature ( o C) - IPS3G T = 5 C T = C single pulse Hz rth= C/W dt=5 C khz rth= C/W dt=5 C. Vbat = V Tjini = T sd.. Figure - Ids (A) Vs Protection Resp. Time (s) Figure 5 - Iclamp (A) Vs Inductive Load (mh)

9 rth SO std footprint Single pulse.. Single pulse.. rth SO std footprint mosfet active rth SO std footprint mosfets active Figure a - Transient Thermal Imped. ( o C/W) Vs Time (s) - IPS3G Figure b - Transient Thermal Imped. ( o C/W) Vs Time (s) - IPS3G Iin,on Iin,off % 5% % 5% % 95% 9% 5% Vds Isd Vin ma % Figure 7 - Input current (µa) Vs Tj ( o C) Figure - Vin clamp and V clamp (%) Vs Tj ( o C) 9

10 Treset rise time fall time Figure 9 - Turn-on, Turn-off, and Treset (us) Vs Tj ( o C) Case Outlines A E X D e B H.5 [.] A. [.55] 3X.7 [.5] FOOTPRINT X.7 [.] X.7 [.7] DIM INCHES MILLIMETERS MIN MAX MIN MAX A A b c D E e.5 BASIC.7 BASIC e.5 BASIC.35 BASIC H K L y e A C y K x 5 X b A.5 [.] C A B. [.] X L 7 X c NOT ES:. DIMENSIONING & TOLERANCING PER ASME Y.5M-99.. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].. OUTLINE CONFORMS TO JEDEC OUTLINE MS-AA. -Lead SOIC 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.5 [.]. DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED.5 [.]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBS TRATE (MS-AA)

11 -Lead SOIC (narrow body) - -3 (MS-AC) IR WORLD HEADQUARTERS: 33 Kansas St., El Segundo, California 95 Tel: (3) 5-75 Data and specifications subject to change without notice. //